Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claims 1, 3-7, 9-13, 15, 17, and 21-22 are pending and rejected. Claims 1 and 13 are amended. Claims 2, 8, 14, 16, and 18-20 are canceled.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/22/2026 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 5-7, 11-13, 15, 17, and 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over Nielsen, US 2009/0084586 A1 (provided on the IDS of 4/6/2022) in view of Foster, US 2012/0320558 A1 (provided on the PTO-892 of 3/24/2026) and Shimamura, JP 2004172176 A.
The following citations for Shimamura, JP 2004172176 A are in reference to the machine translation provided by Espacenet and the figures in the original document.
Regarding claims 1, 5, 12, and 13, Nielsen a method of manufacturing an electronic circuit of an audio device (a method of manufacturing an electronic component assembly, 0053, where the assembly includes a circuit, 0104 and 0110, where the component is a hearing instrument or hearing aid, i.e., and audio device, 0005, 0048, 0081, and 0110), the method comprising:
providing a circuit board of the audio device (where a substrate for the component is a printed circuit board, 0027, 0104, and Fig. 2a, indicating that a circuit board is provided, where the component is used in a hearing aid, 0048, such that it will be a circuit board of an audio device);
mounting one or more electronic components including a first electronic component on the circuit board (where a SMD-component is mounted on a carrier, the carrier being a circuit board, 0104 and Fig. 2, where the SMD is an electronic component, 0006);
applying a first insulation layer outside the first electronic component (where a layer of electrically insulating material is applied to the SMD component, 0056 and Fig. 2a, so as to be outside the first electronic component);
applying a first shielding layer outside the first insulation layer, wherein the first shielding layer is above a first part of the circuit board (applying a layer of electrically conductive material that acts as a shielding layer over the insulation layer, 0059, 0110, and Fig. 2a, so as to be outside the first insulation layer and above a first part of the circuit board, i.e., the area of the circuit board covered by the shielding layer); and
applying a first protection layer outside the first shielding layer, wherein the first protection layer is electrically insulative (applying an electrically insulating layer to at least parts of the electrically conductive layer, 0068, such that the second insulating layer is considered to be a protective layer outside the first shielding layer);
wherein the first insulation layer is made of a first insulation material comprising one or more polymers (where the insulation material is in the form of a polymer, 0024 and 0103), and wherein the applying the first insulation layer outside the first electronic component comprises jetting or spraying the first insulation material towards the first electronic component (where the insulating layer is provided by spraying, 0073, where a lacquer is understood to be a polymer or resin).
Since they teach that the electrically insulating layer is applied to at least parts of the electrically conductive layer, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have applied the layer to the entire surface of the first shielding layer because they teach that the range of coverage is at least part, suggesting that the entire shielding layer can be covered. Specifically, the range of coating at least parts of the electrically conductive layer overlaps a range of coating the entire electrically conductive layer. According to MPEP 2144.05, “in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists.” In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
They further teach that the circuit board comprises a ground connection where the first insulation layer is applied over a first portion of the ground connection, i.e., electrical pad connection on the substrate to ground reference (Fig. 2a). They teach that one or more shielding layers are deposited and are in electrical contact with a ground ring (0009, 0023, 0104, and Fig. 2a). They depict the first insulating layer as being applied over a first portion of the ground connection and the first shielding layer as being applied to contact a second portion of the ground connection, such that the second portion is a subset of an entirety of the ground connection (Fig. 2a).
They further teach that the thickness of the electrically insulating layer is in the range from 1 to 30 microns (0072), so as to be within the claimed range. According to MPEP 2131.03, “[W]hen, as by a recitation of ranges or otherwise, a claim covers several compositions, the claim is ‘anticipated’ if one of them is in the prior art.” Titanium Metals Corp.v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (citing In re Petering, 301 F.2d 676, 682, 133 USPQ 275, 280 (CCPA 1962)) (emphasis in original).
They do not specifically teach that the protection layer covers a second part of the circuit board different from the first part of the circuit board.
Foster teaches shielding electronic components on a substrate using electromagnetic shielding structures (abstract). They teach using insulating materials to provide structural support and help prevent electrical shorting between conductive materials and the components (abstract). They teach forming the structures on circuit boards (0007). They teach a structure in which a shielding layer 171 is formed on contacts 175 on the substrate surface (0086 and Fig. 11C). They teach that the contacts are coupled to a ground plane 102 such that the shielding layer is formed on the ground connection (0086 and Fig. 11C). They teach that the structure includes insulating layers 173A and 173B on either side of the shielding layer (0080, 0086 and Fig. 11C). Therefore, Foster provides a ground connection on a substrate surface, where the shielding layer covers the entire connection including an edge region and where an outer insulating layer or protection layer is formed to cover the shielding layer and a second part of the circuit board different from a first part covered by the first insulating layer (Fig. 11C).
From the teachings of Foster, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have formed the second insulating layer so that it covers a second region of the circuit board different from the first region because Nielsen suggests forming an insulating layer over the shielding layer and Foster teaches that it is desirable to provide a shielding layer between two insulating layers where the second insulating layer covers a second region of the circuit board different form the first such that it will be expected to desirably insulate the shielding layer.
They do not teach that the second portion of the ground connection includes an edge of the ground connection.
Shimamura teaches a circuit module for electronic components (0001). They teach a module that includes a chip-shaped metal conductive member 22 for ensuring conductivity with the shield layer 19 at the boundary end of the circuit board 11 (0032 and Fig. 4). They teach that a sealing resin layer 14 is applied to substrate and then a shielding layer 19 is applied (0066 and Fig. 11). They teach depict the metal chip as being connected to the grounding electrode 17a and they indicate that the shielding layer is connected to the grounding electrode, where the sealing resin is also coated onto the metal chip (0007, 0086, and Fig. 11). Therefore, they provides a ground connection (metal chip connected to the ground), where the shielding layer is coated onto an edge region of the connection and the sealing resin is coated onto another portion of the ground connection.
From the teachings of Foster and Shimamura, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the process of Nielsen to have formed the shielding layer so that it also contacts the edge of the ground connection because Foster teaches that the shielding layer can connect to an edge region of a ground connection and Shimamura teaches that a ground connection (metal chip that is connected to the ground) can be covered by a shielding layer at an edge portion and an insulating layer at different portion, where Nielsen depicts the ground connection being covered by both the shielding layer and the insulating layer such that it will be expected to connect the shielding layer to the ground connection as desired. Therefore, the shielding layer will be applied to contact a second portion of the ground connection, the second portion of the ground connection being a subset of an entirety of the ground connection and including an edge of the ground connection.
Regarding claim 6, Nielsen in view of Foster and Shimamura suggests the limitations of instant claim 1. Nielsen further teaches providing a first mask layer for screening areas of a surface of the component intended for not being covered by an electrically insulating layer (0055), indicating that a mask is applied before the spraying of the first insulation material.
Regarding claim 7, Nielsen in view of Foster and Shimamura suggests the limitations of instant claim 1. Nielsen further teaches that the first insulation material covers the first electronic component (Fig. 2a).
Foster also teaches that the insulation material covers the first electronic component (0045 and Fig. 11C).
Shimamura also teaches that the insulating material 14 covers the electronic components (0066 and Fig. 4).
Regarding claim 11, Nielsen in view of Foster and Shimamura suggests the limitations of instant claim 1. Nielsen further teaches that the process can be done with more than one component (abstract, 0011, 0014-0020, Fig. 1b, and Fig. 2b). Therefore, the process will include a second component and the first insulation layer will also be applied outside the second electronic component.
Regarding claim 15, Nielsen in view of Foster and Shimamura suggests the limitations of instant claim 13. As discussed above for claim 11, Nielsen teaches including a second electronic component. They teach applying the shielding layer to cover the second electronic component (Fig. 1b and Fig. 2b).
Regarding claim 17, Nielsen in view of Foster and Shimamura suggest the process of instant claim 13. Nielsen further depicts the shielding layer as being on top of the grounding pad so as to sandwich the ground connection between a part of the shielding layer and a part of the circuit board (Fig. 2a).
Foster also depicts that the first shielding layer is applied to sandwich the ground connection between a part of the first shielding layer and the circuit board (Fig. 11C).
Shimamura also depicts that the first layer is applied to sandwich the ground connection between a part of the first shielding layer and the circuit board (Fig. 4).
Regarding claims 21 and 22, Nielsen in view of Foster and Shimamura suggests the limitations of instant claims 1 and 13. Nielsen further teach that the term ‘electrically insulating’ is taken to mean being essentially electrically non-conducting, where examples of electrically insulating material for use in the present context are polyethylene or PVC (0024).
From this, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have used the same electrically insulating material in the first insulation layer and the protection layer because Nielsen teaches using insulating materials for both layers, where they indicate that PE and PVC are examples of insulating materials for use in the invention such that by using PE or PVC for both layers it will be expected to provide suitable insulating materials.
Claims 1, 5, 6, 7, 9-13, 15, 17, 21, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Higgins, US 5,639,989 (provided on the IDS of 4/6/2022) in view of Nielsen, US 2009/0084586 A1 (provided on the IDS of 4/6/2022) and Shimamura, JP 2004172176 A.
The following citations for Shimamura, JP 2004172176 A are in reference to the machine translation provided by Espacenet and the figures in the original document.
Regarding claims 1, 5, 12, and 13, Higgins teaches a method of manufacturing an electronic circuit (a method of making a shielded electronic component assembly on a circuit board substrate, title and abstract), the method comprising:
providing a circuit board (where a component is mounted on a printed circuit board substrate, abstract, Col. 5, lines 31-61 and Fig. 1);
mounting one or more electronic components including a first electronic component on the circuit board (where a device is attached or mounted to the substrate, Col. 5, lines 63-66 and Fig. 1, where the device is an electronic component, i.e., a semiconductor die, abstract, Col. 5, lines 31-62, and Col, 8, lines 1-14);
applying a first insulation layer outside the first electronic component (where an insulative layer is dispensed and cured over the die and other regions of the substrate which will be shielded, Col. 6, lines 17-47 and Fig. 1, so as to be outside of the first electronic component);
applying a first shielding layer outside the first insulation layer (depositing a shielding layer over the insulative coating, Col. 6, line 64 through Col. 7, line 13 and Fig. 1, so as to be outside the first insulation layer); and
applying a first protection layer outside the first shielding layer, wherein the first protection layer is electrically insulative, and is applied to fully cover the first shielding layer (where multilayered shielding coatings can be formed, wherein each layer is formulated to contain a specific mixture of fillers to target specific E of H field frequencies of attenuation, Col. 4, lines 1-30, where in the multilayer embodiment, a highly insulative polymer coating is first applied and then a series of individual coatings are applied, each chosen to shield a specific subset of interference frequencies, where a second coating is highly electrically conductive, Col. 4, lines 54-65, and where between any given shielding layers there may be an insulating layer which electrically isolates the shielding layers from one another, Col. 19, lines 32-53, therefore, the first shielding layer is considered to be the first electrically conductive layer and the protective layer is considered to be one of the insulating layers formed between the subsequent shielding layers, where since the insulating layer is between the shielding layers to electrically isolate them, it will fully cover the first shielding layer to provide the electrical insulation);
wherein the first insulation layer is made of a first insulation material comprising one or more polymers (where the insulative layer is a polymer, Col. 6, lines 17-47), and wherein the applying the first insulation layer outside the first electronic component comprises jetting or spraying the first insulation material towards the first electronic component (where the insulating layer is deposited by spraying, Col. 6, lines 17-47).
They further teach that the thickness of the electrically insulating layer is in the range from 1 to 250 microns (Col. 6, lines 17-63), so as to be within the claimed range. According to MPEP 2131.03, “[W]hen, as by a recitation of ranges or otherwise, a claim covers several compositions, the claim is ‘anticipated’ if one of them is in the prior art.” Titanium Metals Corp.v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (citing In re Petering, 301 F.2d 676, 682, 133 USPQ 275, 280 (CCPA 1962)) (emphasis in original).
Further, since there is no indication that the shielding layer is discontinuous, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have formed the insulating protective layer to cover the first shielding layer so as to electrically isolate the different layers of the multilayer shielding coating.
Higgins further teaches that the conformal insulating layer is formed over the semiconductor device and over the signal traces, such that a portion of the at least one ground element is uncovered by the insulating layer (Col. 3, lines 12-30 and Fig. 1). They teach that the conformal shielding layer is deposited over the insulating layer and in contact with the uncovered portion of the at least one ground element (Col. 3, lines 12-30 and Fig. 1). They teach that the EMI ground ring 19 is in contact with the shielding layer (Col. 6, lines 64-66 and Fig. 1). Therefore, they provide a ground connection on the circuit board (ground ring), where the first shielding layer is applied over the ground electrode including an edge, and where the insulating layer is applied so that as least a portion of the ground ring is uncovered.
They teach that when forming multiple shielding layers, it may be desirable for shielding layer 60 to not cover ground ring 56 or the left most through-hole 20 as depicted on the left side of Fig. 3 (Col. 10, lines 1-35 and Fig. 3). They teach that this allows subsequently deposited shielding layer 62 to be in direct contact to ground ring 56 (Col. 10, lines 1-35 and Fig. 3). They teach that it may be desirable for shielding layers to be connected to different and independent ground sources (Col. 10, lines 1-35 and Fig. 3). Therefore, when forming a multilayered shielding structure having insulating layers between the conducting layers, where the shielding layers are connected to their own ground connection, the claimed first or second insulating layer that correspond to the various insulating layers of Higgins will cover a second region on the substrate different from the first region covered by the first conductive shielding layer because the subsequent shielding layers will cover different regions from the first so as to contact different and independent ground source as depicted in Fig. 3 such that the insulating layers between the conductive layers will also cover different regions from the first shielding layer.
They do not teach that the circuit is for an audio device.
As discussed above in the rejection using Nielsen, Nielsen teaches applying an insulating layer and a shielding layer on electronic components mounted on a circuit board for a hearing aid.
From the teachings of Nielsen, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the process of Higgins to have applied the insulating and shielding layers onto electronic components in an electronic circuit for a hearing aid because Nielsen teaches that such coatings are desired in a hearing aid circuit such that it will be expected to provide a desirable use for the process. Therefore, the process will be for manufacturing an electronic circuit of an audio device such that the circuit board will be of an audio device.
They do not teach that the ground ring is covered by the insulating layer in a first portion and by the shielding layer at a second portion where the second portion includes an edge.
As noted above, Nielsen depicts the ground connection as being on the top surface in contact with the shielding layer and the insulating layer (Fig. 2a).
As discussed above, Shimamura depicts a ground contact covered at a first portion with an insulating layer and at a second portion including the edge with a shielding layer.
From the teachings of Shimamura, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have applied the insulating layer over a first portion of the ground ring and the shielding layer over a second portion of the ground ring including an edge portion because Higgins teaches that the insulating layer is applied so that at least a portion of the ground ring is exposed, Nielsen depicts covering a ground connection with both the insulating layer and the shielding layer, and Shimamura depicts covering an edge region of a ground connection with a shielding layer and a different portion of the ground connection with an insulating layer such that it will be expected to provide the electrical connection with the shielding layer and the ground ring as desired. Therefore, the second portion of the ground connection will be a subset of an entirety of the ground connection with the first portion covered with the insulating region being the other subset. As noted above, the claimed protective layer will then be applied to the shielding layer to insulate from subsequent conductive shielding layers and over a second portion of the circuit board as the shielding layers are connected to other ground connections.
Regarding claim 6, Higgins in view of Nielsen and Shimamura suggests the limitations of instant claims 1 and 13. Higgins further teaches that to avoid coating circuit regions which are to be left uncoated with the insulation layer, it may be necessary to remove the coating through various means (Col. 6, lines 17-47).
Higgins does not teach using a mask.
Nielsen further teach providing a first mask layer for screening areas of a surface of the component intended for not being covered by an electrically insulating layer (0055), indicating that a mask is applied before the spraying of the first insulation material. They teach removing the mask to remove the insulating material applied to the mask (0057).
From the teachings of Nielsen, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have applied a mask to the surface of the circuit in the regions where the insulation material is not desired before spraying because Nielsen teaches that masking can to be used to selectively provide the insulating material such that it will be expected to also provide selective application of the insulating material as desired by Higgins.
Regarding claim 7, Higgins in view of Nielsen and Shimamura suggests the limitations of instant claims 1 and 13. Higgins further teaches that the first insulation material, 24, covers the first electronic component (Col. 6, lines 18-47 and Fig. 1).
Regarding claims 9 and 10, Higgins in view of Nielsen and Shimamura suggests the limitations of instant claims 1 and 13. Higgins further teaches that the shielding layer is made of a first shielding material, i.e., a precursor material, filled with a plurality of particles (Col. 3, lines 12-30), where the particles are indicated as being copper, silver, nickel, iron, cobalt, etc. to impart high electrical conductivity (Col. 7, lines 14-45) or nickel-zinc ferrites (Col. 15, lines 21-53). Therefore, the electrically conductive shielding layer will include metal particulates.
Regarding claims 11 and 15, Higgins in view of Nielsen and Shimamura suggests the limitations of instant claims 1 and 13. Higgins further teaches that the electronic assembly includes various electronic components, such that the other devices will be mounted on the circuit board, where the devices also have the insulating layer and the shielding layer (Col. 8, lines 1-14, Col. 8, lines 35-63, and Fig. 2). Therefore, the first insulation layer and the first shielding layer will also be applied outside the second electronic component.
Regarding claim 17, Higgins in view of Nielsen and Shimamura suggests the limitations of instant claim 13. Higgins further teaches that the one or more shielding layers are in electrical contact with a grounding (abstract), such that the first shielding layer will be applied so as to be coupled with a ground connection. They depict the shielding layer as being applied over the grounding ring (Col. 6, lines 64-66, Fig. 1, and Fig. 2), such that it is considered to sandwich the ground connection between a part of the first shielding layer and a part of the circuit board.
Nielsen also depicts sandwiching the ground connection between the shielding layer and a part of the circuit board (Fig. 2a).
Shimamura also depicts sandwiching the ground connection between the shielding layer and a part of the circuit board (Fig. 4).
Regarding claims 21 and 22, Higgins in view of Nielsen and Shimamura suggest the process of instant claims 1 and 13. Higgins further teaches using a pure polymer having a low modulus of elasticity, such as a silicone gel or elastomer, polyurethane, epoxy, polysiloxane, acrylic, and the like for the insulating layer 24 (Col. 6, lines 17-47). They teach using a similar silicone polymer matrix as that used for coating 24, but with the addition of filler particles for the shielding layer (Col. 18, lines 16-32). From this, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have selected the same polymer used for the insulating layer and the insulating protective layer between the shielding layers because Higgins teaches using the same polymer in the insulating layer and the shielding layers with the addition of filler, where the polymer is insulating such that it will be expected to provide a suitably insulating material for use between the shielding layers. Therefore, the first protection layer will be made from a material having the same composition as that of the first insulation material of the first insulation layer.
Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Nielsen in view of Foster and Shimamura as applied to claim 1 above, and further in view of Higgins, US 5,639,989 (provided on the IDS of 4/6/2022).
Regarding claims 9 and 10, Nielsen in view of Foster and Shimamura suggests the limitations of instant claim 1.
They do not teach that the shielding layer comprises metal particulates.
As discussed above, Higgins teaches applying an insulation layer and a shielding layer to electronic components. Higgins further teaches that the shielding layer is made of a first shielding material, i.e., a precursor material, filled with a plurality of particles (Col. 3, lines 12-30), where the particles are indicated as being copper, silver, nickel, iron, cobalt, etc. (Col. 7, lines 14-45) or nickel-zinc ferrites (Col. 15, lines 21-53). They teach that the particles are selected to attenuate electromagnetic signals (Col. 3, lines 12-29).
From the teachings of Higgins, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the process of Nielsen in view of Foster and Shimamura to have used a precursor filled with the metal particles or particulates of Higgins as the shielding layer because Higgins teaches that such materials can be used for shielding electronic components on a circuit board such that it will be expected to provide a desirable shielding layer in the process of Nielsen in view of Foster and Shimamura.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Nielsen in view of Foster and Shimamura or Higgins in view of Nielsen and Shimamura as applied to claim 1 above, and further in view of Chen, US 2020/0075708 A1.
Regarding claim 3, Nielsen in view of Foster and Shimamura and Higgins in view of Nielsen and Shimamura both suggest the limitations of instant claim 1, where they teach both spraying the insulation material.
They do not teach that applying the first insulation layer also comprises performing molding.
Chen teaches a structure and formation method of a semiconductor device (abstract). They teach forming the semiconductor device structure on a semiconductor substrate which may include multiple device elements (0016). They teach forming multiple layers to provide a magnetic element on the substrate (0037). They teach forming a dielectric layer over conductive lines 118A and 118B, isolation elements 116’, and the magnetic element 109 (0071). They teach that the dielectric layer is made of or includes a polymer material (0072). They teach that the dielectric layer may be formed using a spray coating process, an injecting process, a molding process, one or more other suitable processes, or a combination thereof (0072).
From the teachings of Chen, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the process of Nielsen in view of Foster and Shimamura or Higgins in view of Nielsen and Shimamura to have formed the insulation layer using a combination of spraying and molding because Chen teaches that such techniques can be combined to deposit a polymeric insulating layer on a component on a substrate such that it will be expected to also successfully result in the deposition of the insulating layer on the electronic components.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Nielsen in view of Foster and Shimamura or Higgins in view of Nielsen and Shimamura as applied to claim 1 above, and further in view of Song, US 2016/0309577 A1.
Regarding claim 4, Nielsen in view of Foster and Shimamura and Higgins in view of Nielsen and Shimamura both suggest the process of claim 1, where they teach spraying the insulation material.
They do not teach jetting the material.
Song teaches a circuit assembly provided on an electrically conductive structure, such as a board level shield (abstract). They teach that a dielectric material is applied to the outer surfaces of the BLS by inkjet printing, spraying, painting, etc. (0024, 0026, and Fig. 1). They teach that the BLS is attached to a substrate such as a printed circuit board (0022). They teach that the electrically nonconductive layer is applied by one or more of printing at least part of the electrically nonconductive layer, and/or spraying at least part of the electrically nonconductive layer, and/or painting at least part of the electrically nonconductive layer (claim 20). They teach that the dielectric material provides electrical isolation between the BLS and an applied electrically conductive material (0026, 0032, Fig. 1, and Fig. 2). Therefore, Song teaches that an insulating material can be applied to a component on a circuit board using one or more of spraying and/or printing, where printing is done by inkjet printing.
From the teachings of Song, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the process of Nielsen in view of Foster and Shimamura or Higgins in view of Nielsen and Shimamura to have deposited in the insulating layer using inkjet printing because Song teaches that one or more of spraying and printing can be used to apply insulation to a component on a PCB, where the printing is done by inkjet printing such that it will be expected to provide a suitable application method for forming layers of the first insulation on the electrical components.
Response to Arguments
Applicant’s arguments dated 5/22/2026 have been fully considered.
In light of the amendments to the claims, the previous 112 rejections are withdrawn.
In light of the amendments to the claims, Applicant’s arguments are considered persuasive and therefore the rejection has been modified as indicated above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINA D MCCLURE whose telephone number is (571)272-9761. The examiner can normally be reached Monday-Friday, 8:30-5:00 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at 571-272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTINA D MCCLURE/Examiner, Art Unit 1718