Prosecution Insights
Last updated: July 17, 2026
Application No. 17/718,065

APPLICATION PROGRAMMING INTERFACE TO GENERATE A REPRESENTATION OF GRAPH CODE

Non-Final OA §101§103
Filed
Apr 11, 2022
Priority
Apr 15, 2021 — provisional 63/175,193
Examiner
TRUONG, LECHI
Art Unit
2194
Tech Center
2100 — Computer Architecture & Software
Assignee
NVIDIA Corporation
OA Round
5 (Non-Final)
87%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
770 granted / 884 resolved
+32.1% vs TC avg
Strong +37% interview lift
Without
With
+36.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
24 currently pending
Career history
917
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
92.3%
+52.3% vs TC avg
§102
2.0%
-38.0% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 884 resolved cases

Office Action

§101 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-24 are presented for the examination. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/24/2025 has been entered. Double Patenting 2. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 3.Claims 1-24 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-24 of U.S. Patent Application 19/047,599. Although the claims at issue are not identical, they are not patentably distinct from each other because both computer systems comprise substantially the same elements. The difference between claims 1,7, 13, 19 of the copending application and this case is a graphics processing unit (GPU) to generate at least a portion of a descriptive representation of the one or more portions of graph code indicated to the API, wherein the one or more portions of graph code are executable by the GPU, and the descriptive representation includes one or more parameters to the one or more portions of graph code, application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code. It would have been obvious to one of the ordinary skill level in the art to include above feature because this allows to visualize and simulate a flow of events in the software program, separate from specific data processing steps taking place. The effect is a significant streamlining of the main aspects of software applications development, from application design to coding, maintenance and operations. § 101 2. 35 U.S.C. 101 reads as follows Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1, 7, 13, 19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. As to Claims 1, 7, 13, 19 have been rejected under 35 USC 101 for abstract idea without significantly more. Under Step 2A, Prong 1, the “ the graph code indicated to the API” recite a mental process since “ indicate” is function that can be reasonably performed in the human mind with the aid of pen and paper through observation, evaluation, judgment, opinion. Under Prong 2, the additional element “ in response to an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, cause a graphics processing unit (GPU) to; generate, during execution by the GPU of the graph code, at least a portion of a descriptive representation of one or more portions of the graph code indicated to the API, wherein the one or more portions of graph code are executable by the GPU, and the descriptive representation includes descriptions of one or more node parameters of the one or more portions of the graph code ” are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component, or merely a generic computer or generic computer components to perform the judicial exception, Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f). Under Step 2B, the additional elements “ in response to an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, cause a graphics processing unit (GPU) to; generate, during execution by the GPU of the graph code, at least a portion of a descriptive representation of one or more portions of the graph code indicated to the API,”- this generally have been a mental process although the a graphics processing unit (GPU) could be a generic computer component if the spec describes it as actual computer hardware. “ the one or more portions of graph code are executable by the GPU, and the descriptive representation includes descriptions of one or more node parameters of the one or more portions of the graph code” ” - this is mere instructions to apply the mental process under mpep 2106.05(f), amounts to merely generally linking the use of the judicial exception to a particular technological environment or field or use, and is merely applying the judicial exception, therefore, does not amount to significantly more, hence, cannot provide an inventive concept. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application. See MPEP 2106.05(d). Thus, the claim is not patent eligible. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5.Claim(s) 1, 13, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) and further in view of Wilton( US 11775363 B1). As to claim 1, Raiman teaches circuitry one or more circuits to, in response to cause an application programming interface (API) call, cause a graphics processing unit (GPU) to generate at least a portion of a descriptive representation of the one or more portions of graph code indicated to the API, wherein the one or more portions of graph code are executable by the GPU( ( FIG. 11 illustrates an example machine of a computer system within which a set of instructions, for causing the machine to perform any one or more of the methodologies discussed herein, may be executed, col 19, ln 65-67/ he computer system 1100 may further include a network interface device 1008 to communicate over the network 1120. The computer system 1000 also may include a video display unit 1110 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device 1112 (e.g., a keyboard), a cursor control device 1144 (e.g., a mouse), a graphics processing unit 1122[GPU], a signal generation device 1116 (e.g., a speaker), graphics processing unit 1122[GPU], , col 20, ln 42-51/ more special-purpose processing devices such as an application specific integrated circuit (ASIC), col 30, ln 30-40/ he system 100 then performs a device-specific optimization process of the JIT blocks based on the target device (e.g., CPU, GPU, TPU, etc.) upon which the kernel will be performed (block 270), col 5-9-15/ The system 100 performs an optimization process to determine an approach to process the JIT blocks on the one or more GPUs and/or CPUs, col 15 ln 47-51/ The system 100 compiles the comprehensive set of code strings to generate machine code that may be performed by one or more GPUs, and/or CPUs, col 18, n 45-50/ The GPU code is considered device code which is executed on a GPU with device variables residing in GPU memory. In some embodiments, the system 100 may solely generate device code for performing the operations of a JIT block, col 19, ln 55-60/ The system 100[API] may include an API where particular operations and a referenced library may be defined. This API allows the system 100 to define the registry with the identified operations and the one or more libraries that may be used perform the operation, col 4, ln 62-57/ The system 100 evaluates the input graph in a top-down manner where the top is considered the root of the input graph, and down direction are the leaves of the input graph. The system 100 builds up a hash identity for each local node using its type. For example, the hash identity may include a string for the name of the node's operation (such as an addition, multiplication, control flow, matrix multiply, etc.). The system 100 uses the hashing of the string using a shift in XOR of the character integers thereby creating an identify for the name. Additional information for the dimensionalities for the node (e.g., 1-d, 2-d, 3-d, n-d) may be included. Each of the node of the input graph has associated with it a dimensionality to describe its shape. This information can be used to create a more unique identifier associated with the node. Each node of the input graph also may have an API that allows the node to specify additional meta-data when its being hashed. This additional information allows the system 100 to hash on this information as well to create a unique identifier for the node. For example, if the node handles memory storage, the node may have a boolean to identify whether the node is using strided or contiguous memory. In another example, if the node handles casting to a different data type, such as converting numbers from a float to an integer representation. The system 100 may add to the hash values related to the precision of the integer representation or the type of casting that is going to be by the node where the node specifies the type of truncation (e.g., values 1, 2 or 3 to specify the type of truncation). The hashing process thereby creates a local hashed identify for each of the nodes of the input graph. The system 100 may store the collective local hashed identify on a data store, col 13, ln 2-32/ the system 100 may compare hash values for the first hashed input graph to a second hashed input graph. The system 100[API] may take the local identity of each of the nodes in the manner in which they are stored, and compare the root node and respective child nodes to determine whether each of the local identities of nodes of the first input graph match the local identities of nodes of the second input graph. If the local identities of the nodes of both graphs match, col 13, ln 35-42/ the system 100 may use a library of pre-written and/or pre-compiled code to perform the operation of a respective node of the graph, col 10, ln 45-50/ col 18, ln 65-67), and the descriptive representation includes one or more parameters to the one or more portions of graph code( the system 100 builds up a hash identity for each local node using its typr. For example, the hash identity may include a string for the name of the node's operation (such as an addition, multiplication, control flow, matrix multiply, etc.). The system 100 uses the hashing of the string using a shift in XOR of the character integers thereby creating an identify for the name. Additional information for the dimensionalities for the node (e.g., 1-d, 2-d, 3-d, n-d) may be included. Each of the node of the input graph has associated with it a dimensionality to describe its shape. This information can be used to create a more unique identifier associated with the node. Each node of the input graph also may have an API that allows the node to specify additional meta-data when its being hashed. This additional information allows the system 100 to hash on this information as well to create a unique identifier for the node., col 13, ln 5-20/ The system 100 may add to the hash values related to the precision of the integer representation or the type of casting that is going to be by the node where the node specifies the type of truncation (e.g., values 1, 2 or 3 to specify the type of truncation), col 13, ln 25-30/ The first type of string associated with a particular node may describe some header file for a library that needs to be included in the generated GPU code so that a particular operation for the node may be performed, col 19, ln 1-5). Rabinowitz teaches an application programming interface (API) call, cause a generating during execution by the graphics processing unit (GPU) of the graph code to generate at least a portion of a descriptive representation of the one or more portions of graph code indicated to the API (The routing graph subtrees might be implemented on different computing environments. These environments may differ by the computer hardware used, for example having different types of processors, including different CPU types, GPU (graphic processing unit) processors, FPGA (Field-Programmable Gate Array), or specialized processors, col 30, ln 42-50/ The routing graph subtrees might be implemented on different computing environments. These environments may differ by the computer hardware used, for example having different types of processors[GPU], including different CPU types, GPU (graphic processing unit) processors, col 30. 42-48/ or brevity, henceforth the term “ processing unit” is used to mean one or more hardware processors, col 12,l n 30-31/ Reference is now made again to FIG. 2. In some embodiments, processing unit 401[GPU] generates the description of the plurality of execution nodes. In such embodiments, generating the description of the plurality of execution nodes comprises receiving from a user description data describing the plurality of execution nodes. Processing unit 401 may store the generated description in a file on one or more non-volatile digital storage 402. Processing unit 401 may receive the description data via a file. Optionally, the file comprises text. Optionally, the file is formatted according to a programming language, for example JSON or Python. Processing unit 401[API] can execute an application programming interface (API) for receiving the description data from the user. In some embodiments, processing unit , col 39, ln 19-31/ As an example, the description of routing graph 100 comprises for RN 101 an association with RN 102 indicative of parent-child relationship 110A., col 26, ln 53-56/ the at least one hardware processor[API]receives the description data via at least one of: a file, an application programming interface (API) executed by the at least one hardware processor, and a user interface executed by the at least one hardware processor, col 6, ln 63-67/ executing the software program, one or more hardware processors[API] may be adapted for generating the routing graph run-time structure, including the plurality of execution nodes, according to a description thereof. The description of the plurality of execution nodes may comprise for each of the plurality of execution nodes an association between the execution node and a plurality of child nodes of the execution node. In some embodiments, for each of the plurality of data-processing nodes the description comprises a processing function of the software program, col 14, ln 22-32/ plurality of execution nodes is organized in a directional acyclic graph (routing graph) having one root node of the plurality of routing nodes such that each of the plurality of execution nodes not the root node has a parent node of the plurality of routing nodes, each of the plurality of routing nodes has a plurality of child nodes of the plurality of execution nodes, col 7, ln 10-20/ The plurality of execution nodes may comprise a plurality of routing nodes, for delivering program data between the plurality of data-processing nodes, for example RN 101, RN 102, RN 103, RN 104 and RN 105. In some embodiments, the plurality of execution nodes is organized in routing graph 100. Routing graph 100 could be an executable graph, indicative of an order in which one or more of the plurality of execution nodes should be executed by processing unit 401, col 16, ln 55-65). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this allows to visualize and simulate a flow of events in the software program, separate from specific data processing steps taking place. The effect is a significant streamlining of the main aspects of software applications development, from application design to coding, maintenance and operations. Surkatty teaches an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, generate, during execution by the GPU of the graph code indicated to the API, at least a portion of a descriptive representation of one or more portions of the graph code indicated to the API ( The software testing service 302 may obtain, for the API 306, a set of schema 310 corresponding to the API calls 308. In one embodiment, the schema 310 may be included as part of the API 306 or API calls 308—for example, the schema 310 may be metadata or data included in or attached to the respective API calls 308, col 6, ln 60-67/ analyze a set of schema 504 to determine one or more API call dependencies corresponding to edges between nodes in a representation., col 10, ln 5-10/ generates a representation 212 of dependency relationships of the API calls of the API 204 based at least in part on schema associated with the API calls, col 5, ln 20-25/ The testing service may generate dependency information[portion] by at least determining dependencies between the API calls using the schema by determining matches between constraints of API calls, col 2, ln 10-17/ analyze a set of schemata 504 to determine one or more API call dependencies[portion] corresponding to edges between nodes[portion of graph code] in a representation, col 10, ln 5-10/ A second rule of the rules 508 may define a dependency[portion] between a pair of resources based on a similarity in a pattern associated with the input/output schemas of API calls. For instance, the argument of the output schema 512 of the OpFoo API call schema 510A is similar to an input schema 518 of a CreateBaz API call schema 510C. The representation generation service 502 may therefore determine that an API call dependency 520 exists between the OpFoo API call and the CreateBaz API call[portion of graph code]., col 10, ln 45-55/ FIG. 6 shows an initial representation 600 generated by a representation generation engine of a software testing service in accordance with one or more embodiments described herein. The initial representation 600 may be generated as a result of identification of the resource schemas, identification of the origin nodes, and determination of the resource dependences, as described above with respect to FIGS. 3, 4, and 5, respectively, col 11,l n 20-27/ graphics processor unit may execute other of the instruction, col 25, ln 23-25); the descriptive representation includes descriptions of one or more node parameters of the one or more portions of the graph code indicated to the API( generate a graph representation or equivalent structure illustrating or describing relationships between the representing dependency relationships between the API calls. The graph representation may be implemented using a table, a matrix, a set of matrices, one or more systems of equations, a tree or set of trees and/or a combination of such similar structures that show the dependency relationships. The graph representation may include nodes corresponding to the API calls and edges corresponding to the dependency relationships between the API calls. Some of the nodes may be origin nodes corresponding to API calls that do not have a dependency on another API call, col 2, ln 23-37). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this meets the ever-growing demand of consumer needs, the pace at which software is developed is rapidly increasing. Wilton teaches in response to an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, generate, during execution by the GPU of the graph code indicated to the API( when executed by the processor, cause the processor to perform steps for auditing a graph-based API. The steps include obtaining a structure of an API describing object types defined by the API and fields associated with the object types where each field has a field name and a field resolution type. The steps further include generating a schema graph based on the structure, col 1, ln 60-67 to col 2, ln 1-5/ FIG. 3B illustrates an API structure of an example API, in accordance with an embodiment. The API structure 300 of the example in FIG. 3B specifies four types of objects. The specified objects include object type “A” 310A, object type “B” 310B, object type “C” 310C, and root type “Query” 315. The root type 315 may be a special type of object that provides access to the schema of other object types 310, and may be used, for example to present introspection results about the API. , col 9, ln 31-40/ FIG. 3A illustrates a schema for an object type specified in an example API, in accordance with an embodiment. In some embodiments, APIs (e.g., graph based APIs like GRAPHQL) specify one or more object types that describe the structure of object data that can be accessed in a database via calls to the API and may also be used as a query language for aggregating data across multiple remote services or APIs. To request information stored in a database, a user may query the database requesting values of fields of a specific object and in response the database returns the field values stored for the object., col 9, ln 8-20/ Based on the obtained API information, the audit system generates a schema graph. The schema graph represents a data structure of object types and fields included in the API., col 6, ln 23-27/ defines the structure of calls made to the API and also defines what parameters are available as valid inputs and outputs to API function calls, col 3, ln 55-60/ FIG. 4 illustrates an example schema graph for the API structure of FIG. 3B, in accordance with an embodiment. The schema graph generator 210 generates a schema graph, such as an schema graph 400 based on the API structure 300. The schema graph 400 includes nodes that are labeled with object types 310. The nodes represent the object types 310 specified in the API structure 300. The schema graph also includes a node representing a root type object 315. In one embodiment, a schema graph 400 begins at a single node representing a root type object 315, from which nodes representing other object types 310 may be accessed via edges of the schema graph 400. A schema graph may also include one or more nodes representing scalar type objects 330. In this way, the schema graph 400 provides a graphical representation of the API structure 300, col 9, ln 67-67 to col 9, ln 1-10/ The line graph generator 220 constructs line graphs based on schema graphs produced by the schema graph generator 210. In one embodiment, a line graph is a graph with a node for each of the edges of the schema graph and an edge for each of the nodes of the schema graph, not including any root node, col 7, ln 1-20/ the schema graph generator 210 generates a schema graph that represents the API structure of the API. In one embodiment, a schema graph is a graph that includes a node for each object type described by the API and directed edges that connect the nodes representing resolution of fields of the objects as specified by the API…. the line graph generator 220 constructs line graphs based on schema graphs produced by the schema graph generator 210. In one embodiment, a line graph is a graph with a node for each of the edges of the schema graph and an edge for each of the nodes of the schema graph, not including any root node, col 7, ln 3-20/ computer system 900 includes one or more processing units (generally processor 902). The processor 902 is, for example, a central processing unit (CPU), a graphics processing unit (GPU), col 15, ln 13-17). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this obtains a structure of an API describing object types defined by the API and fields associated with the object types where each field has a field name and a field resolution type. As to claims 13, 19, they are rejected for the same reasons as to claim 1 above. In additional, Raiman teaches a non-transitory computer-readable medium. The memory and non-transitory medium, col 3, ln 7-10). 6. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view HUANG( US 20210209008 A1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of ITANI(US 20160054982 A1). As to claim 2, Huang teaches in response to the API call to receive one or more parameter values( para[0019]) and parse the one or more portions of graph code based, at least in part, on the one or more parameter values to generate the descriptive representation ( The test cases are automatically generated according to the unit testing method based on the automatic generation of the path coverage test cases, and a tester does not need to spend a lot of energy and do a lot of repetitive works to design the test cases any more. According to an input source code to be tested, the software may automatically perform analysis and generate the test report, thus greatly improving a testing efficiency, para[0029]/ Further, in steps (b) and (c), during the syntactic analysis, the syntactic analysis is performed on the source code by recursive descent analysis thus assisting construction of the control flow graph, and the control flow graph which is generated by parsing the source program is systematically constructed according to requirements of the automatic test case generation algorithm through steps (b) and (c), thus automatically generating the control flow graph. Further, in steps (d) and (e), the generated control flow graph is drivable, which means that the control flow graph is able to automatically execute the executable code in the node according to the generated test case, and then automatically select next node according to an execution result of the code, thus automatically generating a path in the control flow graph, para[0023]/ para[0024]). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this improves a software testing efficiency, reducing a software testing cost and having an excellent effect. ITANI teaches the one or more circuits are further to parse the graph code based, at least in part, on one or more parameter to generate at least a portion of the descriptive representation( the API engine 25 generates an action dependency graph representing the combined first set of reusable programming actions and the second set of reusable programming actions. The API engine 25 then transforms extensible markup language (XML) of the action dependency graph into an action graph object and iterates through each action in the action graph object to build dependencies (or pre-requisites). As an illustrative example, an action graph or object graph can be a view of API objects at a particular point in time. Action graph objects may be linked to each other by one object either owning or containing another object or holding a reference to another object. This web of objects can be called an action graph, para[0039]) . It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate of the one or more circuits are further to parse the graph code based, at least in part, on one or more parameter values to generate the descriptive representation because this is able to combine different sets of reusable programming actions. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Lavasani(US 20220283826 A1). As to claim 3, Lavasani teaches descriptive representation is a textual representation( At operation 214, the computer implemented method can detect when the html graph for the website application changes to an updated html graph and if so the method proceeds to return to some of the above operations (e.g., operations 204, 210) in order to automatically generate, with the graph neural network, an updated labeled html graph based on the updated html graph and the appropriate DSG, para[0056]). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of descriptive representation is a textual representation because this obtains the html graph for the web application. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) in view HUANG( US 20210209008 A1) and further in view of Bardasz( US 5689711 A). As to claim 4, Huang teaches parameter value received by api ( para[0019], ln 3-8) for the same reason as to claim 2 above. Bardasz teaches cause an API to generate the descriptive representation in a second location one or more locations indicated by a parameter value received by associated with the API( the associative API processor 71 queries each of the application entities that represents an argument to determine whether and where in the graph each argument is represented. Since none of the arguments was previously represented in the graph, each of the application entities representing one of the arguments includes a nil value in its data object pointer. Upon reading these nil pointers, the API processor 71 creates a new graph entity to represent a data object for each argument, and instructs each of the argument application entities to set its data object pointer to the memory location of its newly created graph entity, col 15, ln 10-21). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the above feature because this provides the organization of the program is easily understood by the user, allows for easy modification of the program, even if the user does not have significant computer programming experience and allow a user to graphically generate and edit the dependency graph. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of White(US 20200104970 A1). As to claim 5, White teaches teach the one or more circuits are further to cause one or more graphics processing units (GPUs) (The ability to control the GPU closely through a published low level graphics framework 106 provides advantages that may facilitate a more orderly rendering path while allowing application 102 to use a high level graphics framework 104 to interface with a system's graphics capabilities. In one or more embodiments, the high level graphics framework 104 represents a render graph API that generates render graph assets based on data-driven and/or a code-driven operations. For each frame of a scene, the render graph API is able to break up rendering into a collection of interconnected render graphs. Each of the render graphs includes a collection of nodes, where each node consist of a setup and execute function associated with a render or computer operation, para[0021]). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this produces rendering pipelines that accommodate a variety of systems and/or graphics application may be beneficial in improving processing time and latency. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Dubey(US 11210143 B1). As to claim 6, Dubey teaches the API is a runtime API( receiving an API call to create a new workflow, the runtime API 112 may generate a workflow graph and/or context to be stored by the data store 108. One or more clients (e.g., executing on user device 102) may perform one or more workflow steps to update the workflow by invoking the runtime API 112 to generate a runtime workflow instance of the workflow (e.g., loading the existing workflow graph and/or context). The runtime workflow instance may then update the workflow context and/or workflow graph as it executes (e.g., on the workflow platform 11) one or more workflow steps on behalf of the calling client or host, col 13, ln 25-37). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate of generate the descriptive representation in one or more locations indicated by a parameter value associated with the API because this enables synchronous and/or asynchronous workflows. Claim(s) 7, 24 are rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Kovvuri( US 20190286973 A1). As to claim 7, it is rejected for the same reason as to claim 1 above. In additional, Kovvuri teaches, processor GPU is accelerator( A hybrid approach using a general-purpose processor coupled to a graphics processor unit (GPU) and/or with programmable hardware can provide a speed-up over a general-purpose processor by itself. The hardware accelerator (e.g., the GPU and/or the programmable hardware) can potentially accelerate performance for tasks that are executed on the accelerator, para[0019], ln 15-23). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this enables the most appropriate hardware to execute a given subgraph, a system can potentially have higher performance than systems where the individual subgraphs are not individually assignable to different types of hardware. As to claim 24, Kovvuri teaches herein the GPU is an accelerator (para[0019], ln 15-23) for the same reason as to claim 7 above. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Kovvuri( US 20190286973 A1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) in view of White(US 20200104970 A1) and further in view of Ring(US 20050193428 A1). As to claim 8, White teaches the one or more processors are further to: obtain one or more characteristics based at least in part on one or more parameter values; and generate the descriptive representation based at least in part on the one or more characteristics( para[0032]) . It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this produces rendering pipelines that accommodate a variety of systems and/or graphics application may be beneficial in improving processing time and latency. Ring teaches receive one or more parameter values; obtain one or more characteristics of the one or more portions of graph code based at least in part on the one or more parameter values; and generate the descriptive representation based at least in part on the one or more characteristics( "non-public" kernel attacks that do not operate by patching the system call table. One possible approach for doing this is to expand the kernel healing to implement a call graph table trace of all possible malicious patch points. For instance, the address of the system call will be determined through the approach demonstrated above. The function pointed to by the address will then be inspected to identify all assembly "CALL" or "JUMP" instructions. The address of each call will be recursively followed for their list of "CALL" or "JUMP" instructions. Eventually an exhaustive graph of all possible calls will be generated for each system call address. This graph can be inspected for addresses that fall outside the trusted kernel memory range, and their subsequent calling function can be repaired. Implementing this graphing capability should provide a mechanism to recover from all kernel modifications. It should be noted, however, that the success of this capability will be determined by the ability to determine replacement or recovery addresses for the modified functions, para[0049]). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the above feature because this rises to a further need to provide an improved and more intuitive approach to operating system restoration following an exploit. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Kovvuri( US 20190286973 A1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of White(US 20200104970 A1). As to claim 9, White teaches one or more portion of the graph code indicates one or more operations and dependencies among the one or more operations(At a next lower programming level, the render graph API provides access to the backend render engine so that a developer is able to write code for managing a collection of nodes of the render graph. Each of the nodes consist of a setup and execute function that declare target usage and dependencies (e.g., setup function) and resolves target handles into textures and performs graphics commands (e.g., execute function), para[0016], ln 21-28). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this produces rendering pipelines that accommodate a variety of systems and/or graphics application may be beneficial in improving processing time and latency 14 . Claims 10, 23 are rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) in view of Kovvuri( US 20190286973 A1) and further in view of Wells( US 9804886 B1). As to claim 10, Wells teaches in response to the API to obtain a status indication API service 132 can generate a graph projection of the API including any extensions usable by the specific client device. If an application executing on client device 120 attempts to use an API extension that is not included in the graph projection (e.g., an API extension that is not available for use by client device 120), API service 132 can generate an error to indicate that the requested API extension is not available for use by client device 120, col 7, ln 15-25). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate of obtain a status indication as a result of performing the API because this indicates status definition provided to API extender. As to claim 23, Wells teaches comprising obtaining an indication of a status corresponding to the API(col 7, ln 15-25) for the same reason as to claim 10 above . Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Kovvuri( US 20190286973 A1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of HIROTA(DE 102020101814 A1). As to claim 11, HIROTA teaches using one or more parallel processing units (PPUs)( Parallel Processing Units (PPUs) are able to achieve very high processing power by executing a large number of threads in parallel on dedicated programmable hardware processing units. Some PPUs provide an application programming interface (“API”) that allows developers to specify a workload as a graph of dependencies called a “task graph”. Each node in the task graph is a task to be performed by one or more of the hardware processing units, Sec: Description of the prior art, ln 1-20). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of using one or more parallel processing units (PPUs) because this reduces the latency between the completion of the producer task and the start of the consumer task. Claims 12, 18 are rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Kovvuri( US 20190286973 A1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Cyr(US 20200293388 A1). As to claim 12, Cyr teaches teach the descriptive representation is an image representation(The API module 516 can also perform a graph retrieve operation 544 that transforms retrieved data into an image file of a graph. To illustrate, FIG. 9B depicts an example of an image file 904 of a graph 906 generated by the API module 516. The API module 516 can also perform a chart retrieve operation 546 that transforms retrieved data into an image file of a chart, para[0045], ln 11-16). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate of the descriptive representation is an image representation because this renders a visualization that corresponds to an image of one of a chart, a graph, a map, or HTML text. As to claim 18, Cyr teaches the descriptive representation is represented as one or more files( para[0045]) for the same reason as to claim 12 above. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Lalic(US 10824482 B1). As to claim 14, Lalic teaches wherein the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to generate the descriptive representation that encodes one or more values of one or more portion of the graph code( Specifically, a remote applications API 250 evaluates the process nodes 232-240 of the graph 230, generates a remote operation object encoding the conditional graph into a series of operations. In the given example graph 230, the code for the series of operations in the remote operation object 250 may be shown as below, col 5, ln 61-67 to col 6, ln 1-2). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of wherein the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to generate the descriptive representation encoding one or more values of the graph code because this determines one or more conditional operations, generating a remote operations graph based on the conditional operations. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) view HUANG( US 20210209008 A1) and further in view of Lalic(US 10824482 B1). As to claim 20, Huang teaches obtaining one or more values from the one or more portions of graph code based on one or more parameter values received by associated with the API ( The test cases are automatically generated according to the unit testing method based on the automatic generation of the path coverage test cases, and a tester does not need to spend a lot of energy and do a lot of repetitive works to design the test cases any more. According to an input source code to be tested, the software may automatically perform analysis and generate the test report, thus greatly improving a testing efficiency, para[0029]/ Further, in steps (b) and (c), during the syntactic analysis, the syntactic analysis is performed on the source code by recursive descent analysis thus assisting construction of the control flow graph, and the control flow graph which is generated by parsing the source program is systematically constructed according to requirements of the automatic test case generation algorithm through steps (b) and (c), thus automatically generating the control flow graph.Further, in steps (d) and (e), the generated control flow graph is drivable, which means that the control flow graph is able to automatically execute the executable code in the node according to the generated test case, and then automatically select next node according to an execution result of the code, thus automatically generating a path in the control flow graph, para[0023]/ para[0024]). It would have been obvious to one of the ordinary skill in the art before the effective fling date of claimed invention was made to modify the above teaching to incorporate the above feature because this improves a software testing efficiency, reducing a software testing cost and having an excellent effect. and Lalic teaches obtaining one or more values from the graph code based on one or more parameter values associated with the API; and encoding the one or more values in the descriptive representation(col 5, ln 61-67 to col 6, ln 1-2). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of wherein the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to generate the descriptive representation encoding one or more values of the graph code because this determines one or more conditional operations, generating a remote operations graph based on the conditional operations. Claims 15, 16, 21 are rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Surkatty(US 10540270 B1). As to claim 15, Surkatty teaches in response to API generate a set of descriptive representations(service API calls to inputs of the set of web service API calls to determine a set of matches by at least comparing an output schema of a first web service API call with an input schema of second web service API; using the set of matches to generate a graph representation of the set of web service API calls that indicates dependencies between the set of web service API calls, wherein the graph representation includes a set of edges that correspond to dependency relationships between a subset of the set of web service API calls, col 26, ln 6-20). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of generate a set of descriptive representations of the graph code. Because this provides dependencies between the API calls are determined using the information and a representation is generated using the dependencies. As to claim 16, Surkatty teaches the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to cause one or more central processing units (CPUs) to generate the descriptive representation or one or more portion of the graph code( col 23, ln 15-26) for the same reason as to claim 15 above. As to claim 21, Surkatty teaches the descriptive representation indicates at least a topology associated with the graph code(col 26, ln 6-20) for the same reason as to claim 15 above. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of Voccio(US 20140211665 A1). As to claim 17,Voccio teaches the graph code encodes one or more kernels; and the descriptive representation indicates information associated with the one or more kernels( call flow graph may be used to capture and represent causal relationships between processing activities of various components. That is, a call flow graph may encode how a processing activity of one or more components may be caused or triggered by a processing activity of one or more other components, para[0102], ln 5-12). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of the graph code encodes one or more kernels; and the descriptive representation indicates information associated with the one or more kernels because this constructs a call flow graph within each service and between services of the could computing system. Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Raiman(US 10901715 B1) in view of Rabinowitz(US 11334475 B1) in view of Surkatty( US 10540270 B1) in view of Wilton( US 11775363 B1) and further in view of ABDO( CN 102239483 A). As to claim 22, ABDO teaches API is a driver API( the user mode driver (42 from the application programming interface (420) for receiving application program for creating graph element interface structure, and by the user mode driver G22) generates vertices for primitives, claim 2, ln 1-5). It would have been obvious to one of the ordinary skill in the art before the effective filling date of claimed invention was made to modify the above teaching to incorporate the feature of API is a driver API because this analyzes the command stream for creating graph element. Response to the argument: A. Applicant amendment filed on 12/24/2025 has been considered but they are not persuasive: Applicant argued in substance that : (1) “ Applicant respectfully submits that each of Raiman and Rabinowitz, viewed individually or in combination, fail to teach or suggest "to, in response to an call comprising one or more parameters indicative of one or more portions of graph code, cause to: generate, during execution by the GPU of the graph code indicated to the API, at least a portion of a descriptive representation of one or more portions of the graph code indicated to the API, wherein the descriptive representation includes descriptions of one or more node parameters of the one or more portions of the graph code indicated to the API."” B. Examiner respectfully disagreed with Applicant's remarks: As to the point (1), Raiman teaches circuitry one or more circuits to, in response to cause an application programming interface (API) call, cause a graphics processing unit (GPU) to generate at least a portion of a descriptive representation of the one or more portions of graph code indicated to the API, wherein the one or more portions of graph code are executable by the GPU( ( FIG. 11 illustrates an example machine of a computer system within which a set of instructions, for causing the machine to perform any one or more of the methodologies discussed herein, may be executed, col 19, ln 65-67/ he computer system 1100 may further include a network interface device 1008 to communicate over the network 1120. The computer system 1000 also may include a video display unit 1110 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device 1112 (e.g., a keyboard), a cursor control device 1144 (e.g., a mouse), a graphics processing unit 1122[GPU], a signal generation device 1116 (e.g., a speaker), graphics processing unit 1122[GPU], , col 20, ln 42-51/ more special-purpose processing devices such as an application specific integrated circuit (ASIC), col 30, ln 30-40/ he system 100 then performs a device-specific optimization process of the JIT blocks based on the target device (e.g., CPU, GPU, TPU, etc.) upon which the kernel will be performed (block 270), col 5-9-15/ The system 100 performs an optimization process to determine an approach to process the JIT blocks on the one or more GPUs and/or CPUs, col 15 ln 47-51/ The system 100 compiles the comprehensive set of code strings to generate machine code that may be performed by one or more GPUs, and/or CPUs, col 18, n 45-50/ The GPU code is considered device code which is executed on a GPU with device variables residing in GPU memory. In some embodiments, the system 100 may solely generate device code for performing the operations of a JIT block, col 19, ln 55-60/ The system 100[API] may include an API where particular operations and a referenced library may be defined. This API allows the system 100 to define the registry with the identified operations and the one or more libraries that may be used perform the operation, col 4, ln 62-57/ The system 100 evaluates the input graph in a top-down manner where the top is considered the root of the input graph, and down direction are the leaves of the input graph. The system 100 builds up a hash identity for each local node using its type. For example, the hash identity may include a string for the name of the node's operation (such as an addition, multiplication, control flow, matrix multiply, etc.). The system 100 uses the hashing of the string using a shift in XOR of the character integers thereby creating an identify for the name. Additional information for the dimensionalities for the node (e.g., 1-d, 2-d, 3-d, n-d) may be included. Each of the node of the input graph has associated with it a dimensionality to describe its shape. This information can be used to create a more unique identifier associated with the node. Each node of the input graph also may have an API that allows the node to specify additional meta-data when its being hashed. This additional information allows the system 100 to hash on this information as well to create a unique identifier for the node. For example, if the node handles memory storage, the node may have a boolean to identify whether the node is using strided or contiguous memory. In another example, if the node handles casting to a different data type, such as converting numbers from a float to an integer representation. The system 100 may add to the hash values related to the precision of the integer representation or the type of casting that is going to be by the node where the node specifies the type of truncation (e.g., values 1, 2 or 3 to specify the type of truncation). The hashing process thereby creates a local hashed identify for each of the nodes of the input graph. The system 100 may store the collective local hashed identify on a data store, col 13, ln 2-32/ the system 100 may compare hash values for the first hashed input graph to a second hashed input graph. The system 100[API] may take the local identity of each of the nodes in the manner in which they are stored, and compare the root node and respective child nodes to determine whether each of the local identities of nodes of the first input graph match the local identities of nodes of the second input graph. If the local identities of the nodes of both graphs match, col 13, ln 35-42/ the system 100 may use a library of pre-written and/or pre-compiled code to perform the operation of a respective node of the graph, col 10, ln 45-50/ col 18, ln 65-67), and the descriptive representation includes one or more parameters to the one or more portions of graph code( the system 100 builds up a hash identity for each local node using its typr. For example, the hash identity may include a string for the name of the node's operation (such as an addition, multiplication, control flow, matrix multiply, etc.). The system 100 uses the hashing of the string using a shift in XOR of the character integers thereby creating an identify for the name. Additional information for the dimensionalities for the node (e.g., 1-d, 2-d, 3-d, n-d) may be included. Each of the node of the input graph has associated with it a dimensionality to describe its shape. This information can be used to create a more unique identifier associated with the node. Each node of the input graph also may have an API that allows the node to specify additional meta-data when its being hashed. This additional information allows the system 100 to hash on this information as well to create a unique identifier for the node., col 13, ln 5-20/ The system 100 may add to the hash values related to the precision of the integer representation or the type of casting that is going to be by the node where the node specifies the type of truncation (e.g., values 1, 2 or 3 to specify the type of truncation), col 13, ln 25-30/ The first type of string associated with a particular node may describe some header file for a library that needs to be included in the generated GPU code so that a particular operation for the node may be performed, col 19, ln 1-5). Rabinowitz teaches an application programming interface (API) call, cause a generating during execution by the graphics processing unit (GPU) of the graph code to generate at least a portion of a descriptive representation of the one or more portions of graph code indicated to the API (The routing graph subtrees might be implemented on different computing environments. These environments may differ by the computer hardware used, for example having different types of processors, including different CPU types, GPU (graphic processing unit) processors, FPGA (Field-Programmable Gate Array), or specialized processors, col 30, ln 42-50/ The routing graph subtrees might be implemented on different computing environments. These environments may differ by the computer hardware used, for example having different types of processors[GPU], including different CPU types, GPU (graphic processing unit) processors, col 30. 42-48/ or brevity, henceforth the term “ processing unit” is used to mean one or more hardware processors, col 12,l n 30-31/ Reference is now made again to FIG. 2. In some embodiments, processing unit 401[GPU] generates the description of the plurality of execution nodes. In such embodiments, generating the description of the plurality of execution nodes comprises receiving from a user description data describing the plurality of execution nodes. Processing unit 401 may store the generated description in a file on one or more non-volatile digital storage 402. Processing unit 401 may receive the description data via a file. Optionally, the file comprises text. Optionally, the file is formatted according to a programming language, for example JSON or Python. Processing unit 401[API] can execute an application programming interface (API) for receiving the description data from the user. In some embodiments, processing unit , col 39, ln 19-31/ As an example, the description of routing graph 100 comprises for RN 101 an association with RN 102 indicative of parent-child relationship 110A., col 26, ln 53-56/ the at least one hardware processor[API]receives the description data via at least one of: a file, an application programming interface (API) executed by the at least one hardware processor, and a user interface executed by the at least one hardware processor, col 6, ln 63-67/ executing the software program, one or more hardware processors[API] may be adapted for generating the routing graph run-time structure, including the plurality of execution nodes, according to a description thereof. The description of the plurality of execution nodes may comprise for each of the plurality of execution nodes an association between the execution node and a plurality of child nodes of the execution node. In some embodiments, for each of the plurality of data-processing nodes the description comprises a processing function of the software program, col 14, ln 22-32/ plurality of execution nodes is organized in a directional acyclic graph (routing graph) having one root node of the plurality of routing nodes such that each of the plurality of execution nodes not the root node has a parent node of the plurality of routing nodes, each of the plurality of routing nodes has a plurality of child nodes of the plurality of execution nodes, col 7, ln 10-20/ The plurality of execution nodes may comprise a plurality of routing nodes, for delivering program data between the plurality of data-processing nodes, for example RN 101, RN 102, RN 103, RN 104 and RN 105. In some embodiments, the plurality of execution nodes is organized in routing graph 100. Routing graph 100 could be an executable graph, indicative of an order in which one or more of the plurality of execution nodes should be executed by processing unit 401, col 16, ln 55-65). Surkatty teaches an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, generate, during execution by the GPU of the graph code indicated to the API, at least a portion of a descriptive representation of one or more portions of the graph code indicated to the API ( The software testing service 302 may obtain, for the API 306, a set of schema 310 corresponding to the API calls 308. In one embodiment, the schema 310 may be included as part of the API 306 or API calls 308—for example, the schema 310 may be metadata or data included in or attached to the respective API calls 308, col 6, ln 60-67/ analyze a set of schema 504 to determine one or more API call dependencies corresponding to edges between nodes in a representation., col 10, ln 5-10/ generates a representation 212 of dependency relationships of the API calls of the API 204 based at least in part on schema associated with the API calls, col 5, ln 20-25/ The testing service may generate dependency information[portion] by at least determining dependencies between the API calls using the schema by determining matches between constraints of API calls, col 2, ln 10-17/ analyze a set of schemata 504 to determine one or more API call dependencies[portion] corresponding to edges between nodes[portion of graph code] in a representation, col 10, ln 5-10/ A second rule of the rules 508 may define a dependency[portion] between a pair of resources based on a similarity in a pattern associated with the input/output schemas of API calls. For instance, the argument of the output schema 512 of the OpFoo API call schema 510A is similar to an input schema 518 of a CreateBaz API call schema 510C. The representation generation service 502 may therefore determine that an API call dependency 520 exists between the OpFoo API call and the CreateBaz API call[portion of graph code]., col 10, ln 45-55/ FIG. 6 shows an initial representation 600 generated by a representation generation engine of a software testing service in accordance with one or more embodiments described herein. The initial representation 600 may be generated as a result of identification of the resource schemas, identification of the origin nodes, and determination of the resource dependences, as described above with respect to FIGS. 3, 4, and 5, respectively, col 11,l n 20-27/ graphics processor unit may execute other of the instruction, col 25, ln 23-25); the descriptive representation includes descriptions of one or more node parameters of the one or more portions of the graph code indicated to the API( generate a graph representation or equivalent structure illustrating or describing relationships between the representing dependency relationships between the API calls. The graph representation may be implemented using a table, a matrix, a set of matrices, one or more systems of equations, a tree or set of trees and/or a combination of such similar structures that show the dependency relationships. The graph representation may include nodes corresponding to the API calls and edges corresponding to the dependency relationships between the API calls. Some of the nodes may be origin nodes corresponding to API calls that do not have a dependency on another API call, col 2, ln 23-37). Wilton teaches in response to an application programming interface (API) call comprising one or more parameters indicative of one or more portions of graph code, generate, during execution by the GPU of the graph code indicated to the API( when executed by the processor, cause the processor to perform steps for auditing a graph-based API. The steps include obtaining a structure of an API describing object types defined by the API and fields associated with the object types where each field has a field name and a field resolution type. The steps further include generating a schema graph based on the structure, col 1, ln 60-67 to col 2, ln 1-5/ FIG. 3B illustrates an API structure of an example API, in accordance with an embodiment. The API structure 300 of the example in FIG. 3B specifies four types of objects. The specified objects include object type “A” 310A, object type “B” 310B, object type “C” 310C, and root type “Query” 315. The root type 315 may be a special type of object that provides access to the schema of other object types 310, and may be used, for example to present introspection results about the API. , col 9, ln 31-40/ FIG. 3A illustrates a schema for an object type specified in an example API, in accordance with an embodiment. In some embodiments, APIs (e.g., graph based APIs like GRAPHQL) specify one or more object types that describe the structure of object data that can be accessed in a database via calls to the API and may also be used as a query language for aggregating data across multiple remote services or APIs. To request information stored in a database, a user may query the database requesting values of fields of a specific object and in response the database returns the field values stored for the object., col 9, ln 8-20/ Based on the obtained API information, the audit system generates a schema graph. The schema graph represents a data structure of object types and fields included in the API., col 6, ln 23-27/ defines the structure of calls made to the API and also defines what parameters are available as valid inputs and outputs to API function calls, col 3, ln 55-60/ FIG. 4 illustrates an example schema graph for the API structure of FIG. 3B, in accordance with an embodiment. The schema graph generator 210 generates a schema graph, such as an schema graph 400 based on the API structure 300. The schema graph 400 includes nodes that are labeled with object types 310. The nodes represent the object types 310 specified in the API structure 300. The schema graph also includes a node representing a root type object 315. In one embodiment, a schema graph 400 begins at a single node representing a root type object 315, from which nodes representing other object types 310 may be accessed via edges of the schema graph 400. A schema graph may also include one or more nodes representing scalar type objects 330. In this way, the schema graph 400 provides a graphical representation of the API structure 300, col 9, ln 67-67 to col 9, ln 1-10/ The line graph generator 220 constructs line graphs based on schema graphs produced by the schema graph generator 210. In one embodiment, a line graph is a graph with a node for each of the edges of the schema graph and an edge for each of the nodes of the schema graph, not including any root node, col 7, ln 1-20/ the schema graph generator 210 generates a schema graph that represents the API structure of the API. In one embodiment, a schema graph is a graph that includes a node for each object type described by the API and directed edges that connect the nodes representing resolution of fields of the objects as specified by the API…. the line graph generator 220 constructs line graphs based on schema graphs produced by the schema graph generator 210. In one embodiment, a line graph is a graph with a node for each of the edges of the schema graph and an edge for each of the nodes of the schema graph, not including any root node, col 7, ln 3-20/ computer system 900 includes one or more processing units (generally processor 902). The processor 902 is, for example, a central processing unit (CPU), a graphics processing unit (GPU), col 15, ln 13-17). Conclusion US 10540270 B1 teaches automated testing of software. Information characterizing a set of application programming interface (API) calls is associated with the software. Dependencies between the API calls are determined using the information and a representation is generated using the dependencies. US 11775363 B1 teaches A schema graph of the structure is generated including nodes representing object types. The nodes are connected by directed edges representing field resolution between object types. A line graph is generated and includes a node in place of each edge of the schema graph and edges in place of nodes of the schema graph. US 20170068693 A1 teaches An external content sharing system includes a graph server comprising an API engine, a graph index, and an activity processing and analytics engine. When a user selects to share external content via a user agent, the API engine receives an API call including a URL of the external content from the user agent. The API engine accesses the content, extracts metadata, and stores the metadata as a node in the graph index, where connections are made between the node and individuals who are socially close to the user. US 20200104970 A1 teaches At a top programming level, the render graph API is able to generate a render frame with data-driven render graphs by having the developer interface with a visual graph editor. The visual graph editor is a user interface (UI) for a developer to create and author a visual graph representation of a desired render frame and/or render graphs. The visual graph editor can also provide hooks for a developer to attach render graph assets to portions of a render frame. US 20220188170 A1 teaches The thread manager may determine that a cluster control plane does not exist for nodes, pods, or clusters whose configuration data to be modified is specified in an API request for a target node. This may happen, for example, because the tenant was idle for more than a predetermined period of time. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LECHI TRUONG whose telephone number is (571)272-3767. The examiner can normally be reached 10-8 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor Young Kevin can be reached on (571)270-3180. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LECHI TRUONG/Primary Examiner, Art Unit 2194
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Prosecution Timeline

Show 10 earlier events
Aug 19, 2025
Examiner Interview Summary
Sep 04, 2025
Response Filed
Sep 24, 2025
Final Rejection mailed — §101, §103
Dec 19, 2025
Applicant Interview (Telephonic)
Dec 20, 2025
Examiner Interview Summary
Dec 24, 2025
Request for Continued Examination
Jan 21, 2026
Response after Non-Final Action
Jul 01, 2026
Non-Final Rejection mailed — §101, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+36.8%)
3y 0m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 884 resolved cases by this examiner. Grant probability derived from career allowance rate.

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