DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see Remarks, filed 09/26/2025, with respect to the rejection(s) of claim(s) Claims 1-3 under 35 USC 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in further view of US 20210367084 A1 Boles et al.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over US 4740477 A Einthoven et al hereafter “Einthoven” and further in view of US 5930660 A Davis hereafter “Davis” and US 20150123138 A1 Kizilyalli et al hereafter “Kizilyalli” and US 20210367084 A1 Boles et al hereafter “Boles”.
Regarding claim 1 Einthoven teaches a semiconductor device (Fig. 8) comprising:
a mesa diode structure which includes a P-type semiconductor layer (P+ Fig. 8 and or 12 fig. 7), a first N-type semiconductor layer (N- Fig. 8 and 24 fig. fig. 6), and a second N-type semiconductor layer (N+ Fig. 8 and/or 16 fig. 7)
a protective layer (26 fig. 8, 7, and 6) arranged on a side wall (left and right side) around the mesa diode structure seen in a plane [illustrated in figs 6-8];
a first electrode (32 fig. 8, met under broadest reasonable interpretation a “metallization layer” qualifies as an “electrode”) arranged on a top surface of the second N-type semiconductor layer; and a second electrode (34 fig. 8, met under broadest reasonable interpretation a “metallization layer” qualifies as an “electrode”) arranged on a bottom surface of the P-type semiconductor layer;
wherein:
the first N-type semiconductor layer is laminated on the P-type semiconductor layer :
the second N-type semiconductor layer is laminated on the first N-type semiconductor layer;
the second N-type semiconductor layer has a higher impurity concentration than the first N-type semiconductor layer [sufficiently disclosed Column 2 lines 16-32 disclose N- as “lightly doped” and Column 3 lines 41-58 disclose N+ “High concentration N+ Region”];
the protective layer is not arranged on a lower (most) side surface of the P-type semiconductor layer [illustrated in fig. 6-8];
the protective layer is arranged on an upper (most) side surface of the P-type semiconductor layer [illustrated in fig. 6-8];
the protective layer is arranged on (left and right) a side surface of the first N-type semiconductor layer and a side surface of the second N-type semiconductor layer [illustrated in fig. 6-8], and
a bevel angle [illustrated in fig. 6-8, disclosed in column 2 lines 16-32 as the “frustum shape”] defined by a PN junction plane formed between the P-type semiconductor layer [illustrated in fig. 6-8];
a side wall of the first N-type semiconductor layer [See annotation below] has an inclined surface [sufficiently illustrated fig. 8] with: (i) a first inclination angle on a P-type semiconductor layer side [see annotation below]; and (ii) a second inclination angle on a second N-type semiconductor layer side [see annotation below].
Einthoven does not explicitly teach the first N-type semiconductor layer and the upper side surface of the P-type semiconductor layer is 85 degrees or more and 120 degrees or less nor the first electrode is any one selected from the group consisting of a Ni layer, an Al layer, and a Ti/Ni laminate; the second electrode is any one selected from the group consisting of a Ni layer, an Al layer, and a Ti/Ni laminate; the first inclination angle is less than the second inclination angle.
Davis teaches in that the electric field strength and/or energy characteristics of a PN junction MESA diode is directly dependent upon the bevel angle of the junction. Column 1 Lines 10-18 “A mesa device with a positive bevel angle has a larger area on the more heavily doped side than on the side which is more lightly doped. This structure results in a reduction in the electric field with a corresponding improvement in the reverse energy characteristics”.
Submitted purely as evidence The Influence of Surface Charge and Bevel Angle on the Blocking Behavior by Brieger et al fig.6 and Fig. 7 also teaches the electric field strength and/or energy characteristics and/or break down voltage of a PN junction MESA diode is directly dependent upon the bevel angle of the junction.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjust the art recognized Bevel angle Einthoven teaches in view of Davis such that “the first N-type semiconductor layer and the upper side surface of the P-type semiconductor layer is 85 degrees or more and 120 degrees or less” for the art recognized result of achieving a desired electric field strength and/or energy characteristic and/or break down voltage across a junction of the MESA PN junction diode.
Kizilyalli teaches a PN diode comprising a first electrode (130 fig. 1) is any one selected from the group consisting of a Ni layer, an Al layer, and a Ti/Ni laminate (disclosed “Ni” in “Ni/Au” paragraph 0033); a second electrode (135 fig. 1) is any one selected from the group consisting of a Ni layer, an Al layer, and a Ti/Ni laminate (disclosed “Ni”, “Al”, “Ti/Al” paragraph 0032);
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to take the first and the second electrodes Einthoven in view of Davis teaches and select one of the known materials of “a Ni layer, an Al layer, and a Ti/Ni laminate” as Kizilyalli teaches for their known metallic and/or conductive material properties as the selection of a known material based on its suitability for its intended is prima facie type obviousness [See MPEP 2144.07].
Boles teaches a diode (fig. 2B) comprising side walls with inclination angles (Spread angles α1 and/or α2 fig. 2B); and the inclination angles can be varied as compared to each other to optimize design parameters of the diode [Paragraph 0038] such as thermal resistance and Diode area [Paragraph 0045-0048, illustrated fig. 4]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjust the inclination angles and/or walls in the device of Einthoven in view of Davis and Kizilyalli such that the “the first inclination angle is less than the second inclination angle.” As part of routine optimization of thermal resistance and/or diode area of the device [Boles Paragraph 0038 and Paragraph 0045-0048, illustrated fig. 4, See MPEP 2144.05 II.].
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Einthoven Annotated fig. 8: highlighting the side wall and the first inclination angle and the second inclination angle
Regarding claim 2 Einthoven in view of Davis and Kizilyalli and Boles teaches as shown above the semiconductor device according to claim 1, wherein an angle defined by a junction plane [illustrated in fig. 6-8 labeled in fig. 7 as 28 and/or 30 fig. 7 ] between the first N-type semiconductor layer and the second N-type semiconductor layer and a side surface of a junction portion between the first N-type semiconductor layer and the second N-type semiconductor layer is 85 degrees or more and 95 degrees or less [illustrated in fig. 6-8, under broadest reasonable interpretation the angle as measured between N- and N+ appears to be 90 degrees (a smooth/even transition) on the left and right surface].
Alternatively if the applicant disagrees, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjust the art recognized Bevel angle Einthoven teaches in view of Davis such that “a junction portion between the first N-type semiconductor layer and the second N-type semiconductor layer is 85 degrees or more and 95 degrees or less” for the art recognized result of achieving a desired electric field strength and/or energy characteristic and/or break down voltage across a junction of the MESA PN junction diode.
Regarding claim 3 Einthoven in view of Davis and Kizilyalli and Boles teaches as shown above the semiconductor device according to claim 1,
Einthoven in view of Davis does not explicitly teach a distance between the lower side surface of the P-type semiconductor layer and the side surface of the second N-type semiconductor layer is 50 µm or more and 150 µm or less.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to change the size of the device Einthoven in view of Davis teaches such that “a distance between the lower side surface of the P-type semiconductor layer and the side surface of the second N-type semiconductor layer is 50 µm or more and 150 µm or less” as changes in size are prima facie type obviousness [See MPEP 2144.04 IVA].
Conclusion
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/WCT/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893