DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on October 21, 2025 has been entered.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 3, 5, 7 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chou (2023/0180461).
As for claim 1, Chou shows in Figs. 13, 14, 20 and related text an apparatus, comprising:
a structure (left one of) 300/311 comprising:
a first layer (inner portion of) 311 comprising a first material (silicon oxide) formed on a plurality of patterned material 301/309;
a second layer (middle portion of) 311 comprising a second material (silicon nitride) formed on sidewalls of the first layer and over both a top portion of the first layer and a top portion of the patterned material; and
a third layer (outer portion of) 311 comprising the first material formed on sidewalls of the second layer ([0059]);
a base area 103 adjacent the structure;
an active area 107 adjacent the base area and adjacent the structure.
As for claim 3, Chou shows at least a portion of the active area is exposed between the structure and a different structure (right one of) 300/309 (Figs. 13-14; [0065]).
As for claim 5, Chou shows a polysilicon material (lower portion of) 200 that (thermally) connects a conductive material (upper portion of) 200 to the base area.
As for claim 7, Chou shows the first material and the second material are different materials ([0059]).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-3 and 5-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma et al. (2022/0037335) in view of Chou (2023/0180461).
As for claims 1-3, 5, 8 and 12, Ma et al. show in Figs. 1-2 and related text an apparatus, comprising:
a structure 151/154/153 (corresponds to 135_1) comprising:
a first layer 151 comprising a (first material is) silicon oxycarbide (SiOC) material (formed) on sidewalls of a plurality of patterned material 135_1 ([0057]: SiOCN);
a second layer 154 comprising a nitride material formed on sidewalls of the SiOC material and over a top portion of the SiOC material ([0057]: silicon nitride and/or SiON); and
a third layer 153 comprising the SiOC material formed on (sidewalls of) the second nitride material ([0057]: SiOCN);
a base area 110_1 (adjacent the structure) formed from the nitride material ([0039]);
an active area ACT (adjacent the base area and adjacent the structure, wherein at least a portion 140t_2_b of the active base area is exposed) between the structure and a different structure 151/154/153 (corresponds to 135_2);
a polysilicon material 140/(bottom portion of 160) (that connects a conductive material to the base area) on sidewalls of the third layer ([0112]; [0072]); and
a conductive material (top portion of) 160 on the polysilicon material ([0072]),
wherein the plurality of patterned material includes a digit line and the nitride material.
Ma et al. do not disclose the second layer over a top portion of the patterned material (claims 1 and 8); and the plurality of patterned material includes an oxide material (claim 12).
Chou teaches in Fig. 20 and related text:
As for claims 1 and 8, the second layer (middle portion of) 311 over a top portion of the patterned material ([0059]: ONO structure).
As for claim 12, the plurality of patterned material 301/309 includes an oxide material ([0057]).
Ma et al. and Chou are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Ma et al. with the specified feature(s) of Chou because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to form the second layer over a top portion of the patterned material, and the plurality of patterned material including an oxide material as taught by Chou, in Ma et al.'s device, in order to protect the bitline surface from mechanical damage and ionic contamination, and improve signal propagation speed in interconnects.
As for claim 6, the combined device shows the first layer is a planar first layer, wherein the second layer is a planar second layer, and wherein the third layer is a planar third layer (Ma: Fig. 2).
As for claim 7, the combined device shows the first material and the second material are different materials (Ma: Fig. 2; [0057]).
As for claim 9, the combined device shows the polysilicon material fills a portion of an amount of space between the structure and the different structure (Ma: Fig. 2).
As for claim 10, the combined device shows the polysilicon material is between the two semiconductor structures forming part of the structure and is adjacent to the active area (Ma: Fig. 2).
As for claim 11, the combined device shows the active area is vertically oriented below the structure and the polysilicon material (Ma: Fig. 2).
Claim(s) 6 and 8-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chou (2023/0180461) in view of Ma et al. (2022/0037335).
As for claim 6, Chou disclosed substantially the entire claimed invention, as applied to claim 1 above, including the third layer is a planar third layer.
As for claim 8, Chou shows in Figs. 13, 14, 20 and related text an apparatus, comprising:
a structure (left one of) 300/311 comprising:
a first layer (inner portion of) 311 comprising a first material (silicon oxide) formed on a plurality of patterned material 301/309;
a second layer (middle portion of) 311 comprising a nitride material (silicon nitride) formed on sidewalls of the first material and over both a top portion of the first material and a top portion of the patterned material; and
a third layer (outer portion of) 311 comprising the first material formed on nitride material ([0059]);
a base area 103 formed from the nitride material ([0037]);
an active area 107 between the structure and a different structure (right one of) 300/311;
a first conductive material 411 on sidewalls of the third layer; and
a conductive material 413 on the first conductive material.
Chou does not disclose the first layer is a planar first layer, wherein the second layer is a planar second layer (claim 6); the first material is a silicon oxycarbide (SiOC) material; and a first conductive material is a polysilicon material (claim 8).
Ma et al. teach in Figs. 1-2 and related text:
As for claim 6, the first layer is a planar first layer, wherein the second layer is a planar second layer (Fig. 2).
As for claim 8, the first material is a silicon oxycarbide (SiOC) material 151 ([0057]: SiOCN); and
a first conductive material is a polysilicon material 140/(bottom portion of 160) ([0112]; [0072]).
Chou and Ma et al. are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chou with the specified feature(s) of Ma et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to use SiOC material, as a first layer, and use a polysilicon material, as a first conductive material, as taught by Ma et al., in Chou’s device, in order to minimize the interconnect parasitic capacitance and reduce manufacturing cost.
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
As for claim 9, the combined device shows the polysilicon material fills a portion of an amount of space between the structure and the different structure (Chou: Fig. 20; Ma: Fig. 2).
As for claim 10, the combined device shows the polysilicon material is between the two semiconductor structures forming part of the structure and is adjacent to the active area (Chou: Fig. 20; Ma: Fig. 2).
As for claim 11, the combined device shows the active area is vertically oriented below the structure and the polysilicon material (Chou: Fig. 20; Ma: Fig. 2).
As for claim 12, the combined device shows the plurality of patterned material includes an oxide material (lower portion of) 309, a digit line 301, the nitride material (upper portion of) 309 ([0057]).
Claim(s) 2 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma et al. (2022/0037335) and Chou (2023/0180461) in view of Lee et al. (2021/0098460).
As for claims 2 and 4, Chou disclosed substantially the entire claimed invention, as applied to claim 1 above, except the first material is a silicon oxycarbide (SiOC) material (claim 2), and wherein the SiOC material is a low-K material (claim 4).
Lee et al. teach in Fig. 7 and related text the first material is a silicon oxycarbide (SiOC) material, and the SiOC material is a low-K material ([0062]; note: the dielectric constant (k) of SiOC typically ranges from about 2.7 to 3.3, which is lower than that of silicon dioxide, which is about 3.9-4.0).
Chou and Lee et al. are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chou with the specified feature(s) of Lee et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to use low-k SiOC material, as the first material, as taught by Lee et al., in Chou's device, in order to reduce parasitic capacitance between metal lines, lower RC delay.
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma et al. (2022/0037335) and Chou (2023/0180461) in view of Lee et al. (2021/0098460).
Ma et al. and Chou disclosed substantially the entire claimed invention, as applied to claim 2 above, the SiOC material is a low-K material.
Lee et al. teach in Fig. 7 and related text the SiOC material is a low-K material ([0062]; note: the dielectric constant (k) of SiOC typically ranges from about 2.7 to 3.3, which is lower than that of silicon dioxide, which is about 3.9-4.0).
Ma et al., Chou and Lee et al. are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Ma et al. and Chou with the specified feature(s) of Lee et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to use low-k SiOC material, as the first material, as taught by Lee et al., in Ma et al. and Chou's device, in order to reduce parasitic capacitance between metal lines, lower RC delay.
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/MEIYA LI/Primary Examiner, Art Unit 2811
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