Prosecution Insights
Last updated: August 14, 2026
Application No. 17/731,895

DIGIT LINE AND CELL CONTACT ISOLATION

Final Rejection §102§103§112
Filed
Apr 28, 2022
Examiner
LI, MEIYA
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology Inc.
OA Round
4 (Final)
69%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
641 granted / 933 resolved
+0.7% vs TC avg
Strong +25% interview lift
Without
With
+25.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
47 currently pending
Career history
986
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
39.6%
-0.4% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
43.3%
+3.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 933 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the specification for the claim limitations of “a third layer … formed on the top portion of the plurality of patterned material”, as recited in claim 1; “the plurality of patterned material comprises layers of nitride materials; and a third layer … formed on the top portion of the plurality of patterned material”, as recited in claim 8 (note: Fig. 3A and corresponding paragraph [0032] that the horizontal portions (e.g. 347-1 and 347-2) of the third layer 330 at the top (e.g. 347-1) of the pattern materials 310 and at the horizontal portion (e.g. 347-2) 338 of the second layer 213 are etched by plasma and subsequent acid; and paragraph [0013] discloses layers of nitride material). The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 8-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 8 recites the limitation “the layers of nitride material of the second layer”, in lines 9-10. There is insufficient antecedent basis for this limitation in the claim. The claimed limitation of “a nitride material”, as recited in claim 8, lines 9-10, is unclear as to whether said limitation is the same as or different from “nitride materials”, as recited in claim 8, line 5. The claimed limitation of “nitride material”, as recited in claim 8, lines 9-10, is unclear as to whether said limitation is the same as or different from “nitride material”, as recited in claim 8, lines 5 and/or 6. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1, 3, 5 and 7, as best understood, is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chou (2023/0180461). As for claim 1, Chou shows in Figs. 13, 14, 20 and related text an apparatus, comprising: a structure (left one of) 300(301(303/305/307)/309)/311 comprising: a first layer (inner portion of) 311 comprising a first material (silicon oxide) formed on sidewalls of a plurality of patterned material 300, wherein the plurality of patterned material comprises layers of nitride material, wherein the plurality of patterned material comprises layers of nitride material 603/609 ([0057]); a second layer (middle portion of) 311 comprising a second material (silicon nitride) formed on sidewalls of the first layer and over both a top portion of the first layer and a top portion of the plurality of patterned material; and a third layer (outer portion of) 311 comprising the first material formed on the top portion of the plurality of patterned material and sidewalls of the second layer ([0059]); a base area 103 adjacent the structure; an active area 107 adjacent the base area and adjacent the structure. As for claim 3, Chou shows at least a portion of the active area is exposed between the structure and a different structure (right one of) 300/309 (Figs. 13-14; [0065]). As for claim 5, Chou shows a polysilicon material (lower portion of) 200 that (thermally) connects a conductive material (upper portion of) 200 to the base area. As for claim 7, Chou shows the first material and the second material are different materials ([0059]). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 2 and 4, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Chou (2023/0180461) in view of Lee et al. (2021/0098460). As for claims 2 and 4, Chou disclosed substantially the entire claimed invention, as applied to claim 1 above, except the first material is a silicon oxycarbide (SiOC) material (claim 2), and wherein the SiOC material is a low-K material (claim 4). Lee et al. teach in Fig. 7 and related text the first material is a silicon oxycarbide (SiOC) material, and the SiOC material is a low-K material ([0062]; note: the dielectric constant (k) of SiOC typically ranges from about 2.7 to 3.3, which is lower than that of silicon dioxide, which is about 3.9-4.0). Chou and Lee et al. are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chou with the specified feature(s) of Lee et al. because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to use low-k SiOC material, as the first material, as taught by Lee et al., in Chou's device, in order to reduce parasitic capacitance between metal lines, lower RC delay. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). Claim(s) 6 and 8-12, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Chou (2023/0180461) in view of Ma et al. (2022/0037335). As for claim 6, Chou disclosed substantially the entire claimed invention, as applied to claim 1 above, including the third layer is a planar third layer. As for claim 8, Chou shows in Figs. 13, 14, 20 and related text an apparatus, comprising: a structure (left one of) 300(301(303/305/307)/309)/311 comprising: a first layer (inner portion of) 311 comprising a first material (silicon oxide) formed on sidewalls of a plurality of patterned material 300, wherein the plurality of patterned material comprises layers of nitride material, wherein the plurality of patterned material comprises layers of nitride materials 603/609 ([0057]); a second layer (middle portion of) 311 comprising a nitride material (silicon nitride) formed on sidewalls of the first material and over both a top portion of the first material and a top portion of the patterned material; and a third layer (outer portion of) 311 comprising the first material formed on the layers of nitride material of the second layer and the top portion of the plurality of patterned material([0059]); a base area 103 formed from the nitride material ([0037]); an active area 107 between the structure and a different structure (right one of) 300/311; a first conductive material 411 on sidewalls of the third layer; and a conductive material 413 on the first conductive material. Chou does not disclose the first layer is a planar first layer, wherein the second layer is a planar second layer (claim 6); the first material is a silicon oxycarbide (SiOC) material; and a first conductive material is a polysilicon material (claim 8). Ma et al. teach in Figs. 1-2 and related text: As for claim 6, the first layer is a planar first layer, wherein the second layer is a planar second layer (Fig. 2). As for claim 8, the first material is a silicon oxycarbide (SiOC) material 151 ([0057]: SiOCN); and a first conductive material is a polysilicon material 140/(bottom portion of 160) ([0112]; [0072]). Chou and Ma et al. are analogous art because they are directed to a memory device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chou with the specified feature(s) of Ma et al. because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to use SiOC material, as a first layer, and use a polysilicon material, as a first conductive material, as taught by Ma et al., in Chou’s device, in order to minimize the interconnect parasitic capacitance and reduce manufacturing cost. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). As for claim 9, the combined device shows the polysilicon material fills a portion of an amount of space between the structure and the different structure (Chou: Fig. 20; in combined with Ma: Fig. 2). As for claim 10, the combined device shows the polysilicon material is between the two semiconductor structures forming part of the structure and is adjacent to the active area (Chou: Fig. 20 in combined with Ma: Fig. 2). As for claim 11, the combined device shows the active area is vertically oriented below the structure and the polysilicon material (Chou: Fig. 20 in combined with Ma: Fig. 2). As for claim 12, the combined device shows the plurality of patterned material includes an oxide material (lower portion of) 309, a digit line 301, the nitride material (upper portion of) 309 ([0057]). Response to Arguments Applicant's arguments filed May 29, 2026 have been fully considered but they are not persuasive. Applicant argues that 1) “Chou does not teach a first layer comprising a first material formed on sidewalls of a plurality of patterned material, wherein the plurality of patterned material comprises layers of nitride material, as described in Paragraph 0013 of the current application. Further, Chou does not teach a third layer comprising the first material formed on the top portion of the plurality of patterned material and sidewalls of the second layer, as illustrated in Figure 4B, and as recited in claim 1, as amended”; and 2) “Further, claim 8 has been amended to include similar limitations as claim 1. Therefore, Applicant respectfully submits that Chou does not teach, suggest, or describe each and every element of claim 8, as amended”. The examiner respectfully disagrees because Chou discloses in paragraph [0057] that “the second conductive material 603 may be, for example, a conductive metal nitride (e.g. titanium nitride or tantalum nitride), … . The first insulating material 609 may be, for example, silicon nitride, silicon oxynitride, silicon nitride oxide, the like, or a combination thereof” and paragraph [0059] that “a spacer layer 611 may be conformally formed to cover the … bit line structure 300. …, the spacer layer 611 may be stacked layer structure consisting of silicon oxide-silicon nitride-silicon oxide”. It is well known in the art that when a layer conformally formed on a structure, then the layer substantially follows the contour/shape of the structure and covers exposed surfaces of the structure, including horizontal surfaces, sidewalls and recessed regions. Therefore, Chou discloses the feature of “the plurality of patterned material comprises layers of nitride material”, and implicitly discloses the features of “a first layer comprising a first material formed on sidewalls of a plurality of patterned material, a third layer comprising the first material formed on the top portion of the plurality of patterned material and sidewalls of the second layer”, as recited in claims 1 and 8. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEIYA LI whose telephone number is (571)270-1572. The examiner can normally be reached Monday-Friday 7AM-3PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LYNNE GURLEY can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MEIYA LI/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Show 13 earlier events
Nov 03, 2025
Non-Final Rejection mailed — §102, §103, §112
Dec 01, 2025
Interview Requested
Dec 10, 2025
Examiner Interview Summary
Dec 10, 2025
Applicant Interview (Telephonic)
Jan 06, 2026
Response Filed
Jan 06, 2026
Response after Non-Final Action
May 29, 2026
Response Filed
Jun 17, 2026
Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
69%
Grant Probability
94%
With Interview (+25.4%)
3y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 933 resolved cases by this examiner. Grant probability derived from career allowance rate.

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