Prosecution Insights
Prosecution Insights
Tech Center 2800 • Art Units: 2800 2811
This examiner grants 69% of resolved cases
Meiya Li is an examiner in Tech Center 2800 and Art Unit 2800. She has 945 resolved cases. The allowance rate for these cases is 69.1 percent. This percentage represents the frequency of patent grants among her resolved matters. The interview lift is 25.8 percent. This metric measures the increase in the probability of allowance following an examiner interview. The median time to allowance is 1315 days.
With 945 resolved cases, the 69.1 percent allowance rate offers a clear view of the examiner's tendencies. The 25.8 percent interview lift indicates that direct communication is an effective strategy for applicants. The 1315 days median time to allowance is a key figure for planning the lifecycle of an application. These statistics help practitioners navigate the specific requirements of their assigned art unit. The allowance rate and interview lift are the primary indicators of success for this examiner in Tech Center 2800.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18628890 | SEMICONDUCTOR PACKAGE AND WIRING SUBSTRATE USED FOR THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18413813 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18386429 | VERTICAL MEMORY DEVICES INCLUDING DIVISION PATTERNS | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18489493 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18432609 | Through-substrate laser soldering with embedded absorbing layer | Non-Final OA | Apple Inc. |
| 17915640 | IMAGING ELEMENT AND IMAGING DEVICE | Final Rejection | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18592970 | SEMICONDUCTOR DEVICE | Non-Final OA | Kioxia Corporation |
| 18615422 | CONFINED CELL STRUCTURES AND METHODS OF FORMING CONFINED CELL STRUCTURES | Non-Final OA | Micron Technology, Inc. |
| 18616019 | INDUCTORS WITH THROUGH-SUBSTRATE VIA CORES | Non-Final OA | Micron Technology, Inc. |
| 18312766 | SEMICONDUCTOR MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. |
| 18769781 | PARASITIC CAPACITANCE REDUCTION | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18412779 | SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF FORMING SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18446753 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Final Rejection | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
| 17845849 | METHOD FOR PREPARING MEMORY DEVICE WITH MULTILAYERED CAPACITOR DIELECTRIC STRUCTURE | Final Rejection | NANYA TECHNOLOGY CORPORATION |
| 17741593 | MEMORY DEVICE HAVING PROTRUDING CHANNEL STRUCTURE | Final Rejection | NANYA TECHNOLOGY CORPORATION |
| 18111577 | High Voltage Blocking III-V Semiconductor Device | Final Rejection | Infineon Technologies Austria AG |
| 18495266 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE | Final Rejection | SEMES CO., LTD. |
| 18493665 | SUBSTRATE BIASING FOR A TRANSISTOR STRUCTURE THAT USES A TWO-DIMENSIONAL ELECTRON GAS | Non-Final OA | Infineon Technologies Canada Inc. |
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