DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination, in the “Request for Continued Examination (RCE)” filed on 12/08/2025, under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/08/2025 has been entered.
Status of Claims
Applicant's amendment of claim 1 and 19 in “Claims” filed on 11/21/2025 with the “Request for Continued Examination (RCE)” filed on 12/08/2025, have been acknowledged and entered by Examiner.
This office action considers claims 1 and 4-22 pending for prosecution, wherein claims 10-18 are withdrawn from further consideration, and claims 1, 4-9, and 19-22 are presented for examination.
Response to Arguments
1. The finality of the previous Office Action has been withdrawn pursuant to 37 CFR 1.114 in respect with the request for continued examination, in the “Request for Continued Examination (RCE)” filed on 08/09/2018, under 37 CFR 1.114
Applicant's arguments filed in the “Applicant Arguments/Remarks Made in an Amendment” on 11/21/2025 have been fully considered. The Examiner agrees respectfully argues that prior art of record Ler teaches wherein the shield layer has a first end that connects to the inductor and the shield layer has a second end that connects to the substrate. Ler teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a top portion is a first end that connected to 310; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a first end that connects to the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) and the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a second end that connects to the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66). The shift in grounds of rejection renders the Applicant's arguments moot. Please see the analysis of rejection for claims below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
2. Claim 1-6, 9, and 19-21 are rejected under 35 U.S.C.103 as being unpatentable over Ler et al. (US 9583554 A1; hereinafter Ler), in view of Kurokawa et al. (US 20100295151 A1; hereinafter Kurokawa).
Regarding claim 1, Ler teaches a semiconductor device (see the entire document, specifically Fig. 1+; C2 L25+, and as cited below), comprising:
a substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and an inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), wherein
a shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is formed between the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), and wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a top portion is a first end that connected to 310; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a first end that connects to the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) and the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a second end that connects to the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66),
and the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) shields an electrical coupling between the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is grounded by using (see below for “conductive through holes that pass through”) the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) that is connected to the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) through the second end.
As noted above, Ler does not expressly disclose “wherein the shield layer is grounded by using conductive through holes that pass through the substrate”.
However, in the analogous art, Kurokawa teaches a semiconductor device ([Abstract]), wherein (Fig. 2+; [0021+]) an inductor (107; Fig. 21; [0050]) and a shield layer (113; Fig. 21; [0095]), where the shield layer (113; Fig. 21; [0095]) is connected to a ground electrode of the mounting substrate (217) via the corresponding metal bump (125), electrode (223), and second through-vias (233).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Kurokawa’s through-vias connection structure into Ler’s device, and thereby, modified Ler’s (by Kurokawa) method will have wherein the shield layer (Ler 320; Fig. 3B in view of Fig. 3A; C4 L45-51 in view of Kurokawa Fig. 21; [0095]) is grounded by using conductive through holes (in view of Kurokawa 233; Fig. 21; [0095]) that pass through the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66 in view of Kurokawa Fig. 21; [0095]) that is connected to the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) through the second end.
The ordinary artisan would have been motivated to modify Ler in the manner set forth above, at least, because this inclusion provides a shield layer connected to a ground electrode of the mounting substrate via the corresponding metal bump, electrode, and second through-vias so that the position of the second through-via falls within the range of the shield layer, and transmission loss due to the parasitic resistance can be reduced or avoided (Kurokawa [0095, 0011-0013]).
It is the Examiner’s position that the limitation of a "and the shield layer shields an electrical coupling between the substrate and the inductor” is a functional limitation of the apparatus claimed. While features of an apparatus may be recited either structurally or functionally, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431- 32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959); MPEP 2114. Furthermore, because the device of modified Ler (by Kurokawa) teaches all of the structural limitations of the claimed invention, the device is capable of operating in the manner claimed by the applicant. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
As per MPEP 2112.01.I guideline, where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). In this case, modified Ler (by Kurokawa) teaches all of the structural limitations of the claimed invention. As modified Ler (by Kurokawa) teaches all of the structural elements of the claimed product, and when the structure recited in a reference is substantially identical to that of the claims, claimed properties or functions are presumed to be inherent.
Regarding claim 2, modified Ler (by Kurokawa) teaches all of the features of claim 1.
Ler further teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is grounded (see C5 L18-24).
Regarding claim 3, modified Ler (by Kurokawa) teaches all of the features of claim 2.
Ler further teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is grounded by using a bonding wire, or the shield layer is grounded by using conductive through holes that pass through the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66), or the shield layer is connected to [[the]] a grounded substrate to achieve grounding (see Fig, 3B; see C5 L18-24).
Regarding claim 4, modified Ler (by Kurokawa) teaches all of the features of claim 1.
Ler further teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is another functional layer in the semiconductor device (see Fig. 3B; see C2 L31-37; see C5 L25-46).
Regarding claim 5, modified Ler (by Kurokawa) teaches all of the features of claim 4.
Ler further teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is a capacitor (see C5 L62-67).
Regarding claim 6, modified Ler (by Kurokawa) teaches all of the features of claim 5.
Modified Ler (by Kurokawa) further teaches wherein the capacitor (Ler see C5 L62-67) has a first electrode plate (Ler 320A-1; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) and a second electrode plate (Ler 320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23), the second electrode plate second electrode plate (Ler 320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) is grounded by using conductive through holes (in view of Kurokawa 233; Fig. 21; [0095]), and an area of the second electrode plate (320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) is larger than an area of the first electrode plate (320A-1; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23).
Regarding claim 9, modified Ler (by Kurokawa) teaches all of the features of claim 1.
Ler further teaches wherein the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) is a bonding wire connecting a signal input end and a signal output end, or a conductor layer connecting the signal input end and the signal output end (see Fig. 3B).
Regarding claim 19, Ler teaches a radio frequency integrated circuit (see the entire document, specifically Abstract; Fig. 1+; C2 L25+, and as cited below; see below for a radio frequency integrated circuit), comprising:
a substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and an inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), wherein
a shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is formed between the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), and wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a top portion is a first end that connected to 310; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a first end that connects to the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) and the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) has a second end that connects to the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66),
and the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) shields an electrical coupling between the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) and the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44), wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is grounded by using (see below for “conductive through holes that pass through”) the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66) that is connected to the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) through the second end. .
As noted above, Ler does not expressly disclose “wherein the shield layer is grounded by using conductive through holes that pass through the substrate”.
However, in the analogous art, Kurokawa teaches a semiconductor device ([Abstract]), wherein (Fig. 2+; [0021+]) an inductor (107; Fig. 21; [0050]) and a shield layer (113; Fig. 21; [0095]), where the shield layer (113; Fig. 21; [0095]) is connected to a ground electrode of the mounting substrate (217) via the corresponding metal bump (125), electrode (223), and second through-vias (233).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Kurokawa’s through-vias connection structure into Ler’s device, and thereby, modified Ler’s (by Kurokawa) method will have wherein the shield layer (Ler 320; Fig. 3B in view of Fig. 3A; C4 L45-51 in view of Kurokawa Fig. 21; [0095]) is grounded by using conductive through holes (in view of Kurokawa 233; Fig. 21; [0095]) that pass through the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66 in view of Kurokawa Fig. 21; [0095]) that is connected to the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51; see Fig. 3B in view of Fig. 3A, where a bottom portion is a second end that connected to 305; see also C6 L36-49, where four capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are coupled to inductor 310. It should be noted that the respective capacitors 350A-0, 350A-1, 350A-2, and 350A-3 are formed by ground shielding strip 320A-1 with substrate layer 305; adjacent ground shielding strips 320A-1 and 320A-2, and 320A-2 and 320A-3; and inductor 310 and ground shielding strip 320A-3) through the second end.
The ordinary artisan would have been motivated to modify Ler in the manner set forth above, at least, because this inclusion provides a shield layer connected to a ground electrode of the mounting substrate via the corresponding metal bump, electrode, and second through-vias so that the position of the second through-via falls within the range of the shield layer, and transmission loss due to the parasitic resistance can be reduced or avoided (Kurokawa [0095, 0011-0013]).
It is the Examiner’s position that the limitation of a "and the shield layer shields an electrical coupling between the substrate and the inductor” is a functional limitation of the apparatus claimed. While features of an apparatus may be recited either structurally or functionally, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431- 32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959); MPEP 2114. Furthermore, because the device of modified Ler (by Kurokawa) teaches all of the structural limitations of the claimed invention, the device is capable of operating in the manner claimed by the applicant. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
As per MPEP 2112.01.I guideline, where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). In this case, modified Ler (by Kurokawa) teaches all of the structural limitations of the claimed invention. As modified Ler (by Kurokawa) teaches all of the structural elements of the claimed product, and when the structure recited in a reference is substantially identical to that of the claims, claimed properties or functions are presumed to be inherent.
Applicant should also note that the recitation of “radio frequency integrated circuit” has not been given patentable weight because it has been held that a preamble is denied the effect of a limitation where the claim is drawn to a structure and the portion of the claim following the preamble is a self-contained description of the structure not depending for completeness upon the introductory clause. Kropa v. Robie, 88 USPQ 478 (CCPA 1951).
Regarding claim 20, modified Ler (by Kurokawa) teaches all of the features of claim 19.
Ler further teaches wherein the shield layer (320; Fig. 3B in view of Fig. 3A; C4 L45-51) is a capacitor (see C5 L62-67).
Regarding claim 21, modified Ler (by Kurokawa) teaches all of the features of claim 20.
Modified Ler (by Kurokawa) further teaches wherein the capacitor (Ler see C5 L62-67) has a first electrode plate (Ler 320A-1; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) and a second electrode plate (Ler 320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23), the second electrode plate second electrode plate (Ler 320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) is grounded by using conductive through holes (in view of Kurokawa 233; Fig. 21; [0095]), and an area of the second electrode plate (320A-2; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23) is larger than an area of the first electrode plate (320A-1; Fig. 3B in view of Fig. 3A; C5 L25-34, 62-67; C6 L1-23).
3. Claims 7-8 and 22 are rejected under 35 U.S.C.103 as being unpatentable over Ler et al. (US 9583554 A1; hereinafter Ler), in view of Kurokawa et al. (US 20100295151 A1; hereinafter Kurokawa), and in view of Van Zeijl et al. (WO 2004102665 A1; hereinafter Van Zeijl).
Regarding claim 7, modified Ler (by Kurokawa) teaches all of the features of claim 1.
Ler further teaches wherein in the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66), (see below for “a doping density of a region directly facing”) the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) (see below for “is lower than a doping density of another region”).
As noted above, modified Ler (by Kurokawa) does not expressly disclose “wherein in the substrate, a doping density of a region directly facing the inductor is lower than a doping density of another region”.
However, in the analogous art, Van Zeijl teaches a semiconductor integrated circuit ([Abstract]), wherein (Fig. 2A+; Page 1+) an inductor (300; Fig. 3; Page 8, Line 28) and low layer (313; Fig. 3; Page 9, Line 10), where a source (307; Fig. 3; Page 9, Line 8) is in the low layer (313; Fig. 3; Page 9, Line 10), and the source (307; Fig. 3; Page 9, Line 8) has a thickness of a region directly facing the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) is less than a thickness of another region (313).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Van Zeijl’s the low layer and doping density region into modified Ler’s (by Kurokawa) device, and thereby, modified Ler’s (by Kurokawa and Van Zeijl) device will have wherein in the substrate (Ler 305; Fig. 3B in view of Fig. 3A; C5 L66 in view of Van Zeijl Fig. 3; Pages 8-9, Line 28), a doping density of a region (in view of Van Zeijl 307; Fig. 3; Page 9, Line 8) directly facing the inductor (Ler 310; Fig. 3B in view of Fig. 3A; C4 L44 in view of Van Zeijl 300; Fig. 3; Page 8, Line 28) is lower than a doping density of another region (in view of Van Zeijl 313; Fig. 3; Page 9, Line 10)
The ordinary artisan would have been motivated to modify Ler in the manner set forth above, at least, because this inclusion provides a region with a doping density lower than a doping density of another region (Van Zeijl [Fig. 3; Pages 8-9]), that increases the efficiency of the integrated circuit and device.
Regarding claim 8, modified Ler (by Kurokawa) teaches all of the features of claim 1.
Ler further teaches wherein in the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66), (see below for “a thickness of [[the]] a region directly facing”) the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) (see below for “is less than a thickness of [[the]] another region”).
As noted above, modified Ler (by Kurokawa) does not expressly disclose “wherein in the substrate, a thickness of [[the]] a region directly facing the inductor is less than a thickness of [[the]] another region”.
However, in the analogous art, Van Zeijl teaches a semiconductor integrated circuit ([Abstract]), wherein (Fig. 2A+; Page 1+) an inductor (300; Fig. 3; Page 8, Line 28) and low layer (313; Fig. 3; Page 9, Line 10), where a source (307; Fig. 3; Page 9, Line 8) is in the low layer (313; Fig. 3; Page 9, Line 10), and the source (307; Fig. 3; Page 9, Line 8) has a doping density of a region directly facing the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) lower than a doping density of another region (313).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Van Zeijl’s the low layer and a thickness structure of a region into modified Ler’s (by Kurokawa) device, and thereby, modified Ler’s (by Kurokawa and Van Zeijl) device will have wherein in the substrate (Ler 305; Fig. 3B in view of Fig. 3A; C5 L66 in view of Van Zeijl Fig. 3; Pages 8-9, Line 28), a thickness of [[the]] a region (in view of Van Zeijl 307; Fig. 3; Page 9, Line 8) directly facing the inductor (Ler 310; Fig. 3B in view of Fig. 3A; C4 L44 in view of Van Zeijl 300; Fig. 3; Page 8, Line 28) is less than a thickness of [[the]] another region (in view of Van Zeijl 313; Fig. 3; Page 9, Line 10)
The ordinary artisan would have been motivated to modify Ler in the manner set forth above, at least, because this inclusion provides a region with a thickness lower than is less than a thickness another region (Van Zeijl [Fig. 3; Pages 8-9]), that helps decrease that size of a device layer and increases the efficiency of the integrated circuit and device.
Regarding claim 22, modified Ler (by Kurokawa) teaches all of the features of claim 19.
Ler further teaches wherein in the substrate (305; Fig. 3B in view of Fig. 3A; C5 L66), (see below for “a doping density of a region directly facing”) the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) (see below for “is lower than a doping density of another region”).
As noted above, modified Ler (by Kurokawa) does not expressly disclose “wherein in the substrate, a doping density of a region directly facing the inductor is lower than a doping density of another region”.
However, in the analogous art, Van Zeijl teaches a semiconductor integrated circuit ([Abstract]), wherein (Fig. 2A+; Page 1+) an inductor (300; Fig. 3; Page 8, Line 28) and low layer (313; Fig. 3; Page 9, Line 10), where a source (307; Fig. 3; Page 9, Line 8) is in the low layer (313; Fig. 3; Page 9, Line 10), and the source (307; Fig. 3; Page 9, Line 8) has a thickness of a region directly facing the inductor (310; Fig. 3B in view of Fig. 3A; C4 L44) is less than a thickness of another region (313).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Van Zeijl’s the low layer and doping density region into modified Ler’s (by Kurokawa) device, and thereby, modified Ler’s (by Kurokawa and Van Zeijl) device will have wherein in the substrate (Ler 305; Fig. 3B in view of Fig. 3A; C5 L66 in view of Van Zeijl Fig. 3; Pages 8-9, Line 28), a doping density of a region (in view of Van Zeijl 307; Fig. 3; Page 9, Line 8) directly facing the inductor (Ler 310; Fig. 3B in view of Fig. 3A; C4 L44 in view of Van Zeijl 300; Fig. 3; Page 8, Line 28) is lower than a doping density of another region (in view of Van Zeijl 313; Fig. 3; Page 9, Line 10)
The ordinary artisan would have been motivated to modify Ler in the manner set forth above, at least, because this inclusion provides a region with a doping density lower than a doping density of another region (Van Zeijl [Fig. 3; Pages 8-9]), that increases the efficiency of the integrated circuit and device.
Conclusion
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/OMAR F MOJADDEDI/Examiner, Art Unit 2898