DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 24 November 2025 has been entered.
Examiner’s Remark
Examiner notes that it is improper to refer to the published specification, and would kindly request all responses be made in reference to the specification as it appears in the file wrapper.
Claim Construction
Regarding claim 1, the preamble is given patentable weight. Claim 1 contains the
limitation “the plurality of numerical values”, “the four arithmetic operations”, and “the sign” in the body, which is referring to the limitations as recited in the preamble. A skilled person in the art reading the claims would consider the claim in view of the body and preamble, and identify them limited to the technological environment of an arithmetic device performing the four arithmetic operations of a floating-point number. The body of the claim depends on the preamble for completeness, and gives life, meaning, and vitality to this claim. Therefore, the preamble of claim 1 should be afforded patentable weight.
Claim 10 is directed to a method that would be practiced by the device of claim 1, and recites similarly the claim limitations in the preamble of its claim. Similarly to the claim 1 analysis, the preamble of claim 10 is granted patentable weight.
Claim 11 is directed to a method that would be practiced by the device of claim 1, and recites similarly the claim limitations in the preamble of its claim. Similarly to the claim 1 analysis, the preamble of claim 11 is granted patentable weight.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 6, 8, 10-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "repeatedly determines the common exponent of a plurality of pixel values" in line 18. There is insufficient antecedent basis for this limitation in the claim. The exponent recited in this limitation appears to be different than the exponent recited in line 3 “an exponent” and in line 8 “determine an exponent common”. It is unclear if the limitation is meant to antecedently refer back to line 3, line 8, or should be interpreted as a new instance since the exponent is determined from a plurality of pixel values. For purposes of examination, the limitation is interpreted as: “repeatedly determines a common exponent of a plurality of pixel values". Claims 2, 6, and 8 inherit the same deficiency by reasons of dependence. Independent claims 10 and 11 similarly recite the same limitation, and are similarly rejected for the reasons stated for claim 1.
Claim 1 recites the limitation "determines the mantissa of each of the plurality of pixel values" in line 20. There is insufficient antecedent basis for this limitation in the claim. The mantissa recited in this limitation appears to be different than the mantissa recited in line 3 “a mantissa” and in line 10 “determine a mantissa”. It is unclear if the limitation is meant to antecedently refer back to line 3, line 10, or should be interpreted as a new instance since the mantissa is determined from each of the plurality of pixel values. For purposes of examination, the limitation is interpreted as: “determines a mantissa of each of the plurality of pixel values". Claims 2, 6, and 8 inherit the same deficiency by reasons of dependence. Independent claims 10 and 11 similarly recite the same limitation, and are similarly rejected for the reasons stated for claim 1.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-2, 6, 8 and 10-11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., an abstract idea) without significantly more.
Regarding claim 1, under the Alice Framework Step 1 analysis, the claim falls within the four statutory categories of patentable subject matter: an apparatus.
Under the Alice Framework Step 2A Prong 1 analysis, claim 1 recites Mathematical Concepts. The claim recites Mathematical Calculations, which is specifically identified as an exemplar in the Mathematical Concepts grouping of abstract ideas:
“performs four arithmetic operations on a plurality of numerical values each consisting of a floating-point number expressed by a sign, an exponent, and a mantissa;
determine an exponent common to the plurality of numerical values representing pixel values of pixels of the target image;
determine a mantissa for each of the plurality of numerical values based on the determined exponent; and
perform the four arithmetic operations between the target image and a kernel that convolves the target image using the sign, the determined exponent, and the determined mantissa to output a probability of being a target area for each pixel of the target image as a score; and
extract an area consisting of pixels whose score is equal to or higher than a threshold value in the target image as the target area, wherein
determines the common exponent of a plurality of pixel values of a feature map processed,
determines the mantissa of each of the plurality of pixel values of a feature map based on the determined common exponent, sets weighting coefficients of the kernel that convolves the feature map using a plurality of upper bits of the determined mantissa, and
performs the four arithmetic operations between the plurality of pixel values of the feature map and the weighting coefficients of the kernel using the determined common exponents and the determined mantissas.”
See specification ([0039], [0051]) describing performing four arithmetic operations. See specification ([0034-0035], [0037], [0043-0044]) describing determining an exponent. See specification ([0034], [0043]) describing determining a mantissa. See specification ([0030-0031], [0040-0041], [0044]) describing performing to output a probability. See specification ([0031], [0034-0035], [0040-0041]) describing extracting. See specification ([0034], [0039]) describing performing four arithmetic operations. See specification ([0030] n
×
n pixel size where n=3, [0034] pixel values of
0.7
×
10
-
3
,
0.3
×
10
-
7
,
0.5
×
10
-
3
, [0035-0037]) describing pixels. See specification ([0030-0032], [0039-0040]) describing convolving. See specification ([0034]) describing determining the common exponent. See specification ([0034]) describing determining the mantissa. See specification ([0037]) describing setting weighting coefficients using the upper bits. For these reasons, the claim recites Mathematical Concepts.
Under the Alice Framework Step 2A Prong 2 analysis, the claim recites the combination of the following additional elements: an arithmetic device, a communication device configured to connect a network, acquire a target image to be processed, an image storage server, at least one processor, repeatedly performing the arithmetic operations and repeatedly determine, a neural network consisting of a plurality of processing layers, a previous stage and input to each of the plurality of processing layers. An arithmetic device, a communication device configured to connect a network, an image storage server, at least one processor, a neural network consisting of a plurality of processing layers, and a previous stage are recited at a high level of generality are examples of generic computing elements, and/or merely generally linked to a particular technological environment (see MPEP 2106.05(h)(vi): Limiting the abstract idea of collecting information, analyzing it, and displaying certain results of the collection analysis to data related to the electric power grid, because limiting application of the abstract idea to power-grid monitoring is simply an attempt to limit the use of the abstract idea to a particular technological environment). The claim recites limitations which are examples of generic computing elements that result in “apply it” on a computer. The repeatedly performing the arithmetic, repeatedly performing the determining, acquiring, and inputting limitation are examples of insignificant extra-solution activity, mere data gathering (see MPEP 2106.05(g): Insignificant Extra-Solution Activity). Taken alone or in combination, they fail to integrate the judicial exception into a practical application.
Under the Alice Framework Step 2B Analysis, the additional elements recited above, taken alone or in combination, do not amount to significantly more than the judicial exception. As discussed in the Step 2A Prong 2 Analysis, the claim recites an arithmetic device, a communication device configured to connect a network, an image storage server, at least one processor, a neural network consisting of a plurality of processing layers, and a previous stage at a high level of generality, which merely result in “apply it” on a computer. The limitations described above as insignificant extra-solution activity are also well-understood, routine, or conventional (Repeatedly performing and repeatedly determining: see MPEP 2106.05(d)(II)(ii): Performing repetitive calculations; Acquiring: see MPEP 2106.05(d)(II)(i): Receiving or transmitting data over a network; Inputting: see MPEP 2106.05(d)(II)(iv): Storing and retrieving information in memory). Since the claim does not include additional elements that, alone or in combination, amount to significantly more than the judicial exception, claim 1 is ineligible.
Claims 2, 6, 8 merely further limit the mathematical concepts. Claims 2, 6, 8 do not recite any new additional elements that would necessitate analysis under Alice Framework Step 2A Prong 2 and Alice Framework Step 2B Analysis.
Claim 10 is directed to a method that would be practiced by the device of claim 1. The claim 1 analysis equally applies. Claim 10 is similarly rejected.
Claim 11 is directed to a computer program product that would be executed by the device of claim 1. The claim 1 analysis equally applies. Claim 11 is similarly rejected. Additionally, claim 11 recites the following additional elements:
Under the Alice Framework Step 2A Prong 2 analysis, claim 11 recites the
combination of the following additional elements: a non-transitory computer readable recording medium storing an arithmetic program that causes a computer. A non-transitory computer readable recording medium, an arithmetic program, storing an arithmetic program, and a computer are recited at a high-level generality and are examples of generic computing elements. Further, these additional elements merely generally link the use of the abstract idea to a particular technological environment (see MPEP 2106.05(h)(vi): Limiting the abstract idea of collecting information, analyzing it, and displaying certain results of the collection analysis to data related to the electric power grid, because limiting application of the abstract idea to power-grid monitoring is simply an attempt to limit the use of the abstract idea to a particular technological environment). The storing limitation is an example of insignificant extra-solution activity, mere data gathering (see MPEP 2106.05(g): Insignificant Extra-Solution Activity). Taken alone or in combination, they fail to integrate the judicial exception into a practical application.
Under the Alice Framework Step 2B analysis, the additional elements recited
above, take alone or in combination, do not amount to significantly more than the
judicial exception. As discussed in the Step 2A Prong 2 analysis, the claim recites a non-transitory computer readable recording medium, an arithmetic program, and a computer at a high level of generality. The limitation described above as insignificant extra-solution activity is also well-understood, routine, or conventional (see MPEP 2106.05(d)(II)(iv): Storing and retrieving information in memory). Since the claim does not include additional elements that, alone or in combination, amount to significantly more than the judicial exception, claim 11 is ineligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6, 8, 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over US 20210390382 A1 Kwon et al. (hereinafter “Kwon”) in view of Stoyanov, Yasen. "Logical vs. Arithmetic Shift". December 13, 2016. Open4Tech. Digital Logic. (hereinafter “Stoyanov”) in view of US 20170154247 A1 Uchida (hereinafter “Uchida”) in view of Lysenko, Tim. "Storage Server: All You Need To Know". VSYS Blog. 17 May 2021. (hereinafter “Lysenko”) in view of US 8880571 B2 Srinivasan et al. (hereinafter “Srinivasan”).
Regarding claim 1, Kwon teaches:
An arithmetic device (Fig. 4, 4, [0079]; Fig. 13, 1330, [0167]) that performs four arithmetic operations (Fig. 10, 1030, [0129] Addition and Subtraction; Fig. 11, 1120 ADD/SUB, 1110, [0135] Shifting) on a plurality of numerical values (Fig. 4, IFM, [0102]; Fig. 1, FM1, [0055-0056] input stripe includes C input activations; Fig. 4, kernels, [0081], [0083]) each consisting of a floating-point number expressed by a sign, an exponent, and a mantissa ([0090-0091] weight kernels, [0105-0106] input activations; Note: “fraction” is used in place of “mantissa”), the device comprising:
a communication device (Fig. 13, 1360, [0164]) configured to connect to a network ([0174]) and acquire a target image to be processed from an image storage server via the network; and
at least one processor (Fig. 13, 1310, [0165-0166]), wherein the processor is configured to:
determine an exponent common to the plurality of numerical values (Fig. 12, 1210, [0143], first shared exponent) representing pixel values of pixels of the target image;
determine a mantissa for each of the plurality of numerical values based on the determined exponent (Fig. 12, 1210, [0143], first fraction); and
repeatedly ([0139], [0160]) perform the four arithmetic operations (Fig. 10, 1030, [0129] Addition and Subtraction; Fig. 11, 1120 ADD/SUB, 1110, [0135] Shifting) between the target image and a kernel (Fig. 4, kernels, [0081], [0083])) that convolves ([0055], [0057], [0167-0169]) the target image by a neural network (Fig. 2, 2, [0059-0060], [0065]) consisting of a plurality of processing layers (Fig. 2 “Layers1-4” [0060], [0064]) using the sign, the determined exponent, and the determined mantissa (Fig. 12, 1230, [0145] performing on first fraction; [0147-0148] performing on sign; Fig. 12, 1240, [0155] performing on first shared exponent) to output a probability of being a target area for each pixel of the target image as a score; and
extract an area consisting of pixels whose score is equal to or higher than a threshold value in the target image as the target area, wherein
the processor repeatedly determines the common exponent of a plurality of pixel values of a feature map (Fig. 1 “FM1” [0055], [0060]) processed in a previous stage and input to each of the plurality of processing layers ([0064-0065]), determines the mantissa of each of the plurality of pixel values of the feature map based on the determined common exponent, sets weighting coefficients of the kernel (Fig. 4, kernels, [0081], [0083]) that convolves ([0167-0169]) the feature map ([0057-0058]) using a plurality of upper bits of the determined mantissa,
performs the four arithmetic operations (Fig. 10, 1030, [0129] Addition and Subtraction; Fig. 11, 1120 ADD/SUB, 1110, [0135] Shifting) between the plurality of pixel values of the feature map (Fig. 1 “FM1” [0055], [0060]) and the weighting coefficients of the kernel (Fig. 4, kernels, [0081], [0083]) using the determined common exponents and the determined mantissas.
Although Kwon teaches arithmetic operations, they are silent with explicitly disclosing the shifting as left or right shifting. Thus, Kwon teaches three operations (Addition, Subtraction, and Shifting), and is silent with explicitly teaching four arithmetic operations.
Although Kwon generally teaches processing input image data ([0172], image signal, [0167-0169], frame data as input data, received by neural network device 1330), it appears “target image”, as recited in the claim, is different. Thus, Kwon is also silent with explicitly disclosing:
acquire a target image to be processed from an image storage server;
numerical values representing pixel values of pixels of the target image;
to output a probability of being a target area for each pixel of the target image as a score;
extract an area consisting of pixels whose score is equal to or higher than a threshold value in the target image as the target area;
and repeatedly determines the common exponent of a plurality of pixel values, determines the mantissa of each of the plurality of pixel values based on the determined common exponent, a plurality of upper bits of the determined mantissa.
Stoyanov teaches that left shifting is equivalent to multiplication and right shifting is equivalent to division (Pg. 3, multiplication by left shift section and division by right shift section). Thus, Kwon teaches four arithmetic operations by configuring the shift to perform both left and right, multiplication and division respectively, and allows Kwon’s device to perform four operations.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Kwon’s arithmetic device with Stoyanov’s left and right shifting techniques because they are in the claimed invention’s same field of endeavor of arithmetic operations (Pg. 2, Arithmetic Shift section). Kwon is silent with explicitly disclosing if the shift techniques taught are configured to perform left or right shifting. It would have been obvious in the computer architecture art to configure the shifter to perform both left and right, as they are basic functionalities of shifters, as taught by Stoyanov. Using the known technique of left and right shifting to provide a predictable level of arithmetic results would have been obvious to one of ordinary skill in the art, since one would recognize that Kwon was ready for improvement to incorporate the left and right shifters, as taught by Stoyanov.
Stoyanov and the combination of Kwon in view of Stoyanov is silent to disclosing:
acquire a target image to be processed from an image storage server;
numerical values representing pixel values of pixels of the target image;
to output a probability of being a target area for each pixel of the target image as a score;
extract an area consisting of pixels whose score is equal to or higher than a threshold value in the target image as the target area;
and repeatedly determines the common exponent of a plurality of pixel values, determines the mantissa of each of the plurality of pixel values based on the determined common exponent, a plurality of upper bits of the determined mantissa.
Uchida teaches:
acquire a target image (Fig. 8A, captured images, [0064]) to be processed (Fig. 9, S10, [0069]) from an image storage (Fig. 4, 62, [0038]) server;
numerical values representing pixel values of pixels of the target image ([0005]);
to output a probability ([0069] two kinds of probability) of being a target area ([0064-0065] target space and target region) for each pixel of the target image as a score (Fig. 9, S12, [0069] score value); and
extract an area consisting of pixels (Fig. 9, S14, [0070]) whose score is equal to or higher than a threshold value ([0062] range) in the target image as the target area ([0062] target region).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Kwon in view of Stoyanov’s modified arithmetic system with Uchida’s image and pixel representation and extraction techniques because they are in the claimed invention’s same field of endeavor of data processing ([0049]). It would have been obvious to one of ordinary skill in the art to implement the image representation and extraction techniques, as it allows the modified arithmetic system to perform other types of data processing ([0140]). Making this modification would be beneficial as Uchida’s particular method improves the accuracy of information processing involving the use of captured images ([0010]). Further, it would have been obvious as Kwon in view of Stoyanov’s modified arithmetic system would now have support for image data processing, of which Kwon previously indicated was possible of doing (Kwon, [0172], image signal, [0167-0169]). Thus, a person skilled in the art would recognize that modifying with Uchida would make the modified arithmetic system more flexible to processing different data types and result in greater use in other applications.
Although Uchida teaches an image storage device (Fig. 4, 62, [0038]), it appears that the “image storage server” is different. Therefore, Uchida is silent with disclosing the image storage as a “server” device. Uchida is further silent with disclosing repeatedly determines the common exponent of a plurality of pixel values, determines the mantissa of each of the plurality of pixel values based on the determined common exponent, a plurality of upper bits of the determined mantissa.
The combination of Kwon in view of Stoyanov in view of Uchida are silent with disclosing the image storage as a server; and repeatedly determines the common exponent of a plurality of pixel values, determines the mantissa of each of the plurality of pixel values based on the determined common exponent, a plurality of upper bits of the determined mantissa.
Lysenko teaches the image storage as a server (Pg. 1, Intro. Para., “What’s the Purpose…Server” section).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Kwon in view of Stoyanov in view of Uchida’s modified arithmetic system with Lysenko’s storage server feature because they are in the claimed invention’s same field of endeavor of data processing components (Pg. 2, “How Do Storage Servers Work?” section). It would have been obvious to one of ordinary skill in the art to implement the Uchida’s image storage device as a storage server as specified by Lysenko, as it allows the modified arithmetic system to perform similar functionality via storing and transmitting data (Pg. 1, Intro. Para.). Making this modification would be beneficial as Lysenko’s servers have improved space available, faster access to network computers to share resources efficiently and effectively, and increased multi-layered security (Pg. 4, “Benefits of A Storage Server”). Further, it would have been obvious as Kwon in view of Stoyanov in view of Uchida’s modified arithmetic system would now have support for their image storage device to communicate over a network (Pg. 2, “How Do Storage Servers Work?” section). Thus, a person skilled in the art would recognize that modifying with Lysenko would give the modified arithmetic system more functionality via the network communication feature and result in having greater use in other applications.
The combination of Kwon in view of Stoyanov in view of Uchida in view of Lysenko are silent with disclosing and repeatedly determines the common exponent of a plurality of pixel values, determines the mantissa of each of the plurality of pixel values based on the determined common exponent, a plurality of upper bits of the determined mantissa.
Srinivasan discloses repeatedly determines (Fig. 6 “600” loop repeats at “690” if there are more to be processed “695”, co. 10 ln. 9-11) the common exponent of a plurality of pixel values (Fig. 6 “660” co. 9 ln. 67—co. 10 ln. 1-3), determines the mantissa of each of the plurality of pixel values based on the determined common exponent (Fig. 6 “670” co. 10 ln. 3-8, where R, G, and B are mantissas see co. 6 ln. 11-18), a plurality of upper bits (Fig. 8 “820” co. 11 ln. 24-35) of the determined mantissa (Fig. 6 “670” co. 10 ln. 3-8).
In a separate embodiment, Fig. 8, Srinivasan discloses adjusting the length of mantissa M to a specified length
l
m
.It would have been obvious to modify the main embodiment, Fig. 6, with the adjusting limitation as doing so would be beneficial as the RGBE rule restricts the largest 8-bit mantissa, while the other two are unrestricted (co. 6 ln. 20-23). Therefore, it would have been obvious to modify with the separated embodiment as doing so provides the main embodiment with the support to trim the R, G, and B mantissas if necessary.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Kwon in view of Stoyanov in view of Uchida in view of Lysenko’s modified arithmetic system with Srinivasan’s determining feature because they are in the claimed invention’s same field of endeavor of floating-point processing of images (co. 2 ln. 12-14). It would have been obvious to one of ordinary skill in the art to implement the determining limitations, as it allows the conversion of data from RGB to RGBE (co. 3 ln. 10-11). RGBE is a widely used format for carrying high dynamic range (HDR) image data (co. 6 ln. 2-3); HDR imaging present more versatile and natural image representation in line with human vision systems (co. 1 ln. 37-39). Making this modification would be beneficial as RGBE is a pixel format used to safeguard against lossless encoding and visible artifacts due to rounding or truncation operations on HDR pixels (co. 5 ln. 35-43). Thus, a person skilled in the art would recognize the benefits of converting to the RGBE format to leverage HDR imaging for higher image quality when processing image data (co. 1 ln. 39-49).
Regarding claim 2, in addition to the teachings addressed in the claim 1 analysis, the rejection of claim 1 is incorporated and Kwon teaches wherein:
the processor is configured to determine a largest exponent in the plurality of numerical values as the common exponent ([0026], [0085], [0104], maximum value).
Regarding claim 6, in addition to the teachings addressed in the claim 1 analysis, the rejection of claim 1 is incorporated and Kwon teaches wherein:
the processor is configured to determine a common exponent for at least one of the input value or the coefficient in each of one or more processing layers (for input value: Fig. 12, 1220, [0144], second shared exponent; Fig. 4, shared exponent of input stripe, [0100], [0103-0105] in each layer) (for coefficient: Fig. 12, 1210, [0143], first shared exponent; Fig. 4, shared exponent of kernels, [0081]; Fig. 6A, 620 and Fig. 6B, 625, [0093], [0097]; [0089-0091] in each layer) as an exponent set in advance (Fig. 12, 1210-1220, [0143-0144], [0160] first two steps in process).
Regarding claim 8, in addition to the teachings addressed in the claim 1 analysis, the rejection of claim 1 is incorporated.
Kwon teaches the plurality of numerical values including a 1-bit sign, an exponent, and mantissa (see claim 1 mapping) and generally teaches them as 16-bit floating-point values ([0091]). However, they are silent with explicitly disclosing them as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.
Stoyanov is silent with disclosing as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.
Thus, Kwon in view of Stoyanov is silent with disclosing as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.
Further, Uchida and the combination of Kwon in view of Stoyanov in view of Uchida are silent with disclosing as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.
Further, Lysenko and the combination of Kwon in view of Stoyanov in view of Uchida in view of Lysenko are silent with disclosing as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.
Srinivasan teaches as 32-bit floating-point numbers, and each of the plurality of numerical values includes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa (co. 6 ln. 37-61).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Kwon in view of Stoyanov in view of Uchida in view of Lysenko’s modified arithmetic system with Srinivasan’s floating-point format feature because they are in the claimed invention’s same field of endeavor of floating-point processing of images (co. 2 ln. 12-14). It would have been obvious to one of ordinary skill in the art to implement the specific bit assignments to different parts of the floating-point value (co. 6 ln. 37-61) as utilizing a 32-bit floating point format is a common technique in the art for representing image data (co. 6 ln. 38-39). Making this modification would have yielded predictable results as the 32-bit floating-point format is one of the supported and common formats used to carry HDR image information (co. 5 ln. 38-40). Therefore, it would have been obvious to modify known methods to yield predictable results.
Claim 10 is directed to a method that would be practiced by the device of claim 1. The claim 1 analysis equally applies. Claim 10 is similarly rejected.
Claim 11 is directed to a computer program product that would be executed by the device of claim 1. The claim 1 analysis equally applies. Claim 11 is similarly rejected. Additionally, Kwon teaches:
a non-transitory computer readable recording medium storing an arithmetic program that causes a computer ([0175]).
Response to Arguments
35 U.S.C. 101. Applicant argues the following in substance:
1) Step 2A, Prong One Applicant asserts that, the above disclosure shows the differences between the claimed neural network and the generic neural network, and reflects how the claimed neural network can be faster and more accurate as compared to the conventional neural network (i.e., since the neural network is configured as only using 16-bits (upper bits) of mantissa, the process is faster).
The amount of memory and the time of calculation can be reduced since the present invention performs arithmetic using only part of the mantissa ( e.g., 16 bits out of 23 bits). Such an improvement directly enhances how a computer processes data, optimizes register utilization, and reduces memory bandwidth requirements. Such benefits are not abstract mathematical results but concrete, technical improvements to computer architecture and operation - akin to those found eligible in Enfish v. Microsoft, McRO v. Bandai Namco, and DDR Holding v. Hotels. com. Applicant explains:
In Enfish, LLC v. Microsoft Corp., 822 F .3 d 13 27 (Fed. Cir. 2016), the Federal Circuit held that claims directed to a specific improvement in computer functionality are not abstract. The present claim likewise recites a specific improvement including reducing the amount of memory and the time of calculation, optimizing register utilization, and reducing memory bandwidth requirements
(Remarks Pg. 11 ⁋ 1-3).
Examiner respectfully disagrees. Although Applicant has amended more elements to further limit the neural network, such limitations (plurality of processing layers) are common to neural networks by nature and therefore considered generic computing components. Thus, the amended limitations do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer (or equivalent), and/or generally linking to a particular technological environment.
The reduction in the number of required calculations is merely a result from applying more efficient mathematics (i.e., determining the common exponent, determining the mantissa, performing convolution on those determined, and extracting based on the convolution result) see ([0043-0047]) in the specification. Furthermore, part of this reduction is due to utilizing less bits than the total allotted ([0046] 16 bits of 23 bits in the 32-bit floating-point number are used).
With respect to “memory and time of calculation” it is the abstract idea, the manner of applying the mathematical relationships to perform the reduced mantissa operations. See specification para. ([0036-0037], [0046]).
The purported improvements are a direct result of the mathematical concepts. No additional element or combination of additional element is claimed that result in the purported improvement beyond the mathematical steps. It is the abstract idea, the manner of applying mathematical relationships that result in the purported improvement. See MPEP 2106.05(a)(II). “It is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology.” See also MPEP 2106.05. An inventive concept "cannot be furnished by the unpatentable law of nature (or natural phenomenon or abstract idea) itself."
The case cited Enfish LLC v. Microsoft Corp. et al., 822 F3d 1327 (Fed.Cir. 2016) is not equivalent or similar to the instant application. Even if considered, such case recites different additional elements and possesses claim interpretations under 35 USC 112(f) or pre-AIA 35 USC 112, sixth paragraph, of which was factored into the court’s decision (see MPEP 2106(II)), that is unlike those recited in the instant application.
2) Step 2A, Prong Two Applicant asserts that, the calculated results are applied to a specific technical task, which is, extracting a target area in an image based on computed scores. Specifically, the claims recite " ... extract an area consisting of pixels whose score is equal to or higher than a threshold value in the target image as the target area". This step converts the mathematical computations into a tangible, real-world result: "a segmented pixel region (e.g., the mask 31 assigned to the liver as shown in FIG. 8 of the specification). The claimed process thus transforms an abstract score computation into a concrete improvement in computer vision and image analysis technology.
Courts have repeatedly held that such integration of mathematical operations into a specific, practical technological process renders the claim patent-eligible (see McRO, Thales Visionix, Finjan). Therefore, the claims as a whole integrate the abstract idea into a practical application (Remarks Pg. 12 ⁋ 1-2).
Examiner respectfully disagrees. The claimed process is analyzed as part of the abstract idea. An inventive concept "cannot be furnished by the unpatentable law of nature (or natural phenomenon or abstract idea) itself."
The claims do not recite additional elements which integrate the abstract idea in to a practical application. The courts have found not to be enough to qualify as "significantly more" when recited in a claim with a judicial exception include: i. Adding the words “apply it”, ii. Appending well-understood, routine, and conventional activities, iii. Adding insignificant extra-solution activity, and iv. Generally linking the use to a particular technological environment. See MPEP 2106.05(I)(A).
3) Step 2B Applicant asserts that, the particular combination of features, that is, using a common exponent and upper bits of mantissa to balance precision and efficiency, and applying the result to convolution and score-based image extraction, was neither conventional nor routine. The prior art did not teach or suggest this configuration. It represents a technical solution to a technical problem, that is, the trade-off between computation load and accuracy in floating-point operations during a neural network processing (Remarks Pg. 12 ⁋ 4).
In summary, the claimed invention provides a specific improvement to the functioning of a computer by reducing computational complexity and memory usage through a novel data representation and processing method. The invention is integrated into a practical application, namely, efficient feature extraction and target area segmentation in computer vision tasks. The claims embody an inventive concept that is neither well-understood, routine, nor conventional in the art (Remarks Pg. 13 ⁋ 1).
Examiner respectfully disagrees. The integration which applicant alleges is due to the novel data representation and processing method is analyzed as part of the abstract idea, rather than an additional element. The claims do not recite additional elements which integrate the abstract idea in to a practical application.
35 U.S.C. 103. Applicant’s arguments, see Remarks Pg. 14 ⁋ 3 bridging Pg. 15 ⁋ 1 (or the newly amended limitations), filed 11/24/2025, with respect to the rejection(s) of claim(s) 1, 10, and 11 under 35 USC 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Srinivasan, as necessitated by the amendment.
To the extent Applicant’s arguments apply to the previously cited prior art:
1) Applicant asserts that, there is no teaching or suggestion that one of
ordinary skill in the art would have been motivated to seek out and apply kwon's
nonconventional, highly complex hardware architecture - where exponents and mantissas are processed separately - to implement Uchida's general image processing flow. The Examiner's proposed combination is based in impermissible hindsight, in appropriately stitching solutions from different technological contexts that address different problems (Remarks Pg. 15 ⁋ 2).
In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
2) Applicant asserts that, FIG. 5 of the present application explicitly defines the initial data format as a standard 32-bit floating-point number including a 23-bit mantissa. Furthermore, FIGs. 6 and 7 clearly disclose that during the actual convolution operation, a 16-bit mantissa obtained through truncation or selection is used.
In contrast, Kwon's FIGs. 5 and 7 employ general notations such as "F-BITS
FRACTIONS", which merely illustrate the principle of performing operations during the
fractional portion of a number. Kwon does not specify the concrete value of "F bits", nor
does it disclose that such a format is converted from a particular standard ( e.g., a 32-bit
floating-point format) (Remarks Pg. 15 ⁋ 3-4).
Examiner respectfully disagrees. The specific data format is disclosed by Srinivasan, as necessitated by the amendment.
3) Applicant asserts that, the technical feature of reducing the 23-bit mantissa of a strandard 32-bit floating-point number to a 16-bit mantissa for arithmetic operations by using upper bits of the determined mantissa as weighting coefficients of the kernel, whereas Kwon only discloses the general concept of using an "F-bit fraction" in block floating-point arithmetic, without any specific disclosure of bit-width reduction (Remarks Pg. 16 ⁋ 1).
Examiner respectfully disagrees. The upper bit limitation is taught by Srinivasan, as necessitated by the amendment. Note, it is not explicitly recited in the claims that the mantissa is reduced to 16-bits.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARKUS A VILLANUEVA whose telephone number is (703)756-1603. The examiner can normally be reached M - F 8:30 am - 5:30 pm.
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/MARKUS ANTHONY VILLANUEVA/Examiner, Art Unit 2151
/James Trujillo/Supervisory Patent Examiner, Art Unit 2151