Prosecution Insights
Last updated: April 19, 2026
Application No. 17/743,646

POWER CONVERTER

Final Rejection §103
Filed
May 13, 2022
Examiner
TRAN, NGUYEN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Silergy Semiconductor Technology (Hangzhou) Ltd.
OA Round
6 (Final)
83%
Grant Probability
Favorable
7-8
OA Rounds
2y 6m
To Grant
91%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
895 granted / 1073 resolved
+15.4% vs TC avg
Moderate +8% lift
Without
With
+7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
36 currently pending
Career history
1109
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
51.6%
+11.6% vs TC avg
§102
33.9%
-6.1% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1073 resolved cases

Office Action

§103
DETAILED ACTION 1. This action is in response to the amendment filed on 10/06/25. Notice of Pre-AIA or AIA Status 3. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5. Claims 1-2 are rejected under 35 U.S.C. 103 as being unpatentable over Lau (US 20210099085) in views of Rainer et al. (US 10651731). Regarding claim 1: A power converter, (i.e. figure 9) comprising: a) a positive input terminal (i.e. + Vin terminal) and a negative input terminal (i.e. – input terminal or ground), configured to receive an input voltage (i.e. Vin); b) a positive output terminal (i.e. + terminal Vo) and a negative output terminal (i.e. – input terminal or ground), configured to generate an output voltage (i.e. Vo); c) a first power switch (i.e. S1) and a second power switch (i.e. S3), directly connected in series between the positive input terminal (i.e. + Vin terminal) and a first node (i.e. node connecting S7, S3, C2); d) a third power switch (i.e. S2) and a fourth power switch (i.e. S5), directly connected in series between a second node (i.e. node connecting S5, S9, C3) and the negative input terminal (i.e. ground); e) a first structure (i.e. C1) having a first terminal directly connected to a common terminal (i.e. terminal connecting S1, S3) of the first power switch (i.e. S1) and the second power switch (i.e. S3), and a second terminal directly connected to a common terminal (i.e. terminal connecting S2, S5) of the third power switch (i.e. S2) and the fourth power switch (i.e. S5), wherein the first structure (i.e. C1) is configured as a first energy storage element (i.e. element of C1); f) a first switched capacitor circuit (i.e. S7, S8, C2, S4) coupled (i.e. electrically coupled) between the first node (i.e. node connecting S7, S3, C2) and the positive output terminal (i.e. + terminal Vo); and g) a second switched capacitor circuit (i.e. C3, S9, S10, S6) coupled (i.e. electrically coupled) between the second node (i.e. node connecting S5, S9, C3) and the positive output terminal (i.e. + terminal Vo), but does not specifically disclose wherein the first switched capacitor circuit comprises N first flying capacitors and N first inductors, and each of the N first inductors is coupled in series with a corresponding one of the N first flying capacitors; wherein the second switched capacitor circuit comprises N second flying capacitors and N second inductors, and each of the N second inductors is coupled to a corresponding one of the N second flying capacitors: and wherein resonant frequencies of the power converter in each operation interval of one operation cycle are the same, and the power converter accordingly operates in a resonant state. Rainer et al. disclose a switched capacitor converter (i.e. figures 9-11) comprising the first switched capacitor circuit (i.e. Q1-Q6, Lres1-2, Lfly1, Cres1-2, Cfly1) comprises N first flying capacitors (i.e. Cres1-2, Cfly1) and N first inductors (i.e. Lres1-2, Lfly1), and each of the N first inductors (i.e. Lres1-2, Lfly1) is coupled in series with a corresponding one of the N first flying capacitors (i.e. Cres1-2, Cfly1); wherein the second switched capacitor circuit (i.e. Q11, Q12, Q13, Q14, Q7, Q8, Cres3-4, Lres3-4, Lfly2, Cfly2) comprises N second flying capacitors (i.e. Cfly2, Cres3-4) and N second inductors (i.e. Lres3-4, Lfly2), and each of the N second inductors (i.e. Lres3-4, Lfly2) is coupled to a corresponding one of the N second flying capacitors (i.e. Cfly2, Cres3-4): and wherein resonant frequencies of the power converter (i.e. frequency of power converter 930) in each operation interval of one operation cycle are the same (i.e. Cycle of Q1-8 and Q11-14, also see figure 3), and the power converter accordingly operates in a resonant state (i.e. state of the switching cycle). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lau’s invention with the converter as disclose by Rainer et al. to provide improved efficiency (lower loss of energy) of generating a respective output voltage. Regarding claim 2: (i.e. figure 9) wherein there is no direct physical connection between the first node (i.e. node connecting S7, S3, C2) and the second node (i.e. node connecting S5, S9, C3). Regarding claim 4: Lau disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a first energy storage element coupled in series to a first magnetic element. Rainer et al. disclose a switched capacitor converter (i.e. figure 2) comprising a first energy storage element (i.e. Cres1) coupled in series to a first magnetic element (i.e. Lres1). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lau’s invention with the converter as disclose by Rainer et al. to provide improved efficiency (lower loss of energy) of generating a respective output voltage. 6. Claims 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Lau (US 20210099085) in views of Rainer et al. (US 10651731) and further in view of Rizzolatti et al. (US 20220224231). Regarding claim 3: Lau discloses (i.e. figure 9) the first switched capacitor circuit (i.e. S7, S8, C2, S4) connected between the first node (i.e. node connecting S7, S3, C2) and the ground (i.e. ground) and the second switched capacitor circuit (i.e. C3, S9, S10, S6) connected between the second node (i.e. node connecting S5, S9, C3) and the ground (i.e. ground), but does not specifically disclose the first switched capacitor circuit comprises: a) 2N+1 fifth power switches connected in series, wherein the 2N+1 fifth power switches are sequentially connected in series between the first node and a ground potential to form 2N first intermediate nodes, a Nth first flying capacitor is coupled between the first node and a 2Nth first intermediate node and an rth first flying capacitor is coupled between an rth first intermediate node and a (2N-r)th first intermediate node, wherein a Nth first intermediate node is coupled to the positive output terminal, and r is less than N, N is an integer greater than or equal to 1; and b) the second switched capacitor circuit comprises 2N+1 sixth power switches connected in series, wherein the 2N+1 sixth power switches are sequentially connected in series between the second node and the ground potential to form 2N second intermediate nodes, and a Nth second flying capacitor is coupled between the second node and a 2Nth second intermediate node, an rth second flying capacitor is coupled between an rth second intermediate node and a (2N-r)th second intermediate node, wherein a second terminal of the second switched capacitor circuit is configured as a Nth second intermediate node. Rizzolatti et al. disclose a converter (i.e. figure 13) comprising the first switched capacitor circuit (i.e. left circuit) comprises: a) 2N+1 fifth power switches (i.e. left switches) connected in series, wherein the 2N+1 fifth power switches are sequentially connected in series between the node and a ground potential to form 2N first intermediate nodes (i.e. nodes of left circuit), a Nth first flying capacitor (i.e. left capacitors) is coupled between the first node and a 2Nth first intermediate node and an rth first flying capacitor is coupled between an rth first intermediate node and a (2N-r)th first intermediate node (i.e. nodes of left circuit), wherein a Nth first intermediate node is coupled to the positive output terminal (i.e. +), and r is less than N, N is an integer greater than or equal to 1; and b) the second switched capacitor circuit (i.e. right circuit) comprises 2N+1 sixth power switches (i.e. right circuit) connected in series and, wherein the 2N+1 sixth power switches are sequentially connected in series between the node and the ground potential to form 2N second intermediate nodes (i.e. nodes of right circuit), and a Nth second flying capacitor (i.e. right capacitors) is coupled between the second node and a 2Nth second intermediate node, an rth second flying capacitor is coupled between an rth second intermediate node and a (2N-r)th second intermediate node, wherein a second terminal of the second switched capacitor circuit is configured as a Nth second intermediate node (i.e. see configuration of figure 13). Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Rizzolatti et al. to improve performance of power conversion via implementation of multiple flying capacitors. Regarding claim 6: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose switching states of the first to the fourth power switches and each of the fifth and the sixth power switches are controlled, such that the output voltage is equal to 1/(2*(N+1)) of the input voltage. Rizzolatti et al. disclose a converter (i.e. figure 13) comprising switching states of the first to the fourth power switches and each of the fifth and the sixth power switches (i.e. switches of left circuit) are controlled, such that the output voltage (i.e. voltage provided by controlling the switched capacitor circuit) is equal to 1/( 2*(N+1)) of the input voltage (i.e. Vin). Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Rizzolatti et al. to improve performance of power conversion via implementation of multiple flying capacitors. 7. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lau (US 20210099085) in views of Rainer et al. (US 10651731), Rizzolatti et al. (US 20220224231) and Lai et al. (US 20210257907) and further in views of Yan et al. (US 20190280618). Regarding claim 5: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first magnet element is directly connected to the common terminal of the third power switch and the fourth power switch, and the first energy storage element is direly connected to the common terminal of the first power switch and the second power switch. Yan et al. disclose a voltage converter (i.e. figure 10) comprising the first magnet element (i.e. Laux) is directly connected to the common terminal (i.e. SW3) of the third power switch (i.e. Q3) and the fourth power switch (i.e. Q4), and the first energy storage element (i.e. Cfly) is direly connected to the common terminal (i.e. SW1) of the first power switch (i.e. Q1) and the second power switch (i.e. Q2). Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Lau’s invention with the converter as disclose by Yan et al. to minimize switching loss and allows for smaller magnetic components and faster response time. 8. Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Lau (US 20210099085) in views of Rainer et al. (US 10651731), Webb et al. (US 20200099302) and Rizzolatti et al. (US 20220224231) and further in view of Rainer et al. (US 10651731). Regarding claim 7: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose duty ratios of the first to the fourth power switches, the first N fifth power switches and the first N sixth power switches are respectively equal to 1/(N+1), switching states of the first power switch and the third power switch are the same, and switching states of the second power switch and the fourth power switch are the same, wherein the first power switch and the second power switch are under phase-shifted control, and a phase difference between turn-on moments of the first and second power switches is 360°/(N+1). However, Webb et al. discloses (i.e. figure 9) duty ratios of the first to the fourth power switches, the first N fifth power switches and the first N sixth power switches are respectively equal to 1/(N+1) (i.e. see duty ratio of PWM signal of switches M1-8), switching states of the first power switch and the third power switch are the same, and switching states of the second power switch and the fourth power switch are the same (i.e. see switching cycle for PWM 1/3; M2/4). Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the switching signal as disclose by Webb et al.’s invention to greatly improved efficiency when compared with a single-phase 7-switch ZIV converter. Rainer et al. disclose a converter comprising the first power switch and the second power switch are under phase-shifted control, and a phase difference between turn-on moments of the first and second power switches is 360°/(N+1) (i.e. Col. 7, lines 61 through Col. 8, lines 1-5). Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Rainer et al. to reduce switching losses and provides reasonably good power conversion efficiency. Regarding claim 8: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose switching states of a (2N+1)th fifth power switch and the second power switch are complementary, switching states of a (2N-n+1)th fifth power switch and a nth fifth power switch are complementary, switching states of a (2N+1)th sixth power switch and the third power switch are complementary, and switching states of a (2N-n+1)th sixth power switch and a nth sixth power switch are complementary, wherein n is less than or equal to N. However, Webb et al. discloses (i.e. figure 9) switching states of a (2N+1)th fifth power switch and the second power switch are complementary, switching states of a (2N-n+1)th fifth power switch and a nth fifth power switch are complementary, switching states of a (2N+1)th sixth power switch and the third power switch are complementary, and switching states of a (2N-n+1)th sixth power switch and a nth sixth power switch are complementary, wherein n is less than or equal to N (i.e. see duty ratio of PWM signal of switches M1-8). Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Webb et al.’s invention with the switching signal as disclose in figure 9 of Webb et al.’s invention to greatly improved efficiency when compared with a single-phase 7-switch ZIV converter. 9. Claims 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Lau (US 20210099085) in views of Rainer et al. (US 10651731) and further in view Yan et al. (US 20190280618). Regarding claim 21: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first magnetic element is directly connected to the common terminal of the third power switch and the fourth power switch, and the first energy storage element is direly connected to the common terminal of the first power switch and the second power switch. Yan et al. disclose a converter (i.e. figure 10) comprising the first magnetic element (i.e. Laux) is directly connected to the common terminal of the third power switch and the fourth power switch, and the first energy storage element (i.e. Cfly) is direly connected to the common terminal of the first power switch and the second power switch. Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Yan et al., because the efficiency of the hybrid converter circuit can be further improved if zero-voltage switching (ZVS) action of the switches is used in the circuit operation. Regarding claim 22: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first magnetic element is directly connected to the first energy storage element at a common terminal thereof. Yan et al. disclose a converter (i.e. figure 10) comprising the first magnetic element (i.e. Laux) is directly connected to the first energy storage element (i.e. Cfly) at a common terminal thereof. Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Yan et al., because the efficiency of the hybrid converter circuit can be further improved if zero-voltage switching (ZVS) action of the switches is used in the circuit operation. Regarding claim 23: Lau discloses the limitation of the claim(s) as discussed above, but does not specifically disclose wherein no other power switches are directly connected to the first magnetic element and the first energy storage element at the common terminal thereof. Yan et al. disclose a converter (i.e. figure 10) comprising wherein no other power switches (i.e. see configuration of figure 10) are directly connected to the first magnetic element (i.e. Laux) and the first energy storage element (i.e. Cfly) at the common terminal thereof. Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Lau’s invention with the converter as disclose by Yan et al., because the efficiency of the hybrid converter circuit can be further improved if zero-voltage switching (ZVS) action of the switches is used in the circuit operation. Response to Arguments 10. Applicant's arguments filed 10/06/25 have been fully considered but they are not persuasive. Applicant argues that “Lau in view of Rainer does not disclose or suggest: a first switched capacitor circuit coupled between the first node and the positive output terminal, and including N first flying capacitors and N first inductors, and each of the N first inductors is coupled im series with a corresponding one of the N first flying capacitors; a second switched capacitor circuit coupled between the second node and the positive output terminal, and including N second flying capacitors and N second inductors, and each of the N second inductors is coupled to a corresponding one of the N second flying capacitors; and where resonant frequencies of the power converter in each operation interval of one operation cycle are the same, and the power converter accordingly operates in a resonant state, as presently claimed in claim 1” The Examiner disagrees, because Rainer discloses (i.e. figures 3 and 9-1, equivalent shows in parentheses) the first switched capacitor circuit (i.e. Q1-Q6, Lres1-2, Lfly1, Cres1-2, Cfly1) comprises N first flying capacitors (i.e. Cres1-2, Cfly1) and N first inductors (i.e. Lres1-2, Lfly1), and each of the N first inductors (i.e. Lres1-2, Lfly1) is coupled in series with a corresponding one of the N first flying capacitors (i.e. Cres1-2, Cfly1); wherein the second switched capacitor circuit (i.e. Q11, Q12, Q13, Q14, Q7, Q8, Cres3-4, Lres3-4, Lfly2, Cfly2) comprises N second flying capacitors (i.e. Cfly2, Cres3-4) and N second inductors (i.e. Lres3-4, Lfly2), and each of the N second inductors (i.e. Lres3-4, Lfly2) is coupled to a corresponding one of the N second flying capacitors (i.e. Cfly2, Cres3-4): and wherein resonant frequencies of the power converter (i.e. frequency of power converter 930) in each operation interval of one operation cycle are the same (i.e. Cycle of Q1-8 and Q11-14, also see figure 3), and the power converter accordingly operates in a resonant state (i.e. state of the switching cycle). Allowable Subject Matter 11. Claims 9-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 12. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nguyen Tran/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

May 13, 2022
Application Filed
May 10, 2024
Non-Final Rejection — §103
Aug 12, 2024
Response Filed
Oct 02, 2024
Final Rejection — §103
Dec 19, 2024
Request for Continued Examination
Dec 20, 2024
Response after Non-Final Action
Jan 13, 2025
Non-Final Rejection — §103
Apr 09, 2025
Response Filed
Apr 21, 2025
Final Rejection — §103
Jul 09, 2025
Request for Continued Examination
Jul 11, 2025
Response after Non-Final Action
Jul 13, 2025
Non-Final Rejection — §103
Oct 06, 2025
Response Filed
Oct 11, 2025
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603568
POWER MODULE, TOTEM-POLE POWER FACTOR CORRECTION CIRCUIT, AND CONTROL CIRCUIT THEREOF
2y 5m to grant Granted Apr 14, 2026
Patent 12597842
SELECTIVE VOLTAGE BOOSTING FOR A RADIO SYSTEM
2y 5m to grant Granted Apr 07, 2026
Patent 12580495
PHASE INVERTER USING TRANSFORMER AND TRANSISTOR SWITCH
2y 5m to grant Granted Mar 17, 2026
Patent 12580485
PSEUDO-EMULATED PEAK CURRENT MODE FOR THREE-LEVEL BUCK CONVERTER
2y 5m to grant Granted Mar 17, 2026
Patent 12573935
CURRENT SAMPLING CIRCUIT AND MULTI-LEVEL CONVERTER
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

7-8
Expected OA Rounds
83%
Grant Probability
91%
With Interview (+7.6%)
2y 6m
Median Time to Grant
High
PTA Risk
Based on 1073 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month