Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a2) as being anticipated by Park(US 2017/0309559)..
Regarding claim 1, Park discloses a substrate(fig 1, 10), the substrate having a first side and a second side opposite the first side, the first side and the second side defining a height of the substrate; traces on the first side of the substrate(fig 1, 100, 110); and a dielectric film on the first side to cover at least a portion of the traces, at least part of the first side of the substrate not covered by the dielectric film(fig 1, 130).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Hayashi et al.(US 2013/0279134) .
Regarding claim 2, Park discloses a printed circuit board((fig 10, 1) which includes a semiconductor chip((fig 10, 500). Park does not disclose the traces include microstrip traces. However, Hayashi et al. discloses microstrip traces(para 0049) with a circuit board(FIG 1, 100) having a semiconductor chip(fig 1, 200). It would have been obvious to one skilled in the art at the time of the invention to use microstrip traces, as shown by Hayashi et al., with the circuit board of Park, since as shown by Hayashi et al. using microstrip traces on a circuit board which has a semiconductor chip attached to it is commonly used for carrying signals.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Sayanagi et al.(US 2002/0072147) .
Regarding claim 3 Park discloses wherein the first side of the substrate includes a first outer surface(fig 3, 10, the first side being layer 130 is attached to) , not disclose wherein the second outer surface is adjacent an isolating ground layer of the substrate. However, Sayanagi et al. discloses wherein the second outer surface is adjacent an isolating ground layer of the substrate(fig 11, 4). It would have been obvious to one skilled in the art at the time of the invention to use wherein the second outer surface is adjacent an isolating ground layer of the substrate as shown by SU et al., with the circuit board of Park, since having the second outer surface adjacent an isolating ground layer of the substrate so as to provide a ground required for the circuit board..
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Hosomi(US 7,531,751) and further in view of Fazelpour(US 6,762,494) .
Regarding claim 4 Park does not disclose wherein the substrate and the dielectric film have an impedance value in a range from approximately 75 Q to 95 Q.
However, Hosomi discloses controlling / matching of the impedance (see abstract), and further disclose a structure in figure 2, having impedance of 100 Ω, column 2, line 29-37). Fazelpour, microstrip structure (column 2, line 19-27) with establishing an impedance of 50 Ω (column 5, line 14-27). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of effective filing date of the application to provide the structure of Hosomi with the substrate and the dielectric film have an impedance value in a range from approximately 75 Ω to 95 Ω, as taught by Fazelpour (and Hosomi itself) in order to have desire electrical properties.
Additionally, it has been held that where the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Su et al.(US 2017/0079136) .
Regarding claim 5 Park does not disclose wherein the dielectric film includes a dielectric substrate with an adhesive. However SU et al. discloses wherein the dielectric film includes a dielectric substrate with an adhesive(para 0027; dielectric layers 13, adhesive layer 30). It would have been obvious to one skilled in the art at the time of the invention to use a dielectric film includes a dielectric substrate with an adhesive as shown by SU et al., with the circuit board of Park(place an adhesive layer between the dielectric layers fig 1, 130 and fig 1, 10), so as to better strengthen the adhesion between the two dielectric layers.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Fordham et al.(US 2018/0288889) ) in view of Hosomi(US 7,531,751) .
Regarding claim 6 Park does not disclose wherein the dielectric substrate includes polyamide. However, Fordham et al. discloses the dielectric substrate includes polyamide(para 0009). It would have been obvious to one skilled in the art at the time of the invention to use a dielectric substrate which includes polyamide as shown by Fordham et al., with the circuit board of Park, since this is a know durable material. Additionally, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious engineering choice. In re Leshin, 125 USPQ 416 (CCPA 1960).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) as detailed in claim rejection 1 above and further in view of Takano(US 2020/0015351) in view of Hosomi(US 7,531,751).
Regarding claim 7 Park does not disclose wherein the dielectric film and the substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5. However, Takano discloses wherein the dielectric film and the substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5(para 0057). Also, Hosomi discloses substrate with low-dielectric constant to control crosstalk, and noise, column 4, line 33-52). It would have been obvious to one skilled in the art at the time of the invention to use a substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5 as shown by Takano and Hosomi, with the circuit board of Park, since this is known to help control cross talk. Additionally, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious engineering choice. In re Leshin, 125 USPQ 416 (CCPA 1960).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559)
Regarding claim 8, Park does not disclose wherein the height is a first height, and the dielectric film includes a second height, a ratio of the second height to the first height being in a range from approximately 0.90 to 1.10. It would have been obvious to one skilled in the art at the time of the invention to the height is a first height, and .
Claim(s) 9, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) in view of Sayanagi et al.(US 2002/0072147) .
Regarding claim 9 Park: discloses a substrate including: at least one substrate layer(fig 1, 10), , and traces on an outer surface that at least partially defines a second side of the substrate(fig 1, 100, 110), the second side opposite the first side; and a dielectric film on the outer surface to cover at least a portion of the traces, the dielectric film to cover less than all of the outer surface associated with the second side of the substrate(fig 1, 130). . Park does not disclose wherein the second outer surface is adjacent an isolating ground layer of the substrate. However, Sayanagi et al. discloses wherein the second outer surface is adjacent an isolating ground layer of the substrate(fig 11, 4). It would have been obvious to one skilled in the art at the time of the invention to use wherein the second outer surface is adjacent an isolating ground layer of the substrate as shown by SU et al., with the circuit board of Park, since having the second outer surface adjacent an isolating ground layer of the substrate so as to provide a ground required for the circuit board..
Regarding claim 13, Park does not disclose wherein the height is a first height, and .
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) in view of Sayanagi et al.(US 2002/0072147) as detailed in claim rejection 9 above and further in view of Hayashi et al.(US 2013/0279134) .
Regarding claim 10, Park discloses a printed circuit board((fig 10, 1) which includes a semiconductor chip((fig 10, 500). Park does not disclose the traces include microstrip traces. However, Hayashi et al. discloses microstrip traces(para 0049) with a circuit board(FIG 1, 100) having a semiconductor chip(fig 1, 200). It would have been obvious to one skilled in the art at the time of the invention to use microstrip traces, as shown by Hayashi et al., with the circuit board of Park, since as shown by Hayashi et al. using microstrip traces on a circuit board which has a semiconductor chip attached to it is commonly used for carrying signals.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) in view of Sayanagi et al.(US 2002/0072147) as detailed in claim rejection 9 above and further in view of Fazelpour(US 6,762,494) ) in view of Hosomi(US 7,531,751) .
Regarding claim 11 Park does not disclose wherein the substrate and the dielectric film have an impedance value in a range from approximately 75 Q to 95 Q.
However, Hosomi discloses controlling / matching of the impedance (see abstract), and further disclose a structure in figure 2, having impedance of 100 Ω, column 2, line 29-37). Fazelpour, microstrip structure (column 2, line 19-27) with establishing an impedance of 50 Ω (column 5, line 14-27). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of effective filing date of the application to provide the structure of Hosomi with the substrate and the dielectric film have an impedance value in a range from approximately 75 Ω to 95 Ω, as taught by Fazelpour (and Hosomi itself) in order to have desire electrical properties.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) in view of Sayanagi et al.(US 2002/0072147as detailed in claim rejection 9 above and further in view of Takano(US 2020/0015351) in view of Hosomi(US 7,531,751).
Regarding claim 12 Park does not disclose wherein the dielectric film and the substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5. However, Takano discloses wherein the dielectric film and the substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5(para 0057). Also, Hosomi discloses substrate with low-dielectric constant to control crosstalk, and noise, column 4, line 33-52). It would have been obvious to one skilled in the art at the time of the invention to use a substrate correspond to a dielectric constant (Dk) value in a range from approximately 3.0 to 4.5 as shown by Takano and Hosomi, with the circuit board of Park, since this is known to help control cross talk. Additionally, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious engineering choice. In re Leshin, 125 USPQ 416 (CCPA 1960).
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2017/0309559) in view of Sayanagi et al.(US 2002/0072147) as detailed in claim rejection 9 above and further in view of Jiao(US 11,640,934) .
Regarding claim 14 Park does not disclose wherein the traces are differential traces, although Park does disclose a circuit board with a semiconductor chip(fig 10, 500). However, Jiao discloses a circuit board with a semiconductor chip(fig 3, 340) having differential traces(col 5, lines 40-45). It would have been obvious to one skilled in the art at the time of the invention to use differential traces as shown by Jaio, with the circuit board of Park, since having differential traces allows for signal transfer..
CONCLUSION
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/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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