DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/04/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 3, 7 and 9-11 rejected under 35 U.S.C. 103 as being unpatentable over Chen, US-PGPUB 2021/0063471 in view of the Applicant Admitted Prior Art, (only the portion of US-PGPUB 2022/0390509 as indicated below) (hereinafter AAPA) and Champoux, US Pat No. 10,884,847 (hereinafter Champoux)
Regarding Claim 1. Chen discloses a testing equipment, comprising: a machine, and a plurality of testing modules disposed on the machine (Fig. 1; Fig. 12; Paragraph [0111]), multiple testing modules), wherein each of the testing module includes a circuit board, a testing carrier disposed on the circuit board and carrying a target object (Paragraphs [0027], [0068], Figs. 1-2, testing a semiconductor wafer-form package that include dies or target objects, and sockets; Paragraph [0105], testing whether there is sufficient contact between the dies) and a processor disposed on the circuit board and electrically connected to the testing carrier (Paragraph [0031], automatic testing equipment. The processor, and “in some alternative embodiment, the processor or controller is a built-in component of the testing module), wherein the processor is used for processing the target information of the target object to calculate a detecting information of the target object (Paragraph [0031], controller 300 evaluating the test results), wherein the testing carrier is used for capturing a target information of the target object and for transmitting the target information to the processor via the circuit board (Paragraph [0031], sending testing signal and receiving the responsive signal and evaluating the test result; Paragraph [0068]). Note: Chen discloses that each testing module includes a circuit board with a processor as part of the built-in component. Although, Chen does not explicitly disclose a processor in each testing module, one of ordinary skill in the art would have obviously recognized that each circuit boards would have a built-in processor in one embodiment, involving multiple testing modules. Applicant’s argument in regard to a single controller for testing more than one testing module is merely one particular embodiment, and Chen is certainly not restricted to that particular embodiment. Furthermore, as known in the art, it is conventional to include a processor as part of the circuit board in each of the testing modules, as disclosed in AAPA in Fig. 1 (as indicated by control chip 12) as well as the control chip 12 returning the data back to the computer 1 as disclosed in Paragraph [0004]. As such, it would have been obvious to have a plurality of testing modules, with each testing modules including a processor, as claimed, based on what is already known.
Chen does not disclose a controller disposed on the circuit board and electrically connected to the processor, and wherein the controller is configured for operating the processor to export the detecting information to a computer via a transmission port of the circuit board.
Champoux disclose a controller disposed on the circuit board and electrically connected to the processor, and wherein the controller is configured for operating the processor to export the detecting information to a computer via a transmission port of the circuit board (Figs. 1-2; tester processor, and FPGA’s on each site modules with plurality of site modules and wherein tester processor controls FPGAs and sharing the processing load with FPGA, so FPGA are processors themselves; Col. 5, lines 16-67; Col. 6, lines 1-67; Col. 7, lines 1-44; Col. 8, lines 54-60 and Col. 11, lines 53-60, sending results to tester processor, wherein the result is eventually sent to the system controller. Note that the claims do not recite the controller operating the processor to directly export the information to the computer and it does not recite how the controller is configured to control the processor. Furthermore, even if the claim recites “directly,” sending the information directly to the system controller from the FPGA is an obvious variant to FPGA sending information to the intermediate tester processor which then routes it to the system controller)
As such, at the time of the invention filed, it would have been obvious to a person of ordinary skill in the art to use the teaching of Champoux in the modified Chen and have a controller disposed on the circuit board and electrically connected to the processor, and wherein the controller is configured for operating the processor to export the detecting information to a computer via a transmission port of the circuit board, so as to perform testing with more efficiency while reducing processing load on any specific processor.
Regarding Claim 3. Chen discloses the machine is electrically connected to the circuit board of each of the plurality of testing modules (Paragraph [0031], ATE; Paragraph [0111], multiple testing modules)
Regarding Claim 7. AAPA discloses a plurality of testing modules export the detecting information for compiling operations (Fig. 1; Paragraph [0004])
Regarding Claim 9. Chen discloses the controller is electrically connected to the circuit board (Paragraph [0031]; Figs. 1, 12)
Regarding Claim 10. Chen discloses the controller is electrically connected to the testing carrier (Paragraph [0031])
Regarding Claim 11. Chen discloses the transmission port electrically connected to the testing carrier (Figs. 2-15)
Response to Arguments
Applicant’s arguments with respect to claims have been considered but are moot in view of new grounds of rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HYUN D PARK whose telephone number is (571)270-7922. The examiner can normally be reached 11-4.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arleen Vazquez can be reached at 571-272-2619. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HYUN D PARK/Primary Examiner, Art Unit 2857
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