DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
General Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
When responding to this office action, applicants are advised to provide the examiner with line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs.
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(II) and Interview Practice for additional details.
Status of claim(s) to be treated in this office action:
Independent: 1 and 26.
Pending: 1-2, 4-7, 12-18 and 20-26.
Canceled: 3, 8-11 and 19.
New: 25-26.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/29/2025 has been entered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially
created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-2, 4-7, 12-18 and 20-26 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over (reference application(s)):
Claims 1-15 of U.S. Patent No. 11,335,570.
Although the claims at issue are not identical, they are not patentably distinct from each other as shown in the table below.
Instant Application
U.S. Patent No. 11,335,570
1. A microelectronic device, comprising: a die; intermediate pads on a side of the die, the intermediate pads having first surfaces facing a first direction, and second surfaces facing a second direction opposite from the first direction; wire bonds coupled between the die and the first surfaces of the intermediate pads; an encapsulation material surrounding the wire bonds, at least partially surrounding the die and contacting the die, and contacting the intermediate pads; and first gull-wing leads and second gull-wing leads on the side of the die, the first gull-wing leads and the second gull-wing leads attached to the second surfaces of a row of the intermediate pads, the first gull-wing leads having first external attachment surfaces external to the encapsulation material and aligned in a first row on a first side of the row of the intermediate pads, the second gull-wing leads having second external attachment surfaces external to the encapsulation material and aligned in a second row on a second side of the row of the intermediate pads opposing the first side of the row of the intermediate pads, the first row being between the second row and the side of the die, and the first external attachment surfaces and the second external attachment surfaces facing the second direction.
A microelectronic device, comprising: a first die; intermediate pads, wherein the intermediate pads are free of photolithographically-defined structures; wire bonds connecting the first die to the intermediate pads; an encapsulation material surrounding the wire bonds, at least partially surrounding the first die and contacting the first die, and contacting the intermediate pads; inner gull-wing leads contacting the intermediate pads, wherein: the inner gull-wing leads are located outside of the encapsulation material; each of the inner gull-wing leads has a first portion directly contacting the corresponding intermediate pad, a second portion continuous with the first portion and extending away from the intermediate pad, and a third portion continuous with the second portion, opposite from the first portion; the third portion includes an external attachment surface; the first portion extends laterally in a first direction from a boundary with the second portion, wherein the first direction is parallel to a surface of the encapsulation material containing the intermediate pads; the third portion extends laterally in a second direction, opposite from the first direction, from a boundary with the second portion; and the third portion is not coplanar with the first portion, being offset by the second portion; and outer gull-wing leads contacting the intermediate pads, wherein: the outer gull-wing leads are located outside of the encapsulation material; each of the outer gull-wing leads has a first portion directly contacting the corresponding intermediate pad, a second portion continuous with the first portion and extending away from the intermediate pad, and a third portion continuous with the second portion, opposite from the first portion; the third portion includes an external attachment surface; the first portion extends laterally in a first direction from a boundary with the second portion, wherein the first direction is parallel to a surface of the encapsulation material containing the intermediate pads; the third portion extends laterally in a second direction, opposite from the first direction, from a boundary with the second portion, wherein the first direction is parallel to the surface of the encapsulation material containing the intermediate pads; the third portion is not coplanar with the first portion, being offset by the second portion; and external attachment surfaces of the outer gull-wing leads are located outside of the external attachment surfaces of the inner gull-wing leads, wherein the external attachment surface of each outer gull-wing lead is located farther from a center of the first die than the external attachment surface of an inner gull-wing lead located adjacent to the outer gull-wing lead, wherein each of the intermediate pads includes a plurality of ribbon stitch bond strips.
Claim(s) 2,4-7.
Claim 1.
Claim(s) 16.
Claim 1.
Claim(s) 12-15,17-18, 20.
Claim(s) 2-9. Patent claim 7 recites every limitations of the inner gull-wing and the second/outer gull-wing lead located on two opposite sides of the die, as recited in application claims 18.
Re-claims 21-23, employing the plurality of studs having a same size or different sizes as well known in the arts, as evidently shown by Kawahara (20030132533), as applied above, would have been obvious to skill artisan, because of the desirability to employ the studs as anchors to prevent the pads from peeling off from the housing encapsulation material.
Re-claim 24-26, Patent claim 1 recites at last ten lines for inner gull-wing leads adjacent to outer gull-wing leads, inherently between the outer leads and recites first and third portions as showed in Fig. 4I, employing the first and third portions having a third portion wider than a first portion as well known in the arts, as evidently shown by Kawahara (20030132533), as applied above, would have been obvious to skill artisan, because of the desirability to obtain a better electrical connection with external components.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Response to Arguments
Applicant's arguments "Applicant Arguments/Remarks Made in an Amendment" with the "Amendment/Req. Reconsideration-After Final Reject" filed on 09/29/2025, have been fully considered, the arguments about 35 U.S.C. 102 and 35 U.S.C. 103 rejections are persuasives.
Allowable Subject Matter
Claim(s) 1-2, 4-7, 12-18 and 20-26 are allowed.
The following is an examiner’s statement of reasons for allowance:
The closest prior art to the present invention is Otremba et al. (US 20150270208 A1)
Otremba discloses a power semiconductor device including a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads.
Re: Independent Claim 1 (and dependents claims 2, 4-7, 12-18 and 20-25), there is no teaching or suggestion in the prior art of record to provide:
the second gull-wing leads having second external attachment surfaces aligned in a second row on a second side of the row of the intermediate pads opposing the first side of the row of the intermediate pads.
Re: Independent Claim 26, there is no teaching or suggestion in the prior art of record to provide:
wherein the first gull-wing leads are interleaved with the second gull-wing leads in a direction along the row of the intermediate pads.
Missing elements in the closest art gives rise to the innovation in the current invention. Therefore, the claim 26 is allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Do (US 20130154118 A1) teaches “INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MANUFACTURE THEREOF”. This document is related to a method of manufacture of an integrated circuit packaging system includes: forming an isolated contact 206 (Figs 2-3) having a contact protrusion 208; forming a die paddle 210, adjacent to the isolated contact, having a die paddle contour; depositing a contact pad 220 on the contact protrusion; coupling an integrated circuit die to the contact protrusion; molding an encapsulation 102 on the integrated circuit die; and depositing an organic filler 216 on and between the isolated contact and the die paddle, the contact protrusion extended past the organic filler.
Gong (US 20110244629 A1) teaches “PACKAGING PROCESS TO CREATE WETTABLE LEAD FLANK DURING BOARD ASSEMBLY”. This document is related to a method and apparatus are described for fabricating a low-pin-count chip package (701 in Fig 7) including a die pad (706) for receiving an integrated circuit device and a plurality of connection leads (702) having recessed lead ends (704) at the outer peripheral region of each contact lead. After forming the package body (202) over the integrated circuit device, unplated portions (104 in Figs 1-2) of the exposed bottom surface of the selectively plated lead frame are partially etched to form recessed lead ends (302 in Fig 3) at the outer peripheral region of each contact lead, and the recessed lead ends are subsequently re-plated (402) to provide wettable recessed lead ends at the outer peripheral region of each contact lead.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SANDRA MILENA RODRIGUEZ VILLANUEVA whose telephone number is (571)272-1936. The examiner can normally be reached Monday to Friday 7:00am-5:00pm (EST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ajay Ojha can be reached at (571) 272-8936. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SANDRA MILENA RODRIGUEZ VILLANUEVA/Examiner, Art Unit 2898
/AJAY OJHA/Supervisory Patent Examiner, Art Unit 2898 11/02/2025
Prosecution Insights