DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to Applicant’s Amendment filed on 9/24/2025. Claims 1, 4, 6, 11-12, 42, and 59-68 have been amended. No new claims have been added. Claims 5, 22, and 43 have been canceled. Claims 59-68 have been withdrawn. Currently, claims 1-4, 6-21, 23-42, and 44-58 are pending.
Response to Arguments
Applicant’s arguments, see pages 23-28, filed 9/24/2025, with respect to the rejection(s) of claim 5 (amended claim 1) under 35 USC § 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Nakatsugawa et al. (JP 2019207905 A).
Claim Objections
Claim 12 is objected to because in line 4, it appears that “have” should be “has”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 24-25, 33-35, and 44 are rejected under 35 U.S.C. 112(d) as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 24 depends directly on Claim 22, which has been canceled. Claim 44 depends directly on Claim 43, which has been canceled. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
For the purposes of examination with regard to the prior art, Claim 24 will be treated as directly depending from Claim 21, and Claim 44 will be treated as directly depending from Claim 42.
Claims 25 and 33-35, because they are dependent on claim 24, inherit the deficiency of claim 24.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4, 6, 21, 24, 42, 44-47, 49, 52-53, and 55-56 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation).
Regarding claim 1, Kohl teaches, in Fig. 5, a semiconductor module comprising:
an insulating circuit board (130, labeled as 30 in Fig. 1; col. 7, lines 10-15; col. 8, lines 25-35) having a circuit pattern (136; col. 8, lines 45-55) formed in one surface (see Fig. 5, top surface of insulating circuit board 130);
a semiconductor chip (120; col. 8, lines 35-40) placed in the insulating circuit board; and
a wiring portion (180; col. 8, lines 45-50) for electrically connecting the semiconductor chip and the circuit pattern,
wherein the wiring portion includes a chip connecting portion (B1; col. 8, lines 45-50) connected to the semiconductor chip (120),
wherein a surface (bottom surface) of the chip connecting portion includes:
a plurality of concave portions (cutouts A; col. 8, lines 40-50); and
a flat portion disposed between two concave portions (see Fig. 5, surface area between the two cutouts A).
Kohl does not explicitly teach a resin package that seals the semiconductor chip and the wiring portion, and that a surface in which the plurality of concave portions is formed includes a rough surface region having a developed interfacial area ratio of 0.2 or more, and wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area.
In a similar field of endeavor, Nakajima teaches a resin package (8; see Fig. 3B; col. 2, lines 60-65) that seals the semiconductor chip (30, Fig. 3B; col. 10, lines 10-20; labelled as 10 in Fig. 1B) and the wiring portion (51, col. 10, lines 10-20), and that a surface in which the plurality of concave portions (53; see Fig. 4B; col. 11, lines 50-55) is formed includes a rough surface region (54; Fig. 5A; col. 12, lines 40-45), because “the surface of the copper plate is roughened to improve the adhesion strength to a molding resin” (Abstract).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl with the resin package and rough surface region of Nakajima, in order to improve the adhesion strength to a molding resin.
Kohl in view of Nakajima does not explicitly teach that the rough surface region has a developed interfacial area ratio of 0.2 or more, wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area.
In a similar field of endeavor, Nakatsugawa teaches that the rough surface region has a developed interfacial area ratio of 0.2 or more ([0020], “0.3 or more and 0.8 or less,” which falls within the range of 0.2 or more), wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area ([0020]), “in order to obtain sufficient resin adhesion to the roughened surface portion” ([0021]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima with the developed interfacial area ratio of the rough surface region of Nakatsugawa, in order to obtain sufficient resin adhesion to the rough surface region ([0021]).
Regarding claim 4, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl further teaches a bonding layer for bonding the semiconductor chip and the chip connecting portion (col. 1, line 60 – col. 2, line 10; col. 4, lines 10-20), wherein the bonding layer is provided in inner portions of at least one concave portion of the plurality of concave portions (A) (col. 4, lines 10-20; see Fig. 5, solder layers enter the concave portions A).
Regarding claim 6, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Nakatsugawa further teaches that the rough surface region has a developed interfacial area ratio of 0.3 or more and 0.8 or less ([0020]).
However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the rough surface region has a developed interfacial area ratio of 0.7 or less. Nonetheless, the skilled artisan would know too that the surface roughness would impact resin adhesion to the rough surface region (Nakatsugawa, [0021]).
The specific claimed surface roughness, absent any criticality, is only considered to be the “optimum” surface roughness disclosed by Kohl in view of Nakajima and Nakatsugawa that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired resin adhesion, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as the rough surface region having a developed interfacial area ratio of 0.7 or less is used, as already suggested by Kohl in view of Nakajima and Nakatsugawa.
Since the applicant has not established the criticality (see next paragraph) of the surface roughness stated and since these levels of surface roughness are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima and Nakatsugawa.
Please note that the specification contains no disclosure of either the critical nature of the claimed surface roughness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 21, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl further teaches, in Fig. 5, that
the wiring portion (180) is a lead frame having a plate-shaped portion (see Fig. 5, surface area between the two cutouts A),
the flat portion (see Fig. 5, surface area between the two cutouts A) includes:
a standard portion (middle section of the flat portion); and a raised portion (surface area to the right and left of the middle section of the flat portion, and the area is raised with respect to the cutouts A) of which a height in a height direction perpendicular to a surface of the chip connecting portion is a same as that of the standard portion or raised in the height direction from the standard portion (see Fig. 5 how the heights of the standard portion and the raised portion are the same),
at least some concave portions of the plurality of concave portions (cutouts A) are disposed to be recessed from the standard portion in the height direction (see Fig. 5 how cutouts A are recessed in the vertical direction with respect to the standard portion), and
the raised portion is provided adjacent to the at least some concave portions (cutouts A) (see Fig. 5).
Regarding claim 24, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Nakajima further teaches that the plurality of concave portions (53) and the flat portion (surface area between 53) are formed in an upper surface of the chip connecting portion (51, see Fig. 4B).
Regarding claim 42, Kohl teaches a semiconductor module comprising:
an insulating circuit board (130, labeled as 30 in Fig. 1; col. 7, lines 10-15; col. 8, lines 25-35) having a circuit pattern (136; col. 8, lines 45-55) formed in one surface (see Fig. 5, top surface of insulating circuit board 130);
a semiconductor chip (120; col. 8, lines 35-40) placed in the insulating circuit board; and
a wiring portion (180; col. 8, lines 45-50) configured to connect the semiconductor chip and the circuit pattern.
Kohl does not explicitly teach that the wiring portion has a rough surface region having a developed interfacial area ratio of 0.2 or more in at least a part of a surface, and a resin package for protecting the semiconductor chip, wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area, wherein the developed interfacial area ratio of the rough surface region is larger than the developed interfacial area ratio of the circuit pattern, and wherein the developed interfacial area ratio of the circuit pattern excludes zero.
In a similar field of endeavor, Nakajima teaches that the wiring portion (51) has a rough surface region (54) (col. 12, lines 40-45; see Fig. 5B), and a resin package (8; see Fig. 3B; col. 2, lines 60-65) for protecting the semiconductor chip (30, Fig. 3B; col. 10, lines 10-20; labelled as 10 in Fig. 1B), and that the developed interfacial area ratio of the circuit pattern (Fig. 8B, area to left of 81 boundary) excludes zero (Figs. 3B and 8A-8B; col. 1, lines 15-30; col. 9, lines 40-45; col. 14, lines 15-25; wiring material 60 can be printed circuit plate with step 67 and groove 68, which leads to a non-zero developed interfacial area ratio), because it “improves the adhesion property between the leads and the sealing resin and sealing property of the molding resin” (col. 3, lines 50-55).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl with the wiring portion, resin package, and circuit pattern roughness of Nakajima, because it improves the adhesion property between the leads and the sealing resin and sealing property of the molding resin.
Kohl in view of Nakajima does not explicitly teach that the rough surface region has a developed interfacial area ratio of 0.2 or more in at least a part of a surface, wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area, and that the developed interfacial area ratio of the rough surface region is larger than the developed interfacial area ratio of the circuit pattern.
In a similar field of endeavor, Nakatsugawa teaches that the rough surface region has a developed interfacial area ratio of 0.2 or more ([0020], “0.3 or more and 0.8 or less,” which falls within the range of 0.2 or more), wherein the developed interfacial area ratio is an increase ratio of area compared to a completely flat area ([0020]), “in order to obtain sufficient resin adhesion to the roughened surface portion” ([0021]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima with the developed interfacial area ratio of the rough surface region of Nakatsugawa, in order to obtain sufficient resin adhesion to the rough surface region ([0021]).
However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the developed interfacial area ratio of the rough surface region is larger than the developed interfacial area ratio of the circuit pattern. Nonetheless, the skilled artisan would know too that the surface roughness of the rough surface region would impact resin adhesion to the rough surface region (Nakatsugawa, [0021]).
The specific claimed surface roughness, absent any criticality, is only considered to be the “optimum” surface roughness disclosed by Kohl in view of Nakajima and Nakatsugawa that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired resin adhesion, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as the developed interfacial area ratio of the rough surface region being larger than the developed interfacial area ratio of the circuit pattern is used, as already suggested by Kohl in view of Nakajima and Nakatsugawa.
Since the applicant has not established the criticality (see next paragraph) of the surface roughness stated and since these levels of surface roughness are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima and Nakatsugawa.
Please note that the specification contains no disclosure of either the critical nature of the claimed surface roughness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 44, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 43. However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the developed interfacial area ratio of the circuit pattern is 0.08 or less. Nonetheless, the skilled artisan would know too that the surface roughness of the circuit pattern would impact resin releasability (Nakatsugawa, [0011]).
The specific claimed surface roughness, absent any criticality, is only considered to be the “optimum” surface roughness disclosed by Kohl in view of Nakajima and Nakatsugawa that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired resin releasability, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as the developed interfacial area ratio of the circuit pattern being 0.08 or less is used, as already suggested by Kohl in view of Nakajima and Nakatsugawa.
Since the applicant has not established the criticality (see next paragraph) of the surface roughness stated and since these levels of surface roughness are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima and Nakatsugawa.
Please note that the specification contains no disclosure of either the critical nature of the claimed surface roughness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 45, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 42. Nakajima further teaches that an arithmetic average height of the rough surface region is 10 µm or less (col. 16, lines 25-35).
Regarding claim 46, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 42. Nakajima further teaches, in Fig. 4B, that a maximum average height of the rough surface region is 100 µm or less [(col. 16, lines 25-35).
However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a maximum height of the rough surface region is 100 µm or less. Nonetheless, the skilled artisan would know too that a height of the rough surface region would impact “adhesion strength to a molding resin” (Nakajima, Abstract).
The specific claimed height, absent any criticality, is only considered to be the “optimum” height disclosed by Kohl in view of Nakajima and Nakatsugawa that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired adhesion strength, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a maximum height of the rough surface region is 100 µm or less is used, as already suggested by Kohl in view of Nakajima and Nakatsugawa.
Since the applicant has not established the criticality (see next paragraph) of the heights stated and since these heights are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima and Nakatsugawa.
Please note that the specification contains no disclosure of either the critical nature of the claimed heights or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 47, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 42. Kohl further teaches, in Fig. 5, that the wiring portion is a lead frame (180; col. 8, lines 40-50) having a plate-shaped portion (see Fig. 5, flat surface area between the two cutouts A), and includes:
a chip connecting portion (B1; col. 8, lines 45-50) connected to the semiconductor chip (120);
a circuit pattern connecting portion (B3, Fig. 5) connected to the circuit pattern (136); and
a bridge portion for connecting the chip connecting portion and the circuit pattern connecting portion (see Fig. 5, bridge portion is middle portion of wiring portion 180 that is in between chip connecting portion B1 and circuit pattern connecting portion B3).
Nakajima further teaches, in Fig. 5B, that the rough surface region (54) is provided in the chip connecting portion (left portion of wiring portion 51 that is connected to semiconductor chip 30 that is labelled in Fig. 3A; col. 10, lines 10-15).
Regarding claim 49, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the developed interfacial area ratio of the circuit pattern connecting portion is smaller than the developed interfacial area ratio of the rough surface region of the chip connecting portion. Nonetheless, the skilled artisan would know too that surface roughness would impact “adhesion strength to a molding resin” (Nakajima, Abstract).
The specific claimed surface roughness, absent any criticality, is only considered to be the “optimum” surface roughness disclosed by Kohl in view of Nakajima and Nakatsugawa that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired resin adhesion strength, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as the developed interfacial area ratio of the circuit pattern connecting portion being smaller than the developed interfacial area ratio of the rough surface region of the chip connecting portion is used, as already suggested by Kohl in view of Nakajima and Nakatsugawa.
Since the applicant has not established the criticality (see next paragraph) of the surface roughness stated and since these surface roughness are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima and Nakatsugawa.
Please note that the specification contains no disclosure of either the critical nature of the claimed surface roughness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 52, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. Nakajima further teaches a coating layer (8, see Fig. 3B) for covering at least a part of a surface of the lead frame (51) and formed of a resin (col. 2, lines 60-65).
Regarding claim 53, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 52. Nakajima further teaches, in Fig. 3B, that the chip connecting portion (left portion of wiring portion 51) has an edge surface (left surface) farthest from the bridge portion (middle portion of wiring portion 51), and the coating layer (8) is provided in the edge surface (left surface of wiring portion 51).
Regarding claim 55, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 52. Nakajima further teaches that a surface of the coating layer (8, Fig. 3B) has irregularities corresponding to irregularities of the rough surface region (54, Fig. 5B, see how the surface of coating layer 8 that is in contact with rough surface region 54 would have irregularities corresponding to irregularities of the rough surface region 54).
Regarding claim 56, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 52. Nakajima further teaches that a surface of the coating layer (8, Fig. 3B, top surface) is flatter than the rough surface region (54, Fig. 5B).
Claims 2-3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over in view of Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Hu et al. (US 7859089).
Regarding claim 2, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a maximum width of each of the plurality of concave portions is 10 µm or more.
In a similar field of endeavor, Hu teaches, in Figs. 2A and 2B, that a maximum width of each of the plurality of concave portions (202) is 10 µm or more (col. 4, lines 10-15; 0.24 mm), “for better control of the solder joint between the contact and a die electrode(s) and for an improved connection between the contact and the die electrode(s)” (col. 4, lines 10-15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Hu, for better control of the solder joint between the contact and a die electrode and for an improved connection between the contact and the die electrode.
Regarding claim 3, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that an interval of centers of at least two concave portions which are adjacent among the plurality of concave portions is 10 µm or more.
In a similar field of endeavor, Hu teaches, in Figs. 3A and 3B, that an interval of centers of at least two concave portions (202) which are adjacent among the plurality of concave portions is 10 µm or more (col. 4, lines 10-20; the minimum distance between the centers of two concave portions 202 is 0.24 mm), “for better control of the solder joint between the contact and a die electrode(s) and for an improved connection between the contact and the die electrode(s)” (col. 4, lines 10-15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Hu, for better control of the solder joint between the contact and a die electrode and for an improved connection between the contact and the die electrode.
Regarding claim 7, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the plurality of concave portions is periodically disposed in at least two directions of at least any one surface of the chip connecting portion, and that any one surface of the chip connecting portion includes an unprocessed portion in which the periodic arrangement of the plurality of concave portions is interrupted.
In a similar field of endeavor, Hu teaches that the plurality of concave portions (202; col. 4, lines 10-15; 0.24 mm) is periodically disposed in at least two directions of at least any one surface of the chip connecting portion (see Fig. 3A how concave portions 202 are disposed in the vertical and horizontal direction), and that any one surface of the chip connecting portion includes an unprocessed portion in which the periodic arrangement of the plurality of concave portions is interrupted (see Fig. 3A how in the middle portion of 300a, the periodic arrangement of concave portions 202 is interrupted), “for better control of the solder joint between the contact and a die electrode(s) and for an improved connection between the contact and the die electrode(s)” (col. 4, lines 10-15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Hu, for better control of the solder joint between the contact and a die electrode and for an improved connection between the contact and the die electrode.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Katagiri et al. (JP 2017073406 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 8, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the plurality of concave portions and the flat portion are formed at least in an edge surface of the chip connecting portion.
In a similar field of endeavor, Katagiri teaches, in Fig. 8(b), that the plurality of concave portions (recesses in between 5b; [0043]) and the flat portion (left surface of middle 5b) are formed at least in an edge surface (left surface) of the chip connecting portion ([0034], [0043]; the part of electrode lead 5 outlined by Rjs), so that “the load acting on the joint portion joining electrode lead 5 and semiconductor element 4 is reduced, and the reliability of the joint portion can be improved” ([0043]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the edge surface of the chip connection portion of Katagiri, so that the load acting on the wiring portion is reduced, and the reliability of the wiring portion can be improved.
Claims 9-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and Katagiri et al. (JP 2017073406 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022, and further in view of Hu et al. (US 7859089).
Regarding claim 9, Kohl in view of Nakajima, Nakatsugawa, and Katagiri teaches the limitations of claim 8. Kohl in view of Nakajima, Nakatsugawa, and Katagiri does not explicitly teach that the plurality of concave portions is periodically disposed in at least two directions of the edge surface.
In a similar field of endeavor, Hu further teaches, in Fig. 3A, that the plurality of concave portions is periodically disposed in at least two directions of the edge surface (horizontal and vertical directions), “for better control of the solder joint between the contact and a die electrode(s) and for an improved connection between the contact and the die electrode(s)” (col. 4, lines 10-15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Katagiri with the concave portions of Hu, for better control of the solder joint between the contact and a die electrode and for an improved connection between the contact and the die electrode.
Regarding claim 10, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu teaches the limitations of claim 9. Kohl further teaches, in Fig. 2, that the plurality of concave portions (col. 7, lines 40-45) is disposed with a predetermined gap in a lateral direction parallel to a lower surface of the chip connecting portion (col. 7, lines 40-60), and
that the plurality of concave portions includes concave portions disposed side by side with the gap in a height direction perpendicular to the lateral direction (col. 7, lines 40-60).
Regarding claim 11, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu teaches the limitations of claim 10. However, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu does not explicitly teach that widths of at least one concave portion of the plurality of concave portions in the lateral direction are larger than a width of the gap. Nonetheless, the skilled artisan would know too that widths of concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed widths, absent any criticality, is only considered to be the “optimum” widths disclosed by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as widths of at least one concave portion of the plurality of concave portions in the lateral direction being larger than a width of the gap is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the widths stated and since these widths are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed widths or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 12, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu teaches the limitations of claim 9. Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu does not explicitly teach that at least one concave portion of the plurality of concave portions have a width in a lateral direction parallel to a lower surface of the chip connecting portion larger than a width in a height direction perpendicular to the lateral direction. Nonetheless, the skilled artisan would know too that widths of concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed widths, absent any criticality, is only considered to be the “optimum” widths disclosed by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as at least one concave portion of the plurality of concave portions having a width in a lateral direction parallel to a lower surface of the chip connecting portion larger than a width in a height direction perpendicular to the lateral direction is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the widths stated and since these widths are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed widths or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 13, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu teaches the limitations of claim 9. Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu does not explicitly teach that a density of concave portions in a lateral direction parallel to a lower surface of the chip connecting portion of the plurality of concave portions is higher than a density of concave portions in a height direction perpendicular to the lateral direction. Nonetheless, the skilled artisan would know too that distances between concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a density of concave portions in a lateral direction parallel to a lower surface of the chip connecting portion of the plurality of concave portions being higher than a density of concave portions in a height direction perpendicular to the lateral direction is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 14, Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu teaches the limitations of claim 9. Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu does not explicitly teach that a density of concave portions in a height direction perpendicular to a lower surface of the chip connecting portion of the plurality of concave portions is higher with increasing distance from the lower surface. Nonetheless, the skilled artisan would know too that distances between concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a density of concave portions in a height direction perpendicular to a lower surface of the chip connecting portion of the plurality of concave portions being higher with increasing distance from the lower surface is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claims 15 and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and Katagiri et al. (JP 2017073406 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022; and further in view of Miura (JP 2009004435 A, citations made hereinafter to the English machine translation filed by Applicant on April 6, 2025), cited by Applicant in the Information Disclosure Statement filed on April 6, 2025, and Kuroda (JP 2013118322 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 15, Kohl in view of Nakajima, Nakatsugawa, and Katagiri teaches the limitations of claim 8. Kohl in view of Nakajima, Nakatsugawa, and Katagiri does not explicitly teach that the chip connecting portion includes: a main material portion; and an inhibition portion formed of a material having solder wettability lower than the main material portion and disposed to be exposed at the edge surface.
In a similar field of endeavor, Miura teaches, in Fig. 11, that the chip connecting portion ([0066], left portion of 130 connected to 1) includes: a main material portion (131a and 131b, [0066]); and an inhibition portion (132, [0066]-[0067]) disposed to be exposed at the edge surface (left surface of 130), in order to “provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead” ([0006]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Katagiri with the chip connecting portion of Miura, in order to provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead.
Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Miura does not explicitly teach that the inhibition portion is formed of a material having solder wettability lower than the main material portion.
In a similar field of endeavor, Kuroda teaches that the inhibition portion (6, Fig. 2, [0030]) is formed of a material having solder wettability lower ([0032]) than the main material portion (3, 5c and 4; Fig. 1, [0030]), so that “the solder is suppressed from outflowing, for example horizontally, over this top surface 4a” ([0030], see Fig. 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, Katagiri, and Miura with the inhibition portion of Kuroda, so that the solder is suppressed from outflowing.
Regarding claim 17, Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda teaches the limitations of claim 15. Miura further teaches that the inhibition portion (131b) is stacked with the main material portion (131a and 131b) in a height direction perpendicular to a lower surface (bottom surface) of the chip connecting portion (130) (see Fig. 11 how 131a, 131b, and 132b are stacked vertically).
Regarding claim 18, Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda teaches the limitations of claim 15. Kuroda further teaches that the inhibition portion (6) is stacked with the main material portion (3a, 5c, and 4) in a direction perpendicular to the edge surface of the chip connecting portion (see Fig. 2 how 6 is horizontally stacked with 3a).
Regarding claim 19, Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda teaches the limitations of claim 15. Kuroda further teaches that the inhibition portion (6) protrudes or is recessed from the main material portion (3a, 5c, and 4) in a direction perpendicular to the edge surface of the chip connecting portion (see Fig. 2 how 6 is recessed horizontally from 4).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930); Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation); Katagiri et al. (JP 2017073406 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022; Miura (JP 2009004435 A, citations made hereinafter to the English machine translation filed by Applicant on April 6, 2025), cited by Applicant in the Information Disclosure Statement filed on April 6, 2025; and Kuroda (JP 2013118322 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022; and further in view of Kaizu et al. (US 11710709).
Regarding claim 16, Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda teaches the limitations of claim 15. Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda does not explicitly teach that in the edge surface, a width of the inhibition portion in a height direction perpendicular to a lower surface of the chip connecting portion is larger than a width of the main material portion in the height direction.
In a similar field of endeavor, Kaizu teaches, in Fig. 10, that in the edge surface (left surface), a width of the inhibition portion (20a) in a height direction (vertical) perpendicular to a lower surface of the chip connecting portion (20) is larger than a width of the main material portion (20b) in the height direction (col. 13, lines 30-40), so that “the thermal stress acting on each of the bonding members or the semiconductor chip can be reduced,” “warpage of the terminal member can be suppressed, and a local stress acting on each of the bonding members or the semiconductor chip can be suppressed” (col. 3, lines 25-35).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, Katagiri, Miura, and Kuroda with the inhibition portion and main material portion of Kaizu, so that the thermal stress acting on each of the bonding members or the semiconductor chip can be reduced, warpage of the terminal member can be suppressed, and a local stress acting on each of the bonding members or the semiconductor chip can be suppressed.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and Katagiri et al. (JP 2017073406 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022, and further in view of Yoneyama et al. (US 10714447).
Regarding claim 20, Kohl in view of Nakajima, Nakatsugawa, and Katagiri teaches the limitations of claim 8. Katagiri, in Fig. 8(b), further teaches that the plurality of concave portions (concave portions between 5b) and the flat portion (left surface of middle 5b) are formed in the edge surface (left surface) of the chip connection portion ([0034], [0043]; the part of electrode lead 5 outlined by Rjs).
Kohl in view of Nakajima, Nakatsugawa, and Katagiri does not explicitly teach that the plurality of concave portions and the flat portion are formed in a side surface and an upper surface of the chip connection portion.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in a side surface (right surface) and an upper surface (top surface) of the chip connection portion (31; col. 4, lines 40-60), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Katagiri with the side surface and upper surface of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Matsunaga et al. (JP 2008211168 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 23, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a depth of each of the plurality of concave portions is 20 µm or more and 200 µm or less.
In a similar field of endeavor, Matsunaga teaches, in Fig. 11, that a depth of each of the plurality of concave portions (9) is 20 µm or more and 200 µm or less ([0028], 20 to 50 µm), so that “the connection strength between the ribbon wire 1 and the ceramic layer 2 is improved, and peeling of the ribbon wire 1 can be more effectively suppressed” and “[a]s result, a highly reliable power semiconductor device 130 can be provided” ([0030]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Matsunaga, so that connection strength between the wiring portion and a ceramic layer is improved, peeling of the wiring portion can be more effectively suppressed, and a highly reliable power semiconductor device can be provided.
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Yoneyama et al. (US 10714447) and Matsunaga et al. (JP 2008211168 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 25, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 24. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the plurality of concave portions and the flat portion are formed in an edge surface of the chip connecting portion, and that a depth of at least one concave portion formed in the upper surface among the plurality of concave portions is deeper than a depth of at least one concave portion formed in the edge surface.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in an edge surface (left surface) of the chip connecting portion (31; col. 4, lines 40-60), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the edge surface of Yoneyama, in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
However, Kohl in view of Nakajima, Nakatsugawa, and Yoneyama does not explicitly teach that a depth of at least one concave portion formed in the upper surface among the plurality of concave portions is deeper than a depth of at least one concave portion formed in the edge surface. Nonetheless, the skilled artisan would know too that depths of concave portions would impact connection strength between the wiring portion and a ceramic layer (Matsunaga; [0030]).
The specific claimed depths, absent any criticality, is only considered to be the “optimum” depths disclosed by Kohl in view of Nakajima, Nakatsugawa, Yoneyama, and Matsunaga that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired connection strength between the wiring portion and a ceramic layer, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a depth of at least one concave portion formed in the upper surface among the plurality of concave portions being deeper than a depth of at least one concave portion formed in the edge surface is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Yoneyama, and Matsunaga.
Since the applicant has not established the criticality (see next paragraph) of the depths stated and since these depths are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Yoneyama, and Matsunaga.
Please note that the specification contains no disclosure of either the critical nature of the claimed depths or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claims 26 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Kamiyama et al. (US 9966327).
Regarding claim 26, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the plurality of concave portions includes a die hole.
In a similar field of endeavor, Kamiyama teaches that the plurality of concave portions includes a die hole (col. 6, lines 15-30), “in order to reduce the degree of package warping due to a temperature change” (col. 1, lines 50-60).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Kamiyama, in order to reduce the degree of package warping due to a temperature change.
Regarding claim 30, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that at least some concave portions of the plurality of concave portions are compressed more than the flat portion.
In a similar field of endeavor, Kamiyama teaches that at least some concave portions of the plurality of concave portions are compressed more than the flat portion (col. 6, lines 15-30), “in order to reduce the degree of package warping due to a temperature change” (col. 1, lines 50-60).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Kamiyama, in order to reduce the degree of package warping due to a temperature change.
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and Kamiyama et al. (US 9966327), and further in view of Yoneyama et al. (US 10714447).
Regarding claim 27, Kohl in view of in view of Nakajima, Nakatsugawa, and Kamiyama teaches the limitations of claim 26. Kohl in view of Nakajima, Nakatsugawa, and Kamiyama does not explicitly teach that the plurality of concave portions includes a laser hole.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) includes a laser hole (col. 6, lines 30-40), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Kamiyama with the concave portions of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Hasegawa et al. (US 8866279).
Regarding claim 28, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Nakajima further teaches, in Figure 4B, that the plurality of concave portions (53; col. 11, lines 50-55) and the flat portion (surface between concave portions 53) are formed in an upper surface of the chip connecting portion (51; col. 12, lines 40-45).
Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a shape of each of the plurality of concave portions in the upper surface is a polygonal shape.
In a similar field of endeavor, Hasegawa teaches that a shape of each of the plurality of concave portions (324, Fig. 5B) in the upper surface (of chip connecting portion 101) is a polygonal shape (see Fig. 4B; col. 7, lines 15-20; triangle), to have “a semiconductor device which has both a reduced size and improved heat dissipation characteristics” (col. 2, lines 5-10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the upper surface and concave portions of Hasegawa, in order to have a semiconductor device which has both a reduced size and improved heat dissipation characteristics.
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and Hasegawa et al. (US 8866279), and further in view of Yoneyama et al. (US 10714447).
Regarding claim 29, Kohl in view of Nakajima, Nakatsugawa, and Hasegawa teaches the limitations of claim 28. Kohl in view of Nakajima, Nakatsugawa, and Hasegawa does not explicitly teach that the plurality of concave portions and the flat portion are formed in an edge surface of the chip connecting portion, and a shape of each of the plurality of concave portions in the edge surface has a curved line.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in a side surface (right surface) of the chip connection portion (31; col. 4, lines 40-60), and a shape of each of the plurality of concave portions (31b) in the edge surface has a curved line (see Fig. 8), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Hasegawa with the edge surface and concave portions of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Yoneyama et al. (US 10714447) and Kobayashi et al. (JP 2018067600 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 31, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 21. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the plurality of concave portions and the flat portion are formed in an upper surface and an edge surface of the chip connecting portion, and that a bottom portion of at least one concave portion formed in the upper surface among the plurality of concave portions is disposed on an opposite side to the edge surface of the chip connecting portion with respect to a center of the concave portion.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in an upper surface (top surface) and an edge surface (left surface) of the chip connecting portion (31; col. 4, lines 40-60), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the side surface and upper surface of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
Kohl in view of Nakajima, Nakatsugawa, and Yoneyama does not explicitly teach that a bottom portion of at least one concave portion formed in the upper surface among the plurality of concave portions is disposed on an opposite side to the edge surface of the chip connecting portion with respect to a center of the concave portion.
In a similar field of endeavor, Kobayashi teaches, in Fig. 14, that a bottom portion of at least one concave portion (26) formed in the upper surface (top surface of 2) among the plurality of concave portions (26) is disposed on an opposite side to the edge surface (right surface) of the chip connecting portion (2, [0006]) with respect to a center of the concave portion (see Fig. 14 how the bottom portion of 26 is disposed to the left of the center of 26), in order to “improve adhesion to a resin member ([0004]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, and Yoneyama with the concave portions of Kobayashi, in order to improve adhesion to a resin member.
Claim 32 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), Yoneyama et al. (US 10714447) and Kobayashi et al. (JP 2018067600 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022; and further in view of Matsunaga et al. (JP 2008211168 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 32, Kohl in view of Nakajima, Nakatsugawa, Yoneyama, and Kobayashi teaches the limitations of claim 31. However, Kohl in view of Nakajima, Nakatsugawa, Yoneyama, and Kobayashi does not explicitly teach that a depth of a concave portion formed in the upper surface among the plurality of concave portions becomes shallower with increasing distance from the edge surface. Nonetheless, the skilled artisan would know too that depths of concave portions would impact connection strength between the wiring portion and a ceramic layer (Matsunaga; [0030]).
The specific claimed depths, absent any criticality, is only considered to be the “optimum” depths disclosed by Kohl in view of Nakajima, Nakatsugawa, Yoneyama, Kobayashi, and Matsunaga that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired connection strength between the wiring portion and a ceramic layer, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a depth of at least one concave portion formed in the upper surface among the plurality of concave portions being deeper than a depth of at least one concave portion formed in the edge surface is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Yoneyama, Kobayashi, and Matsunaga.
Since the applicant has not established the criticality (see next paragraph) of the depths stated and since these depths are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Yoneyama, Kobayashi, and Matsunaga.
Please note that the specification contains no disclosure of either the critical nature of the claimed depths or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Nakamura (JP 2018046214 A, citations made hereinafter to the English machine translation attached to the Office Action mailed on 5/30/2025), and Hu et al. (US 7859089).
Regarding claim 33, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 24. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a shortest distance between the plurality of concave portions and at least one end side of the surface is larger than an interval of concave portions which are adjacent among the plurality of concave portions. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]), and that a interval of concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a shortest distance between the plurality of concave portions and at least one end side of the surface being larger than an interval of concave portions which are adjacent among the plurality of concave portions is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claims 34-35 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930), Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), Nakamura (JP 2018046214 A, citations made hereinafter to the English machine translation attached to the Office Action mailed on 5/30/2025), and Hu et al. (US 7859089), and further in view of Yoneyama et al. (US 10714447).
Regarding claim 34, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 33. Nakajima further teaches that the upper surface (top surface) of the chip connecting portion and the edge surface (left surface) of the chip connecting portion (51) are connected at an end side (see Fig. 4B, left surface of 51).
Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu does not explicitly teach that the plurality of concave portions and the flat portion are formed in an edge surface of the chip connecting portion, and that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side is larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the end side.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in an edge surface (left surface) of the chip connecting portion (31; col. 4, lines 40-60), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu with the edge surface of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
However, Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama does not explicitly teach that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side is larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the end side. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side being larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the end side is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 35, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 33. Nakajima further teaches that the upper surface (top surface) of the chip connecting portion and the side surface (right surface) of the chip connecting portion (51) are connected at an end side (see Fig. 4B, right surface of 51).
Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu does not explicitly teach that the plurality of concave portions and the flat portion are formed in a side surface of the chip connecting portion and that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side is larger than a shortest distance between a concave portion formed in the side surface of the chip connecting portion and the end side.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8, that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in an side surface (right surface) of the chip connecting portion (31; col. 4, lines 40-60), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu with the side surface of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
However, Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama does not explicitly teach that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side is larger than a shortest distance between a concave portion formed in the side surface of the chip connecting portion and the end side. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the end side being larger than a shortest distance between a concave portion formed in the side surface of the chip connecting portion and the end side is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claim 36 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Kobayashi et al. (JP 2018067600 A, citations made hereinafter to the English machine translation filed by Applicant on 5/19/2022), cited by Applicant in the Information Disclosure Statement filed on 5/19/2022.
Regarding claim 36, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the surface is provided with: an overlapping portion where adjacent concave portions among the plurality of concave portions overlap each other; and a non-overlapping portion where the flat portion is provided between adjacent concave portions among the plurality of concave portions, and the overlapping portion is provided inside the surface as compared with the non-overlapping portion.
In a similar field of endeavor, Kobayashi teaches, in Fig. 18, that the surface (top surface of 2, [0006]) is provided with: an overlapping portion where adjacent concave portions among the plurality of concave portions (26) overlap each other (see Fig. 18, 25); and a non-overlapping portion where the flat portion is provided between adjacent concave portions among the plurality of concave portions (see Fig. 18, flat surfaces between areas 25), and the overlapping portion is provided inside the surface as compared with the non-overlapping portion (see Fig. 14 how overlapping portion 26 is inside the surface of 2), in order to “improve adhesion to a resin member ([0004]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the concave portions of Kobayashi, in order to improve adhesion to a resin member.
Claims 37-40 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Nakamura (JP 2018046214 A, citations made hereinafter to the English machine translation attached to the Office Action mailed on 5/30/2025) and Hu et al. (US 7859089).
Regarding claim 37, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 1. Nakajima further teaches, in Figure 4B, that the plurality of concave portions (53; col. 11, lines 50-55) and the flat portion (surface between concave portions 53) are formed in an upper surface of the chip connecting portion (51; col. 12, lines 40-45), and that the upper surface has a first end side (left side) and a second end side opposite to the first end side (right side).
However, Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a maximum distance in intervals of concave portions sandwiched between the first end side and the second end side among the plurality of concave portions is larger than a first shortest distance between a concave portion formed in the upper surface of the chip connecting portion and the first end side and a second shortest distance between a concave portion formed in the upper surface of the chip connecting portion and the second end side. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]), and that a interval of concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a maximum distance in intervals of concave portions sandwiched between the first end side and the second end side among the plurality of concave portions being larger than a first shortest distance between a concave portion formed in the upper surface of the chip connecting portion and the first end side and a second shortest distance between a concave portion formed in the upper surface of the chip connecting portion and the second end side is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 38, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 37. However, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu does not explicitly teach that an interval of concave portions at a center between the first end side and the second end side of the upper surface of the chip connecting portion among the plurality of concave portions is larger than the first shortest distance and the second shortest distance. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]), and that a interval of concave portions would impact “control of the solder joint between the contact and a die electrode(s)” and “connection between the contact and the die electrode(s)” (Hu; col. 4, lines 10-15).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, solder joint control, contact/die electrode connection, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as that an interval of concave portions at a center between the first end side and the second end side of the upper surface of the chip connecting portion among the plurality of concave portions being larger than the first shortest distance and the second shortest distance is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 39, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 37. Hu further teaches, in Figs. 3A and 3B, that an interval of concave portions (202) at a center between the first end side (left side of 303a) and the second end side of the upper surface of the chip connecting portion (right side of 303a) among the plurality of concave portions (202) is the maximum distance (col. 4, lines 10-20).
Regarding claim 40, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 37. Hu further teaches, in Figs. 3A and 3B, that the upper surface further has a third end side (top side of 300a) in contact with the first end side (left side of 300a) and the second end side (right side of 300a).
However, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu does not explicitly teach that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the third end side is larger than the first shortest distance and the second shortest distance. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the third end side being larger than the first shortest distance and the second shortest distance is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claim 41 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), Nakamura (JP 2018046214 A, citations made hereinafter to the English machine translation attached to the Office Action mailed on 5/30/2025), and Hu et al. (US 7859089), and further in view of Yoneyama et al. (US 10714447).
Regarding claim 41, Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu teaches the limitations of claim 40. Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu does not explicitly teach that the plurality of concave portions and the flat portion are formed in an edge surface of the chip connecting portion, the upper surface of the chip connecting portion and the edge surface of the chip connecting portion are connected at the third end side, and that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the third end side is larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the third end side.
In a similar field of endeavor, Yoneyama teaches, in Fig. 8 that the plurality of concave portions (31b) and the flat portion (surface between concave portions 31b) are formed in an edge surface (left surface) of the chip connecting portion (31; col. 4, lines 40-60), and that the upper surface (top surface) of the chip connecting portion and the edge surface of the chip connecting portion are connected at the third end side (left surface), in order to “reduce impedance in a high-frequency switching operation” (col. 6, lines 40-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima, Nakatsugawa, Nakamura, and Hu with the edge surface and third end side of Yoneyama, in order to reduce impedance in a high-frequency switching operation.
However, Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama does not explicitly teach that a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the third end side is larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the third end side. Nonetheless, the skilled artisan would know too that a distance between a concave portion and an end side of a surface would impact “spreading of the solder” (Nakamura; see Fig. 3; [0046]).
The specific claimed distances, absent any criticality, is only considered to be the “optimum” distances disclosed by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama that a person having ordinary skill in the art would have been able to determine using routine experimentation (see In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)) based, among other things, on the desired solder spreading, manufacturing costs, etc. (see In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e. results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a shortest distance between a concave portion formed in the upper surface of the chip connecting portion among the plurality of concave portions and the third end side being larger than a shortest distance between a concave portion formed in the edge surface of the chip connecting portion and the third end side is used, as already suggested by Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Since the applicant has not established the criticality (see next paragraph) of the distances stated and since these distances are in common use in similar devices in the art, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these values in the device of Kohl in view of Nakajima, Nakatsugawa, Nakamura, Hu, and Yoneyama.
Please note that the specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Claim 48 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Ooshima et al. (US 10373889).
Regarding claim 48, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that an area of the chip connecting portion is larger than an area of the circuit pattern connecting portion.
In a similar field of endeavor, Ooshima teaches, in Fig. 6, that an area of the chip connecting portion (192; col. 10, lines 20-30) is larger than an area of the circuit pattern connecting portion (194; col. 10, lines 35-45), in order “to restrict the peeling of the sealing resin body” (col. 19, lines 35-40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the areas of Ooshima, in order to restrict the peeling of the sealing resin body.
Claims 50-51 are rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Miura (JP 2009004435 A, citations made hereinafter to the English machine translation filed by Applicant on April 6, 2025), cited by Applicant in the Information Disclosure Statement filed on April 6, 2025.
Regarding claim 50, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the bridge portion has an opening.
In a similar field of endeavor, Miura teaches, in Fig. 8, that the bridge portion (102) has an opening (106) ([0050]-[0052]), in order to “provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead” ([0006]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the bridge portion of Miura, in order to provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead.
Regarding claim 51, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a lower surface of the chip connecting portion or a lower surface of the circuit pattern connecting portion has a protrusion protruding toward the insulating circuit board.
In a similar field of endeavor, Miura teaches, in Fig. 9(a), that a lower surface (bottom surface) of the chip connecting portion or a lower surface of the circuit pattern connecting portion (110, [0061]) has a protrusion protruding toward the insulating circuit board (see in Fig. 9(a) how the recesses 111 on the lower surface form protrusions protruding toward the circuit board below), in order to “provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead” ([0006]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the lower surface of Miura, in order to provide a semiconductor device capable of reducing resistance to a high frequency current in a strap connecting a semiconductor chip and a lead.
Claim 54 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Paulus et al. (US 7868430).
Regarding claim 54, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 52. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that a film thickness of the coating layer is 1 µm or more and 100 µm or less.
In a similar field of endeavor, Paulus teaches that a film thickness (D) of the coating layer (11) is 1 µm or more and 100 µm or less (col. 3, lines 20-30), in order to “improve reliability, reduce size, and to decrease manufacturing costs” (col. 1, lines 10-15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the coating layer thickness of Paulus, in order to improve reliability, reduce size, and to decrease manufacturing costs.
Claim 57 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Yoneyama et al. (US 10714447).
Regarding claim 57, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 52. Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the resin package includes a resin case surrounding the insulating circuit board and a resin filled in the resin case.
In a similar field of endeavor, Yoneyama teaches, in Fig. 11, that the resin package (24 and 25) includes a resin case (25) surrounding the insulating circuit board (12, 13b, and 14) and a resin (24) filled in the resin case (col. 3, lines 55-60), in order to “increase reliability and lengthen a life of a device” (col. 2, lines 20-25).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the resin package of Yoneyama, in order to increase reliability and lengthen a life of a device.
Claim 58 is rejected under 35 U.S.C. 103 as being unpatentable over Kohl et al. (US 9406592) in view of Nakajima et al. (US 6849930) and Nakatsugawa et al. (JP 2019207905 A, citations made hereinafter to the attached English Machine Translation), and further in view of Kamiyama et al. (US 9966327).
Regarding claim 58, Kohl in view of Nakajima and Nakatsugawa teaches the limitations of claim 47. Kohl further teaches that the chip connecting portion (B1) has a lower surface (bottom surface) facing the semiconductor chip (120), and that the lower surface of the chip connecting portion has a first side farthest from the bridge portion (see Fig. 5, right side of B1).
Kohl in view of Nakajima and Nakatsugawa does not explicitly teach that the lower surface of the chip connecting portion is provided with a step or an inclination along the first side over a length of half or more of the first side.
In a similar field of endeavor, Kamiyama teaches, in Figs. 3D and 4B, that the lower surface of the chip connecting portion (11) is provided with a step or an inclination (6) along the first side over a length of half or more of the first side (see Fig. 3D, entire length of right side) (col. 6, lines 20-30) “in order to reduce the degree of package warping due to a temperature change” (col. 1, lines 50-60).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor module of Kohl in view of Nakajima and Nakatsugawa with the lower surface of Kamiyama, in order to reduce the degree of package warping due to a temperature change.
Conclusion
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/ERIKA H SON/Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893