Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 3-7 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Kasahara (US 20170207148 A1).
Regarding claim 1, Kasahara discloses a lead frame (Fig. 2C, unit lead frame 30) comprising:
A first frame member (frame 31) including a die pad (Chip mounting part 311);
PNG
media_image1.png
507
1034
media_image1.png
Greyscale
A second frame member (frame 32) that is layered on the first frame member (Fig. 2C shows frame 32 layered on frame 31) and that includes a lead (Lead 322) and a pad (Shown, pads are defined as small, conductive surface areas of a die of an integrated circuit); and
A resin (Resin portion 39) with which a space around the die pad (Fig. 2C shows resin filling space around chip mounting part 311), the lead (Fig. 2C shows resin filling space around lead 322), and the pad is filled (Fig. 2C shows resin filling space around pad),
Wherein the die pad includes a rising portion (Shown) and a buried portion (Shown),
The rising portion rises from the resin (Shown),
The buried portion is buried in the resin (Shown) and has a mount surface (Upper surface of chip mounting part 311) on which a semiconductor element is to be mounted (Para. 42 “…a semiconductor chip mounted on the chip mounting portion 311”; Fig. 6 shows semiconductor chip 51 mounted on mount surface) and a side surface that is continuous to the mount surface (Shown),
The side surface is covered with the resin (Fig. 2C shows side surface being covered with resin portion 39) and has a constriction (Concave portion 31z) that is depressed in a direction parallel to the mount surface (Shown),
PNG
media_image2.png
103
261
media_image2.png
Greyscale
The pad is arranged along a circumference of the mount surface (Fig. 2C shows pad arranged along the outer end of the mount surface 311), a lower end of the pad being positioned in the resin and an upper end of the pad rising from the resin (Shown),
The side surface and an outer surface of the lower end of the pad are covered continuously by the resin (Shown),
The mount surface is coplanar with a surface on which the second frame member is layered on the first frame member (shown in Fig. 2C; lower surface of second frame member is coplanar with mount surface), and
The constriction is located below the surface (see Fig. 3C; the constriction is shown being lower than the mount surface, and therefore lower than the surface on which the second frame member is layered on the first frame member) and is depressed deeper than the outer surface of the lower end of the pad (attached figures show that constriction is depressed deeper than the outer surface of the upper region of the lower end of the pad).
PNG
media_image3.png
196
423
media_image3.png
Greyscale
PNG
media_image4.png
211
822
media_image4.png
Greyscale
Regarding claim 3, Kasahara discloses the lead frame according to claim 1 (See comments on claim 1), wherein the die pad (Chip mounting part 311) includes an extending portion (Shown) that is formed on an outer circumference of the rising portion (Shown; see figure above) and that extends to an outer side with respect to the rising portion along a surface of the resin (Shown).
PNG
media_image5.png
211
822
media_image5.png
Greyscale
Regarding claim 4, Kasahara discloses the lead frame according to claim 3 (See comments on claim 3), wherein the extending portion extends to a position corresponding to the lead on the surface of the resin (Shown).
Regarding claim 5, Kasahara discloses a semiconductor device (Fig. 6, semiconductor device 5) comprising:
A lead frame (Fig. 6, seen best in Fig. 2C, unit lead frame 30);
A semiconductor element (Fig. 6, semiconductor chip 51) that is mounted on the lead frame (Shown in Fig. 6); and
A sealing resin (Sealing resin 53) that seals the semiconductor element (Shown in Fig. 6),
Wherein the lead frame includes
A first frame member (Frame 31) including a die pad (Chip mounting part 311);
A second frame member (Frame 32) that is layered on the first frame member (Fig. 2C shows frame 32 layered on frame 31) and that includes a lead (Lead 322) and a pad (Shown, pads are defined as small, conductive surface areas of a die of an integrated circuit); and
A resin (Resin portion 39) with which a space around the die pad (Fig. 2C shows resin filling space around chip mounting part 311), the lead (Fig. 2C shows resin filling space around lead 322), and the pad is filled (Fig. 2C shows resin filling space around pad),
The die pad includes a rising portion (Shown) and a buried portion (Shown),
The rising portion rises from the resin (Shown),
PNG
media_image1.png
507
1034
media_image1.png
Greyscale
The buried portion is buried in the resin (Shown) and has a mount surface (Upper surface of chip mounting part 311) on which the semiconductor element is mounted (Para. 42 “…a semiconductor chip mounted on the chip mounting portion 311”; Fig. 6 shows semiconductor chip 51 mounted on mount surface) and a side surface that is continuous to the mount surface (Shown),
The side surface is covered with the resin (Fig. 2C shows side surface being covered with resin portion 39) and has a constriction (Concave portion 31z) that is depressed in a direction parallel to the mount surface (Shown),
PNG
media_image2.png
103
261
media_image2.png
Greyscale
The pad is arranged along a circumference of the mount surface (Fig. 2C shows pad arranged along the outer end of the mount surface 311), a lower end of the pad being positioned in the resin and an upper end of the pad rising from the resin (Shown), and
The side surface and an outer surface of the lower end of the pad are covered continuously be the resin (Shown), the mount surface is coplanar with a surface on which the second frame member is layered on the first frame member (shown in Fig. 2C; lower surface of second frame member is coplanar with mount surface), and the constriction is located below the surface (see Fig. 3C; the constriction is shown being lower than the mount surface, and therefore lower than the surface on which the second frame member is layered on the first frame member) and is depressed deeper than the outer surface of the lower end of the pad (attached figures show that constriction is depressed deeper than upper region of lower end of pad).
PNG
media_image3.png
196
423
media_image3.png
Greyscale
PNG
media_image6.png
317
1233
media_image6.png
Greyscale
Regarding claim 6, Kasahara discloses the lead frame according to claim 1, wherein a bottom of the constriction is positioned in a more inner position in the buried portion than the circumference of the mount surface and overlaps, in a plan view, the pad (see attached figure).
PNG
media_image6.png
317
1233
media_image6.png
Greyscale
Regarding claim 7, Kasahara discloses the semiconductor device according to claim 5, wherein a bottom of the constriction is positioned in a more inner position in the buried portion than the circumference of the mount surface and overlaps, in plan view, the pad.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kasahara (US 20170207148 A1) in view of Yamaguchi (US 10622286 B2).
Regarding claim 2, Kasahara discloses the lead frame according to claim 1. However, Kasahara does not explicitly disclose wherein a bottom of the constriction is positioned in a more inner position in the buried portion than a circumference of the mount surface.
On the other hand, Yamaguchi discloses wherein a bottom (Fig. 1, horizontally deepest portion 2a) of the constriction (Concavity 2) is positioned in a more inner position of a frame than a circumference (Fig. 1, 2c outer edge of mount surface 4) of the mount surface (Pads 4). It would have been obvious to one of ordinary skill in the art at the time of the effective filing of the invention to modify Kasahara according to the teachings of Yamaguchi such that Kasahara's concave portion 31z would have a bottom that is position in a more inner position in the buried portion that a circumference of the mount surface, in order to allow more contact and better adhesion between the lead frame and resin in order to avoid deformation or detachment.
Response to Arguments
Applicant's arguments filed 12/8/2025 have been fully considered but they are not persuasive. Kasahara reads on the limitations of amended claims 1 and 5, because Kasahara teaches a mount surface (upper surface of frame 31) being coplanar with a surface (lower surface of frame 32) on which the second frame member is layered on the first frame member, and the constriction being located below the surface (see Fig. 3C; the constriction is shown being lower than the mount surface, and therefore lower than the surface on which the second frame member is layered on the first frame member).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL J SMITH whose telephone number is (703)756-5706. The examiner can normally be reached M-F 8-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at (571) 272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/S.J.S./Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
Prosecution Insights