Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/29/2025 has been entered.
Claim Status
Previous action: claims 13 through 19 and 21 rejected.
Present action: claims 13 through 16, 18, 19 and 21 rejected
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schubert (US 2017/0288087) in view of Shu (US 9312434) in view of King (US 2004/0222357)
Regarding claim 13.
Schubert teaches a semiconductor light emitting element assembly comprising: […]; and a semiconductor light emitting element (fig 3d:; [para 0058]) including a first etching layer (fig 3a,3d:315; [para 0063]), […]on the first etching layer (fig 3a,3d:315; [para 0063]), a first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]) […], an active layer (fig 3a,3d:325; [para 0063]) on the first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]), and a second conductivity-type semiconductor layer (fig 3a,3d:330; [para 0064]) on the active layer (fig 3a,3d:325; [para 0063]), […], wherein a concentration of impurities (fig 3a:n++; [para 0061]) in the first etching layer (fig 3a,3d:315; [para 0063]) is higher than the concentration of impurities (fig 3a:n-; [para 0062]) in the first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]) […], and wherein the first etching layer (fig 3a,3d:315; [para 0063]) includes an uneven structure (partially removed porous network ; [para 0033,0034]) […].
Schubert does not teach an etching protection layer
Shu teaches a semiconductor light emitting element assembly comprising: a semiconductor light emitting element including a first etching layer (fig 3:2; [column 3 line 2]), an etching protection layer (fig 3:3-1; [column 3 line 13]) on the first etching layer (fig 3:2; [column 3 line 2]), a first conductivity-type semiconductor layer (fig 3:3-2; [column 3 line 12]) on the etching protection layer (fig 3:3-1; [column 3 line 13]),
wherein a concentration of impurities (undoped ; [column 3 line 15]) in the etching protection layer (fig 3:3-1; [column 3 line 13]) is lower than a concentration of impurities in the first conductivity-type semiconductor layer (fig 3:3-2; [column 3 line 12]), wherein a concentration of impurities (aluminum) in the first etching layer (fig 3:2; [column 3 line 2]) is higher than the concentration of impurities (undoped) in the etching protection layer (fig 3:3-1; [column 3 line 13]), and wherein the first etching layer (fig 3:2; [column 3 line 2]) is separated from first conductivity-type semiconductor layer (fig 3:3-2; [column 3 line 12]) by the etching protection layer (fig 3:3-1; [column 3 line 13]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an etching protection layer between the first conductivity type layer and the etching layer in order buffer the first conductivity type layer and thereby avoid damaging the first conductivity type layer which could result in unwanted recombination centers that would reduce the efficiency of the device
Schubert does not teach an assembly substrate.
King teaches a semiconductor light emitting element assembly comprising: an assembly substrate (fig 2b:10; [para 0015]); and a semiconductor light emitting element (fig 2c:30; [para 0015]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an assembly substrate so that the devices can be assembled into a large array that integrate with other devices.
Regarding claim 21
Schubert in view of Shu in view of King teaches the semiconductor light emitting element assembly of claim 13, further:
Shu teaches wherein the semiconductor light emitting element further includes a first conductivity-type electrode (fig 3:8; [column 2 line 59]) directly connected to the first conductivity-type semiconductor layer (fig 3:3-2; [column 2 line 57]), and a second conductivity-type electrode (fig 3:7; [column 2 line 55]) connected to the second conductivity-type semiconductor layer (fig 3:6; [para 0059]), and wherein the first conductivity-type semiconductor layer (fig 3:8; [column 2 line 59]) is disposed between the etching protection layer (fig 3:3-1; [column 2 line 56]) and both of the first conductivity-type electrode (fig 3:8; [column 2 line 59]) and the second conductivity-type electrode (fig 3:7; [column 2 line 59]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide electrodes on the semiconductor layers in order to provide voltage to the diode and thereby energize the device.
Claim(s) 14, 15, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schubert (US 2017/0288087) in view of Shu (US 9312434) in view of King (US 2004/0222357) as applied to claim 13 and further in view of Horng (US 2010/0136728)
Regarding claim 14.
Schubert in view of Shu in view of King teaches the structure of claim 13 above.
Schubert in view of Shu in view of King does not teach prominences in a plurality of bands.
Horng teaches the uneven structure (fig 9:235; [para 0047]) is configured such that prominences of the uneven structure extend to form a plurality of bands in a direction from a center of a surface of the uneven structure towards an edge of the surface of the uneven structure (fig 9:235; [para 0047]).
PNG
media_image1.png
346
464
media_image1.png
Greyscale
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the uneven surface to comprise bands of prominences around a center because the etching process of forming a partially removed porous structure will result in high points (prominences) which will be around the center of the surface
Regarding claim 15.
Horng teaches the semiconductor light emitting element assembly of claim 14, further: an average thickness of the uneven structure (fig 9:235; [para 0047]) is equal to or greater than an effective distance under which dielectrophoresis force acts during a self-assembly process of the semiconductor light emitting element.
Dielectrophorisis effective distance is variable depending upon the electric charge used. The limitation must distinguish from the prior art in terms of structure rather than function, In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); See also In re Swinehart, 439 F.2d210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971). Claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danly, 263 F. 2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “Apparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F. 2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
Further, the minimum distance over which dielectrophorisis is effective approaches 0, therefore a thickness greater than 0 (fig 2d) satisfies the claim.
Regarding claim 16.
Schubert teaches the semiconductor light emitting element assembly of claim 14, wherein the first etching layer (fig 3a,3d:315; [para 0063]) includes a surface having a specific pattern, or a rough surface having irregularities (partially removed porous network ; [para 0033,0034]).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schubert (US 2017/0288087) in view of Shu (US 9312434) in view of King (US 2004/0222357)
Regarding claim 18.
Schubert teaches a semiconductor light emitting element assembly comprising: […]; and a semiconductor light emitting element (fig 3d:; [para 0058]) including a first etching layer (fig 3a,3d:315; [para 0063]), […], a first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]) […], an active layer (fig 3a,3d:325; [para 0063]) on the first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]), and a second conductivity-type semiconductor layer (fig 3a,3d:330; [para 0064]) on the active layer (fig 3a,3d:325; [para 0063]), […], wherein a concentration of impurities in the first etching layer is higher than the concentration of impurities in the first conductivity-type semiconductor layer (fig 3a,3d:320; [para 0062]) […], and wherein the first etching layer (fig 3a,3d:315; [para 0063]) includes an uneven structure (partially removed porous network ; [para 0033,0034]) […], the uneven structure (partially removed porous network ; [para 0033,0034]) including an outermost surface having a specific pattern with protrusions or a rough surface having irregularities (partially removed porous network ; [para 0033,0034]).
Schubert does not teach an etching protection layer
Shu teaches a semiconductor light emitting element assembly comprising: a semiconductor light emitting element including a first etching layer (fig 3:2; [column 3 line 2]), an etching protection layer (fig 3:3-1; [column 3 line 13]) on the first etching layer (fig 3:2; [column 3 line 2]), a first conductivity-type semiconductor layer (fig 3:3-2; [column 3 line 12]) on the etching protection layer (fig 3:3-1; [column 3 line 13]), wherein a concentration of impurities (undoped) in the etching protection layer (fig 3:3-1; [column 3 line 12]) is lower than a concentration of impurities in the first conductivity-type semiconductor layer (fig 3:3-2; [column 12]), wherein a concentration of impurities (aluminum) in the first etching layer (fig 3:2 column 3 line 2) is higher than the concentration of impurities (undoped) in the etching protection layer (fig 3:3-1; [column 3 line 13]), and wherein the first etching layer (fig 3:2; [column 3 line 2]) is separated from first conductivity-type semiconductor layer (fig 3:3-2; [column 3 line 12]) by the etching protection layer (fig 3:3-1; [column 3 line 13]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an etching protection layer between the first conductivity type layer and the etching layer in order buffer the first conductivity type layer and thereby avoid damaging the first conductivity type layer which could result in unwanted recombination centers that would reduce the efficiency of the device
Schubert does not teach an assembly substrate.
King teaches a semiconductor light emitting element assembly comprising: an assembly substrate (fig 2b:10; [para 0015]); and a semiconductor light emitting element (fig 2c:30; [para 0015]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an assembly substrate so that the devices can be assembled into a large array that integrated with other devices.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schubert (US 2017/0288087) in view of Shu (US 9312434) in view of King (US 2004/0222357) as applied to claim 18 and further in view of Horng (US 2010/0136728)
Regarding claim 19.
Schubert in view of Shu in view of King teaches the structure of claim 18 above.
Schubert in view of Shu in view of King does not teach prominences in a plurality of bands.
Horng teaches a specific pattern (fig 9:235; [para 0047]) forms a plurality of bands in a direction from a center towards an edge of the surface.
PNG
media_image2.png
368
503
media_image2.png
Greyscale
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the uneven surface to comprise bands of prominences around a center because the etching process of forming a partially removed porous structure will result in high points (prominences) which will be around the center of the surface and spread out to the edge.
Response to Arguments
Applicant’s arguments with respect to claim(s) 13 through 16, 18, 19, and 21 have been considered but are moot because the new ground of rejection does not rely on any reference combination applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Newly applied reference combination Schubert (US 2017/0288087) in view of Shu (US 9312434) in view of King (US 2004/0222357) anticipates the claims.
Previous rejections under 35 U.S.C. 112(b), first and second paragraph are withdrawn.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID J GOODWIN whose telephone number is (571)272-8451. The examiner can normally be reached Monday - Friday, 11:00 - 19:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 February 18, 2026