Prosecution Insights
Last updated: July 17, 2026
Application No. 17/763,924

FAST SPARSE NEURAL NETWORKS

Non-Final OA §103
Filed
Mar 25, 2022
Priority
Sep 25, 2019 — provisional 62/905,888 +1 more
Examiner
MCINTOSH, ANDREW T
Art Unit
2144
Tech Center
2100 — Computer Architecture & Software
Assignee
DeepMind Technologies Limited
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
401 granted / 520 resolved
+22.1% vs TC avg
Strong +18% interview lift
Without
With
+18.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
17 currently pending
Career history
542
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
89.1%
+49.1% vs TC avg
§102
5.6%
-34.4% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 520 resolved cases

Office Action

§103
DETAILED ACTION This action is in response to Applicant’s Request for Continued Examination ("Response”) received on February 19, 2026 in response to the Office Action dated December 9, 2025. This action is made Non-Final. Claims 1-11, 14, and 17-24 are pending. Claims 1, 14, and 24 are independent claims. Claims 1-11, 14, and 17-24 are rejected. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant’s Response In Applicant’s Response, Applicant amended claims 1, 14, and 24, and submitted arguments against the prior art in the Office Action dated December 9, 2025. Information Disclosure Statement The information disclosure statement (IDS(s)) submitted on 02/19/2016 and 03/12/2025 is/are in compliance with the provisions of 37 C.F.R. 1.97. Accordingly, the IDS(s) is/are being considered by the examiner. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3-7, 9, 14, 17-21, 23, and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Parashar, Angshuman, et al. "SCNN: An accelerator for compressed-sparse convolutional neural networks." ACM SIGARCH computer architecture news 45.2 (2017): 27-40 (“Parashar”), in view of Dally et al., US Publication 2018/0046900 (“Dally”), and further in view of Claim 1: Parashar teaches or suggests a method of implementing a neural network comprising a plurality of layers including at least one sparse 1x1 convolutional layer, the input of the convolutional layer comprising, for each of the plurality of elements arranged in a H x W array, a respective input channel of feature values (see §2, Motivation - CNN consists of a series of layers, which include convolutional layers, non-linear scalar operator layers, and layers that downsample the intermediate data, for example by pooling. The convolutional layers represent the core of the CNN computation and are characterized by a set of filters that are usually 1×1; §2 Compressing data: - sparse weights and/or activations provides an architecture an opportunity to reduce the amount of data that must be moved throughout the memory hierarchy. It also reduces the data footprint, which allows larger matrices to be held in a storage structure of a given size; §3 SNN Dataflow and Fig. 2 – a W×H element input activation plane to produce a W ×H element output activation plane. The data can include multiple (C) input activation planes, which are referred to as input channel; §3.1 - make computation efficient on compressed-sparse weights and input activations;); the sparse 1x1 convolutional layer being configured to apply a sparse 1x1 convolution to the input channels to form respective output channels each composed of the convolved values, the sparse 1x1 convolution being defined by a sparse weight matrix having a plurality of null weights which are equal to zero and a plurality of non-null weights, and the input channels constituting a dense C’ x HW activation matrix having a feature value defined for each element of the activation matrix (see §1 Introduction - non-zero weights and activations are fetched from the input storage arrays and delivered; §2, Motivation - CNN consists of a series of layers, which include convolutional layers, non-linear scalar operator layers, and layers that downsample the intermediate data, for example by pooling. The convolutional layers represent the core of the CNN computation and are characterized by a set of filters that are usually 1×1. Figure 1 shows the weight and activation density (fraction of non-zeros or complement of sparsity); §2 Compressing data: - sparse weights and/or activations provides an architecture an opportunity to reduce the amount of data that must be moved throughout the memory hierarchy. It also reduces the data footprint, which allows larger matrices to be held in a storage structure of a given size; §3 SNN Dataflow and Fig. 2 – a W×H element input activation plane to produce a W ×H element output activation plane. The data can include multiple (C) input activation planes, which are referred to as input channel. §3 - filter is applied to each input activation channel, and the filter outputs for each of the C channels are accumulated together element-wise; §3.1 Single multiplier – input activation is held stationary at the computation units as it is multiplied by all of the filter weights needed to make all of its contributions to each of the K output channels; §3.1 Intra-PE parallelism - make computation efficient on compressed-sparse weights and input activations; §4.2 – original (dense) coordinates of the weights and activations. §6.1 - compression enable it to be better than DCNN at every level of density; §6.4 - Figure 12 demonstrates that SCNN is consistently superior to the SCNN-SparseA and SCNN-SparseW configurations in both performance and energy across the entire density range.); the method comprising: obtaining an indication of the null weights of the weight matrix (see Abstract - exploiting the zero-valued weights that stem from network pruning during training and zero-valued activations that arise from the common ReLU operator; §1, Introduction - benefits can be achieved by a compressed encoding for zero weights and activations; §2 Compressing data: - sparse weights and/or activations provides an architecture an opportunity to reduce the amount of data that must be moved throughout the memory hierarchy. It also reduces the data footprint, which allows larger matrices to be held in a storage structure of a given size; §2 Eliminating computation - multiplications that have a zero weight and/or activation operand, the operation can be data gated, or the operands might never be sent to the multiplier.); processing the sparse weight matrix in conjunction with the dense C’ x HW activation matrix by, for elements of a row vector comprising a plurality of elements in a row of the activation matrix (see §1 Introduction - non-zero weights and activations are fetched from the input storage arrays and delivered; §2, Motivation - CNN consists of a series of layers, which include convolutional layers, non-linear scalar operator layers, and layers that downsample the intermediate data, for example by pooling. The convolutional layers represent the core of the CNN computation and are characterized by a set of filters that are usually 1×1. Figure 1 shows the weight and activation density (fraction of non-zeros or complement of sparsity); §2 Compressing data: - sparse weights and/or activations provides an architecture an opportunity to reduce the amount of data that must be moved throughout the memory hierarchy. It also reduces the data footprint, which allows larger matrices to be held in a storage structure of a given size; §3 SNN Dataflow and Fig. 2 – a W×H element input activation plane to produce a W ×H element output activation plane. The data can include multiple (C) input activation planes, which are referred to as input channel. §3 - filter is applied to each input activation channel, and the filter outputs for each of the C channels are accumulated together element-wise; §3.1 Single multiplier – input activation is held stationary at the computation units as it is multiplied by all of the filter weights needed to make all of its contributions to each of the K output channels; §3.1 Intra-PE parallelism - make computation efficient on compressed-sparse weights and input activations; §4.2 – original (dense) coordinates of the weights and activations. §6.1 - compression enable it to be better than DCNN at every level of density; §6.4 - Figure 12 demonstrates that SCNN is consistently superior to the SCNN-SparseA and SCNN-SparseW configurations in both performance and energy across the entire density range.), generating the convolved values for the plurality of elements by: (a) extracting corresponding feature values of the input channels from a memory unit storing the activation matrix, comprising, for each corresponding feature value, determining to extract the corresponding feature value from the memory units storing the activation matrix (see §1 - only non-zero weights and activations are fetched from the input storage arrays and delivered to the multiplier array. As with any CNN accelerator, SCNN must accumulate the partial products generated by the multipliers. However, since the products generated by the multiplier array cannot be directly summed together, SCNN tracks the output coordinates associated with each multiplication and sends the coordinate and product to a scatter accumulator array for summation; §2 - only non-zero data values are retrieved from DRAM and on-chip buffers. exploits both weight and activation reuse while delivering only non-zero weights and activations; §3.2 - the weight buffer delivers a vector of F non-zero filter weights along with each of their coordinates. Similarly, the input buffer delivers a vector of I non-zero input activations along with each of their coordinates; fetch the compressed sparse input activations and weights, respectively. In addition, the coordinates of the non-zero values in the compressed sparse form of these data structures must be fetched from their respective buffers (not shown). Then the accumulator buffer (F) must be indexed with the computed output coordinates from the sparse weights and activations. Finally when the computation for the output-channel group has been completed, the accumulator buffer is drained and compressed into the output buffer; §7 - Avoiding delivery of zero-valued activations or weights to the multipliers can save time by eliminating ineffectual multiplier cycles.); and (b) forming a corresponding sum of the corresponding extracted feature values weighted by the respective non-null weights (see §1 - only non-zero weights and activations are fetched from the input storage arrays and delivered to the multiplier array. As with any CNN accelerator, SCNN must accumulate the partial products generated by the multipliers. However, since the products generated by the multiplier array cannot be directly summed together, SCNN tracks the output coordinates associated with each multiplication and sends the coordinate and product to a scatter accumulator array for summation; §2 - only non-zero data values are retrieved from DRAM and on-chip buffers. exploits both weight and activation reuse while delivering only non-zero weights and activations. avoid any arithmetic based on zero-valued operands and achieve full multiplier utilization in steady-state; §3 - filter is applied to each input activation channel, and the filter outputs for each of the C channels are accumulated together element-wise; §3.2 - fetch the compressed sparse input activations and weights, respectively. In addition, the coordinates of the non-zero values in the compressed sparse form of these data structures must be fetched from their respective buffers (not shown). Then the accumulator buffer (F) must be indexed with the computed output coordinates from the sparse weights and activations. Finally when the computation for the output-channel group has been completed, the accumulator buffer is drained and compressed into the output buffer; §7 - Avoiding delivery of zero-valued activations or weights to the multipliers can save time by eliminating ineffectual multiplier cycles.). Dally more specifically teaches or suggests sparse C x C’ weight matrix (see para. 0055 - distinct filter is applied to each input activation channel, and the filter output for each of the C channels are accumulated together element-wise into a single output activation plane. Multiple filters (K) can be applied to the same body of input activations to produce K output channels of output activations para. 0120 - weights are encoded in a compressed-sparse format of tiles that include at most K output channels, and the tiles are ordered by input channel. allows reading of W weights and corresponding positions (r,s,k) in parallel for an input channel c. compressed-sparse format includes three parameters for each non-zero weight in kernel ck.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include C x C’ weight matrix for the purpose of efficiently generating a weight matrix based on input and output channels, improving neural network convolutions, as taught by Dally (0120 and 0121). Lee2 further teaches or suggests only in response to determining that, for the corresponding feature value, the corresponding weight of the weight matrix is a non-null weight by using the indication of the null weights of the weight matrix (see para. 0007 – and weight information, indicating whether each of a plurality of weights of a weight map includes a non-zero value, and configured to determine input features and weights to be convoluted, from among the plurality of input features and the plurality of weights, based on the input feature information and the weight information; and a data arithmetic circuit configured to convolute the determined weights and input features to generate an output feature map; para. 0009 - fetch controller may be configured to detect the input features and the weights may also include non-zero values based on the input feature information and the weight information; para. 0054 - weight information, which indicates whether each of a plurality of weights of a weight map has a zero value; para. 0055 - uses the input feature information and the weight information to detect input features and weights having equal or same non-zero values at locations that correspond to each other from among the input features and the weights, and determines the detected input features and weights as the input features and weights to be convoluted; para. 0056 - performs an optional convolution on the input feature map and the weight map based on the input features and the weights having equal or same non-zero values at locations that correspond to each other to generate an output feature map; para. 0059 - selectively convolutes the input features and the weights having non-zero values, thus, omitting meaningless arithmetic operations that do not affect output features. Thus, the neural network processor 100 effectively reduces the amount of operations and operation time in the convolution for input features and weights; para. 0061 - weight vector is denoted by I because the zeroth input feature, the first input feature, and the third input feature of the five input features have non-zero values, and the second and fourth input features are denoted by O because they have zero values. Although FIG. 3 shows the input feature map and the input feature vector for the five input features and the weight map and the weight vector for the five weights, the number of input features and weights is not limited thereto; para. 0062 - performs the AND operation on the input feature vector and the weight vector to detect input features and weights having equally non-zero values at locations that correspond to each other from among the input features and the weights; para. 0063 - convolutes input features and weights having non-zero values at locations that correspond to each other from among the input features and the weights; para. 0067 - convolutes input features and weights having non-zero values at locations that correspond to each other from among the input features and the weights; para. 0069 - selectively performs or executes convolution operations only on input features and weights having equal or same non-zero values at locations that correspond to each other from among the input features and the weights.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include only in response to determining that, for the corresponding feature value, the corresponding weight of the weight matrix is a non-null weight by using the indication of the null weights of the weight matrix for the purpose of efficiently selectively determining what convolutions to perform based on indications of values in matrices, omitting meaningless arithmetic operations that do not affect output features and effectively reducing the amount of operations and operation time, improving neural network convolutions, as taught by Lee2 (0054, 0055, 0059). Lee further teaches or suggests wherein the corresponding weight is indicated to be in a same position in a row of the weight matrix as the corresponding feature value is in an input channel that corresponds to the row of the weight matrix (see para. 0064 - each of the weights included in the weight map WM is multiplied by a feature value of the first feature map FMl at a corresponding position in an area of the first feature map FMl over lapped by the weight map WM, and then the products of all of the multiplications are added together to obtain a corresponding feature value of the second feature map FM2 at a position corresponding to the position of the weight map WM.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include wherein the corresponding weight is indicated to be in a same position in a row of the weight matrix as the corresponding feature value is in an input channel that corresponds to the row of the weight matrix for the purpose of efficiently matching weights with corresponding feature values during convolutional related operations, improving neural network convolutions, as taught by Lee (0064). Claim(s) 14 and 24: Claim(s) 14 and 24 correspond to Claim 1, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 14 and 24 as well. Claim 3: Parashar further teaches or suggests in which an output layer of the neural network is fully connected (see §2 Motivation - deep neural networks (DNNs) also include fully-connected layers, typically toward the end of the DNN; §4.3 - optimal efficiency for both convolution and fully-connected layers should consider employing both SCNN and an architecture such as EIE that is optimized for fully-connected layers; §7 - EIE CNN accelerator uses a compressed representation of both activations and weights, and only delivers non-zero operands to the multipliers [15]. However, EIE is designed for the fully connected layers of a CNN model.). Claim(s) 17: Claim(s) 17 correspond to Claim 3, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 17 as well. Claim 4: Parashar further teaches or suggests in which the memory unit has a CHW memory layout (see §3.1 - processing element (PE). requires input buffers for weights and input activations, and an accumulator buffer. C×Wt×Ht assigned to each PE. buffers at each PE are sized to be slightly larger than C×Wt ×Ht to accommodate. buffers at each PE are sized to be slightly larger than Kc ×Wt ×Ht to accommodate; §3.2 - Kc×Wt×Ht accumulation buffer. buffer (F) must be indexed with the computed output coordinates from the sparse weights and activations.). Claim(s) 18: Claim(s) 18 correspond to Claim 4, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 18 as well. Claim 5: Dally further teaches or suggests in which the processing is performed with an inner loop for successive row vectors of elements in the same row, and an outer loop for successive rows (see Table 3, 4, 5, 14; para. 0041 - each one of the non-zero weight values is multiplied with every one of the non-zero input activation values, within a multiplier array, to produce a third vector of products; para. 0055 - convolution of an RxS element filter over a WxH element input activation plane to produce a WxH element output activation plane; para. 0056 - can be formulated as a loop nest; para. 0059 - Accommodating multiple input channels (C) adds an additional outer loop and results in the loop nest; para. 0065 - outer loop over all the K/Kc output-channel tiles results in the complete loop nest, each iteration of the outer loop will require the weight buffer 230 to be refilled; para. 0087 - corresponds to the three inner loops of the pseudo-code shown in TABLE 3; para. 0201 - Pseudo-code for the inner loop of a sparse CNN implementation is shown in TABLE 14; para. 0196 - activations may be encoded as one-dimensional sparse vectors and each row of an activation tile may be encoded as a separate one-dimensional sparse vector.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which the processing is performed with an inner loop for successive row vectors of elements in the same row, and an outer loop for successive rows for the purpose of efficiently generating a weight matrix based on input and output channels and performing computation iterations, improving neural network convolutions, as taught by Dally (0120 and 0121). Claim(s) 19: Claim(s) 19 correspond to Claim 5, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 19 as well. Claim 6: Dally further teaches or suggests in which the processing is performed repeatedly for successive row vectors, the row vectors collectively including the whole array of elements (see Table 3, 4, 5, 14; para. 0041 - each one of the non-zero weight values is multiplied with every one of the non-zero input activation values, within a multiplier array, to produce a third vector of products; para. 0055 - convolution of an RxS element filter over a WxH element input activation plane to produce a WxH element output activation plane; para. 0056 - can be formulated as a loop nest; para. 0059 - Accommodating multiple input channels (C) adds an additional outer loop and results in the loop nest; para. 0065 - outer loop over all the K/Kc output-channel tiles results in the complete loop nest, each iteration of the outer loop will require the weight buffer 230 to be refilled; para. 0087 - corresponds to the three inner loops of the pseudo-code shown in TABLE 3; para. 0201 - Pseudo-code for the inner loop of a sparse CNN implementation is shown in TABLE 14; para. 0196 - activations may be encoded as one-dimensional sparse vectors and each row of an activation tile may be encoded as a separate one-dimensional sparse vector.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which the processing is performed repeatedly for successive row vectors, the row vectors collectively including the whole array of elements for the purpose of efficiently generating a weight matrix based on input and output channels and performing computation iterations, improving neural network convolutions, as taught by Dally (0120 and 0121). Claim(s) 20: Claim(s) 20 correspond to Claim 6, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 20 as well. Claim 7: Parashar further teaches or suggests the neural network further including an output layer following the convolutional layer and arranged to generate one or more output values, each output value being determined based on all the convolved values of all elements (see §1 - SCNN dataflow only delivers to the multiplier array weights and activations that can all be multiplied with one another; §2 - During inference, a new image (in the case of image recognition) is presented to the network, which classifies into the training categories by computing each of the layers in the network, in succession. The intermediate data between the layers are called activations, and the output activations of one layer becomes the input activations of the next layer. performs an all-to-all multiply of non-zero weight and activation vector elements; §3 - core operation in a CNN convolutional layer is a 2-dimensional sliding-window convolution of an R×S element filter over a W ×H element input activation plane to produce aW ×H element output activation plane; §3.1 – input activation is held stationary at the computation units as it is multiplied by all of the filter weights needed to make all of its contributions to each of the the K output channels; §4 - CNNs typically consist of a series of layers, including convolution, non-linear, pooling, and fully-connected. As the convolution layers typically dominate both arithmetic and computation time, the SCNN architecture is optimized for efficiency on these layers; §2 Motivation - deep neural networks (DNNs) also include fully-connected layers, typically toward the end of the DNN; §4.3 - optimal efficiency for both convolution and fully-connected layers should consider employing both SCNN and an architecture such as EIE that is optimized for fully-connected layers; §7 - EIE CNN accelerator uses a compressed representation of both activations and weights, and only delivers non-zero operands to the multipliers [15]. However, EIE is designed for the fully connected layers of a CNN model.). Claim(s) 21: Claim(s) 21 correspond to Claim 7, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 21 as well. Claim 9: Parashar further teaches or suggests in which the processing for the plurality of rows of the weight matrix is performed in parallel to generate the corresponding plurality of convolved values of the output channels for the row vector (see §1 - To increase performance and capacity beyond a single PE, multiple PEs can run in parallel; §3 – A CNN’s dataflow defines how the loops are ordered, partitioned, and parallelized; §3.1 - employ a spatial tiling strategy to spread the work across an array of PEs so that each PE can operate independently. fetching vectors of input activations and weights (B,D), and computing the Cartesian product in parallel.). Claim(s) 23: Claim(s) 23 correspond to Claim 9, and thus, Parashar, Dally, Lee2, and Lee teach or suggest the limitations of claim(s) 23 as well. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Parashar, in view of Dally, in view of Lee2, in view of Lee, and further in view of Rakshit et al., US Publication 2020/0234114 (“Rakshit”). Claim 2: Rakshit more specifically teaches or suggests in which the null weights constitute substantially 70-95% of the components of the wight matrix (see Fig 1; para. 0007 - completely cutting off power to the clusters (power gated) that were not assigned at least one non-zero value weight; para. 0033 - configured to improve performance of the artificial neural network inference process and are configured to be energetically efficient by avoiding performance of trivial computations such as multiplying by zeros or adding zeros in the MVM operations; para. 0041 - "sparse weight matrix" refers to a weight matrix having most or approximately most of its weight coefficients being zero-value or substantially zero-value.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which the null weights constitute substantially 70-95% of the components of the wight matrix for the purpose of efficiently using a weight matrix including approximately mostly zeros and avoiding performing computations using the zeros, improving neural network performance, as taught by Rakshit (0033 and 0041). Claim(s) 8 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Parashar, in view of Dally, in view of Lee2, in view of Lee, and further in view of Huang et al., US Publication 2019/0180167 (“Huang”). Claim 8: Huang further teaches or suggests in which the non-null weights are in the same positions in each of a plurality of rows of the weight matrix (see para. 0016 - operation relating to these zero-value elements may be skipped, and the operation may only be performed on nonzero elements (i.e. elements with values not being zero) and corresponding data items in the feature data, such that the rate of effective operation is increased, the operation quantity is reduced, and the execution efficiency of operation is increased; para. 0018 - groupings may be sparsified in different manner such that the distribution of nonzero elements in each of the grouping of kernels is the same; para. 0029 - distribution of nonzero elements in the kernel KS is exactly the same as that of nonzero elements in the kernel Kl.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which the non-null weights are in the same positions in each of a plurality of rows of the weight matrix for the purpose of efficiently using a weight matrix sparsified such that distribution of nonzero elements is the same, simplifying cnn structure and corresponding algorithms, improving cnn performance, as taught by Huang (0016 and 0018). Claim(s) 22: Claim(s) 22 correspond to Claim 8, and thus, Parashar, Dally, Lee2, Lee, and Huang teach or suggest the limitations of claim(s) 22 as well. Claim(s) 10 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Parashar, in view of Dally, in view of Lee2, in view of Lee, and further in view of Ovsiannikov et al., US Publication 2019/0392287 (“Osiannikov”). Claim 10: Osiannikov further teaches or suggests in which during the generation of convolved values for the plurality of elements, upon said extraction of corresponding feature values from the memory unit, the extracted feature values are stored in a cache memory, the extraction and storage not being performed in respect to feature values which were stored in the cache memory during generation of preceding convolved values for the plurality of elements (see para. 0378 - convolution window keeps sliding, the leftmost previously-cached IFM values, as indicated by dark shading in FIGS. 2BI-2BL (and FIGS. 2BE-2BH), will not participate in computation for an extended period of time, or at all, until the convolution window slides all the way to IFM tensor rightmost edge, slides one row down and slides all the way back to the cached value. Therefore, once the convolution window slides, these values may be purged from the cache to keep cache size small; para. 00380 - keeping the cache size relatively small requires purging cache values aggressively. Referring to FIG. 2BM, as the convolution window slides over row R (row 2) the IFM values from the previous row R-1 (row 1) have been long purged from the cache; para. 0386 - table assumes that cache sizes are sufficient for a given Z while performing a single sweep, i.e. values from a previous sweep become purged; para. 0389 - Correspondingly, once the convolution window has slid one colunm horizontally, it can use previously cached values (marked as "c" in FIG. 2GA, cached during the previous vertical translation) inside the kernel window for the current calculation. Previously-cached values marked "c" outside the kernel window (below, in FIG. 2GA) also should stay in the cache to be used as the window will start sliding vertically (down, in FIG. 2GA). Also, values fetched from SRAM (marked "m") should be added to the cache to be used in the calculation at the current location as well as later. one cache value (top left) can be purged and one value from SRAM is added.). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which during the generation of convolved values for the plurality of elements, upon said extraction of corresponding feature values from the memory unit, the extracted feature values are stored in a cache memory, the extraction and storage not being performed in respect to feature values which were stored in the cache memory during generation of preceding convolved values for the plurality of elements for the purpose of efficiently managing convolution calculations using a cache and other memory, improving cnn performance, as taught by Osiannikov (0378, 0380, 0390). Claim 11: Osiannikov further teaches or suggests in which during the generation of the convolved values for the plurality of elements based on the corresponding feature values for the plurality of elements, the corresponding feature values for a plurality of additional elements are also read from the memory unit into the cache memory, the convolved values of the plurality of additional elements not being generated in parallel with the convolved values for the plurality of elements (see para. 0378 - convolution window keeps sliding, the leftmost previously-cached IFM values, as indicated by dark shading in FIGS. 2BI-2BL (and FIGS. 2BE-2BH), will not participate in computation for an extended period of time, or at all, until the convolution window slides all the way to IFM tensor rightmost edge, slides one row down and slides all the way back to the cached value. Therefore, once the convolution window slides, these values may be purged from the cache to keep cache size small; para. 00380 - keeping the cache size relatively small requires purging cache values aggressively. Referring to FIG. 2BM, as the convolution window slides over row R (row 2) the IFM values from the previous row R-1 (row 1) have been long purged from the cache; para. 0386 - table assumes that cache sizes are sufficient for a given Z while performing a single sweep, i.e. values from a previous sweep become purged; para. 0389 - Correspondingly, once the convolution window has slid one colunm horizontally, it can use previously cached values (marked as "c" in FIG. 2GA, cached during the previous vertical translation) inside the kernel window for the current calculation. Previously-cached values marked "c" outside the kernel window (below, in FIG. 2GA) also should stay in the cache to be used as the window will start sliding vertically (down, in FIG. 2GA). Also, values fetched from SRAM (marked "m") should be added to the cache to be used in the calculation at the current location as well as later. one cache value (top left) can be purged and one value from SRAM is added; para. 0390 - IFMs may also be cached, resulting in a correspondingly increased cache size. However, IFM cache size has an upper limit, regardless of choice of the planar translation method (naive or zig-zag or some other), that is a function of the size of the multiplier unit weights register file. This is because each cached IFM must have a corresponding weight in the weight register file to be multiplied). Accordingly, it would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to modify the system and method, taught in Parashar, to include in which during the generation of convolved values for the plurality of elements, upon said extraction of corresponding feature values from the memory unit, the extracted feature values are stored in a cache memory, the extraction and storage not being performed in respect to feature values which were stored in the cache memory during generation of preceding convolved values for the plurality of elements for the purpose of efficiently managing convolution calculations using a cache and other memory, improving cnn performance, as taught by Osiannikov (0378, 0380, 0390). Response to Arguments Applicant’s further arguments have been considered but are not persuasive because the arguments do not correspond to the rationales as used in the current rejection. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andrew T McIntosh whose telephone number is (571)270-7790. The examiner can normally be reached M-Th 8:00am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tamara Kyle can be reached at 571-272-4241. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANDREW T MCINTOSH/Primary Examiner, Art Unit 2144
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Prosecution Timeline

Show 3 earlier events
May 29, 2025
Applicant Interview (Telephonic)
Jun 11, 2025
Response Filed
Dec 09, 2025
Final Rejection mailed — §103
Feb 03, 2026
Applicant Interview (Telephonic)
Feb 04, 2026
Examiner Interview Summary
Feb 19, 2026
Request for Continued Examination
Mar 01, 2026
Response after Non-Final Action
Jun 30, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
95%
With Interview (+18.2%)
3y 0m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 520 resolved cases by this examiner. Grant probability derived from career allowance rate.

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