DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed February 03, 2026 has been entered. Claims 1-4 and 6-21 remain pending in the application. Applicant’s amendments to the Claims have overcome each and every objection previously set forth in the Non-Final Office Action mailed November 17, 2025.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-4, 6, 8-11, and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et. al. (KR 20190012789 A), hereinafter Bae.
Regarding claim 1, Ba teaches a display panel (Fig 1 display panel 10, [0016] of translation), comprising: an array substrate (Fig 5 substrate SUB, [0051] of translation), wherein the array substrate (Fig 5 substrate SUB, [0051] of translation) comprises a power signal trace (Fig 2 high potential power source EVDD, [0022] of translation; not shown in Fig 5 in the array substrate) and at least one auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation); and a plurality of light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation) disposed on (Fig 5) the array substrate (Fig 5 substrate SUB, [0051] of translation) in an array (Fig 3), wherein each of the light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation) comprises a first electrode (Fig 5 anode ANO, [0022] of translation) and a second electrode (Fig 5 cathode CAT, [0022] of translation), and the second electrode (Fig 5 cathode CAT, [0022] of translation) is disposed on a side of the first electrode (Fig 5 anode ANO, [0022] of translation) away from (Fig 5) the array substrate (Fig 5 substrate SUB, [0051] of translation); wherein the display panel (Fig 1 display panel 10, [0016] of translation) further comprises a plurality of auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) disposed in the same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first electrode (Fig 5 anode ANO, [0022] of translation) , each of the auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is disposed corresponding to (Fig 5, placing the auxiliary power line on the same player as the anode as taught by Bae) a respective first electrode (Fig 5 anode ANO, [0022] of translation) of at least one of the light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation), each of the auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is electrically connected (Fig 7, [0069]) to a respective auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation), and a potential of the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is less than a potential (low potential power supply is connected to AVSL, [0080] of translation) of the power signal trace (Fig 2 high potential power source EVDD, [0022] of translation; not shown in Fig 5 in the array substrate).
Regarding claim 3, Bae as modified in claim1 teaches each of the auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is disposed corresponding (Fig 5) to the respective first electrode (Fig 5 anode ANO, [0022] of translation) of the plurality of light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation).
Regarding claim 4, Bae as modified in claim 3 teaches the plurality of light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation) include red light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation; the organic compound layer OL can have pigments for red, [0033] of translation), green light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation; the organic compound layer OL can have pigments for red, [0033] of translation), and blue light- emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation; the organic compound layer OL can have pigments for red, [0033] of translation), and each of the auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is disposed corresponding to (Fig 5) the respective first electrode (Fig 5 anode ANO, [0022] of translation) of at least one of the red light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation; the organic compound layer OL can have pigments for red, [0033] of translation), the respective first electrode (Fig 5 anode ANO, [0022] of translation) of at least one of the green light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation), and the respective first electrode (Fig 5 anode ANO, [0022] of translation) of at least one of the blue light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation).
Regarding claim 6, Bae as modified in claim 1 further teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), and a first metal layer (Fig 5 drain electrode D, [0056] of translation) disposed between (Fig 5) the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) and the light-emitting device (Fig 5 organic light-emitting diode OLE, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first metal layer (Fig 5 drain electrode D, [0056] of translation).
Regarding claim 8, Bae as modified in claim 3 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), and a first metal layer (Fig 5 drain electrode D, [0056] of translation) disposed between (Fig 5) the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) and the light-emitting device (Fig 5 organic light-emitting diode OLE, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first metal layer (Fig 5 drain electrode D, [0056] of translation).
Regarding claim 9, Bae as modified in claim 1 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), and a first metal layer (Fig 5 drain electrode D, [0056] of translation) disposed between (Fig 5) the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) and the light-emitting device (Fig 5 organic light-emitting diode OLE, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first metal layer (Fig 5 drain electrode D, [0056] of translation).
Regarding claim 10, Bae as modified in claim 6 teaches the first electrode (Fig 5 anode ANO, [0022] of translation) is connected to (Fig 5) a drain (Fig 5 drain portion of semiconductor layer A) of the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) through the first metal layer (Fig 5 drain electrode D, [0056] of translation).
Regarding claim 11, Bae as modified in claim 1 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) comprises a gate electrode (Fig 5 gate electrode G, [0054] of translation), an active layer (Fig 5 semiconductor layer A, [0054] of translation), and a source/drain electrode (Fig 5 source/drain electrodes S/D, respectively, [0057] of translation), and the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer as the gate electrode or (optional so not considered) the source/drain electrode.
Bae fails to teach the auxiliary trace is disposed in a same layer as the gate electrode or the source/drain electrode.
However, Bae teaches the auxiliary power line AVSL-H is below the auxiliary power line ASVL-V with at least one insulating film therebetween and a contacting hole PH (Fig 7, [0070] of translation). Further, Bae teaches the location of the auxiliary power line can be moved ([0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to.
Regarding the choice of placing the auxiliary trace in a same layer as the gate electrode, this particular location would have been obvious to try. As stated above, Bae shows there was a need to have an insulating film between the two auxiliary electrodes. Further, Bae teaches it was known that the auxiliary electrode can be moved between layers. In pursuing this arrangement in the device of Bae, there are only two locations, as the auxiliary electrode is between PAS/IN modified in claim 1, for the auxiliary trace to achieve this result: between BUF/GI or between GI/IN. One having ordinary skill in the art would recognize that the connection between the two auxiliary electrodes would be achieved equally, regardless of which of these two locations is chosen. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
Regarding claim 13, Bae as modified in claim 3 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) comprises a gate electrode (Fig 5 gate electrode G, [0054] of translation), an active layer (Fig 5 semiconductor layer A, [0054] of translation), and a source/drain electrode (Fig 5 source/drain electrodes S/D, respectively, [0057] of translation), and the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer as the gate electrode or (optional so not considered) the source/drain electrode.
Bae fails to teach the auxiliary trace is disposed in a same layer as the gate electrode or the source/drain electrode.
However, Bae teaches the auxiliary power line AVSL-H is below the auxiliary power line ASVL-V with at least one insulating film therebetween and a contacting hole PH (Fig 7, [0070] of translation). Further, Bae teaches the location of the auxiliary power line can be moved ([0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to.
Regarding the choice of placing the auxiliary trace in a same layer as the gate electrode, this particular location would have been obvious to try. As stated above, Bae shows there was a need to have an insulating film between the two auxiliary electrodes. Further, Bae teaches it was known that the auxiliary electrode can be moved between layers. In pursuing this arrangement in the device of Bae, there are only two locations, as the auxiliary electrode is between PAS/IN modified in claim 1, for the auxiliary trace to achieve this result: between BUF/GI or between GI/IN. One having ordinary skill in the art would recognize that the connection between the two auxiliary electrodes would be achieved equally, regardless of which of these two locations is chosen. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
Regarding claim 14, Bae as modified in claim 1 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Fig 5 thin film transistor T, [0053] of translation), the thin film transistor (Fig 5 thin film transistor T, [0053] of translation) comprises a gate electrode (Fig 5 gate electrode G, [0054] of translation), an active layer (Fig 5 semiconductor layer A, [0054] of translation), and a source/drain electrode (Fig 5 source/drain electrodes S/D, respectively, [0057] of translation), and the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer as the gate electrode or (optional so not considered) the source/drain electrode.
Bae fails to teach the auxiliary trace is disposed in a same layer as the gate electrode or the source/drain electrode.
However, Bae teaches the auxiliary power line AVSL-H is below the auxiliary power line ASVL-V with at least one insulating film therebetween and a contacting hole PH (Fig 7, [0070] of translation). Further, Bae teaches the location of the auxiliary power line can be moved ([0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to.
Regarding the choice of placing the auxiliary trace in a same layer as the gate electrode, this particular location would have been obvious to try. As stated above, Bae shows there was a need to have an insulating film between the two auxiliary electrodes. Further, Bae teaches it was known that the auxiliary electrode can be moved between layers. In pursuing this arrangement in the device of Bae, there are only two locations, as the auxiliary electrode is between PAS/IN modified in claim 1, for the auxiliary trace to achieve this result: between BUF/GI or between GI/IN. One having ordinary skill in the art would recognize that the connection between the two auxiliary electrodes would be achieved equally, regardless of which of these two locations is chosen. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
Claims 2, 7, 12, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et. al. (KR 20190012789 A), hereinafter Bae, in view of Shim et. al. (US 20230209894 A1), hereinafter Shim.
Regarding claim 2, Bae fails to teach a distance between each of the auxiliary electrodes and the respective first electrode is larger than 0 µm and less than or equal to 2 µm.
However, Bae teaches the drain electrode and auxiliary power wiring are connected through a welding process ([0083] of translation). Further, Bae teaches the concerns of shorting the anode and auxiliary power line. Shim teaches a repair element (RP) where the two elements of the repair element (RP) are placed close closer to each other than other elements, such that a laser having low energy is sufficient to melt and weld the repair elements ([0081]). The distance between the auxiliary electrode and the respective first electrode is therefore a result-effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date of
the claimed invention to vary, through routine optimization, the distance between the electrodes as Shim has identified the distance as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at a distance between each of the auxiliary electrodes and the respective first electrode is larger than 0 µm and less than or equal to 2 µm, in order to achieve the desired balance between the energy needed to perform repair operations and the distance to prevent a short between electrodes, as taught by Bae and Shim. MPEP 2144.05.
Furthermore, the applicant has not presented persuasive evidence that the claimed distance is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions).
Regarding claim 7, Bae as modified in claim 2 teaches the array substrate (Bae: Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Bae: Fig 5 thin film transistor T, [0053] of translation), and a first metal layer (Bae: Fig 5 drain electrode D, [0056] of translation) disposed between (Bae: Fig 5) the thin film transistor (Bae: Fig 5 thin film transistor T, [0053] of translation) and the light-emitting device (Bae: Fig 5 organic light-emitting diode OLE, [0053] of translation), wherein the auxiliary trace (Bae: Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first metal layer (Bae: Fig 5 drain electrode D, [0056] of translation).
Regarding claim 12, Bae as modified in claim2 teaches the array substrate (Bae: Fig 5 substrate SUB, [0051] of translation of translation) further comprises a thin film transistor (Bae: Fig 5 thin film transistor T, [0053] of translation), the thin film transistor (Bae: Fig 5 thin film transistor T, [0053] of translation) comprises a gate electrode (Bae: Fig 5 gate electrode G, [0054] of translation), an active layer (Bae: Fig 5 semiconductor layer A, [0054] of translation), and a source/drain electrode (Bae: Fig 5 source/drain electrodes S/D, respectively, [0057] of translation), and the auxiliary trace (Bae: Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer as the gate electrode or (optional so not considered) the source/drain electrode.
Bae fails to teach the auxiliary trace is disposed in a same layer as the gate electrode or the source/drain electrode.
However, Bae teaches the auxiliary power line AVSL-H is below the auxiliary power line ASVL-V with at least one insulating film therebetween and a contacting hole PH (Fig 7, [0070] of translation). Further, Bae teaches the location of the auxiliary power line can be moved ([0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to.
Regarding the choice of placing the auxiliary trace in a same layer as the gate electrode, this particular location would have been obvious to try. As stated above, Bae shows there was a need to have an insulating film between the two auxiliary electrodes. Further, Bae teaches it was known that the auxiliary electrode can be moved between layers. In pursuing this arrangement in the device of Bae, there are only two locations, as the auxiliary electrode is between PAS/IN modified in claim 1, for the auxiliary trace to achieve this result: between BUF/GI or between GI/IN. One having ordinary skill in the art would recognize that the connection between the two auxiliary electrodes would be achieved equally, regardless of which of these two locations is chosen. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
Regarding claim 21, Bae fails to teach a distance between each of the auxiliary electrodes and the respective first electrode is larger than 0 µm and less than or equal to 1 µm.
However, Bae teaches the drain electrode and auxiliary power wiring are connected through a welding process ([0083] of translation). Further, Bae teaches the concerns of shorting the anode and auxiliary power line. Shim teaches a repair element (RP) where the two elements of the repair element (RP) are placed close closer to each other than other elements, such that a laser having low energy is sufficient to melt and weld the repair elements ([0081]). The distance between the auxiliary electrode and the respective first electrode is therefore a result-effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date of
the claimed invention to vary, through routine optimization, the distance between the electrodes as Shim has identified the distance as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at a distance between each of the auxiliary electrodes and the respective first electrode is larger than 0 µm and less than or equal to 1 µm, in order to achieve the desired balance between the energy needed to perform repair operations and the distance to prevent a short between electrodes, as taught by Bae and Shim. MPEP 2144.05.
Furthermore, the applicant has not presented persuasive evidence that the claimed distance is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions).
Claims 15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et. al. (KR 20190012789 A), hereinafter Bae, in view of Jeon et. al. (US 20220344625 A1), hereinafter Jeon.
Regarding claim 15, Bae as modified in claim 1 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a second layer (Fig 5 functional layer BSM, [0053] of translation), and a thin film transistor (Fig 5 thin film transistor T, [0053] of translation) disposed on the second layer (Fig 5 functional layer BSM, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6c, [0068] of translation; [0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to; Examiner is interpreting the AVSL in Fig 6c as AVSL-H of Fig 7) as the second layer (Fig 5 functional layer BSM, [0053] of translation).
Bae fails to teach the second layer is a second metal layer.
However, Jeon teaches a bottom layer is made of metal ([0144]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bae to incorporate the teachings of Jeon by having the second layer being made of metal. This would aid in stabilizing the characteristics of the thin film transistor ([0144]).
Regarding claim 17, Bae as modified in claim 3 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a second layer (Fig 5 functional layer BSM, [0053] of translation), and a thin film transistor (Fig 5 thin film transistor T, [0053] of translation) disposed on the second layer (Fig 5 functional layer BSM, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6c, [0068] of translation; [0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to; Examiner is interpreting the AVSL in Fig 6c as AVSL-H of Fig 7) as the second layer (Fig 5 functional layer BSM, [0053] of translation).
Bae fails to teach the second layer is a second metal layer.
However, Jeon teaches a bottom layer is made of metal ([0144]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bae to incorporate the teachings of Jeon by having the second layer being made of metal. This would aid in stabilizing the characteristics of the thin film transistor ([0144]).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et. al. (KR 20190012789 A), hereinafter Bae, in view of Shim et. al. (US 20230209894 A1), hereinafter Shim, in further view of Jeon et. al. (US 20220344625 A1), hereinafter Jeon.
Bae as modified in claim 2 teaches the array substrate (Fig 5 substrate SUB, [0051] of translation of translation) further comprises a second layer (Fig 5 functional layer BSM, [0053] of translation), and a thin film transistor (Fig 5 thin film transistor T, [0053] of translation) disposed on the second layer (Fig 5 functional layer BSM, [0053] of translation), wherein the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is disposed in a same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6c, [0068] of translation; [0068]) but does not specify which auxiliary power line between AVSL-H and AVSL-V is referred to; Examiner is interpreting the AVSL in Fig 6c as AVSL-H of Fig 7) as the second layer (Fig 5 functional layer BSM, [0053] of translation).
Bae fails to teach the second layer is a second metal layer.
However, Jeon teaches a bottom layer is made of metal ([0144]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bae and Shim to incorporate the teachings of Jeon by having the second layer being made of metal. This would aid in stabilizing the characteristics of the thin film transistor ([0144]).
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et. al. (KR 20190012789 A), hereinafter Bae, in view of Shim et. al. (US 20230209894 A1), hereinafter Shim.
Regarding claim 18, Bae teaches a repairing method ([0083] of translation) of a display panel (Fig 1 display panel 10, [0016] of translation), wherein the display panel (Fig 1 display panel 10, [0016] of translation) comprises: an array substrate (Fig 5 substrate SUB, [0051] of translation), wherein the array substrate (Fig 5 substrate SUB, [0051] of translation) comprises a power signal trace (Fig 2 high potential power source EVDD, [0022] of translation; not shown in Fig 5 in the array substrate) and at least one auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation); and a plurality of light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation) disposed on (Fig 5) the array substrate (Fig 5 substrate SUB, [0051] of translation) in an array (Fig 3), wherein each of the light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation) comprises a first electrode (Fig 5 anode ANO, [0022] of translation) and a second electrode (Fig 5 cathode CAT, [0022] of translation), and the second electrode (Fig 5 cathode CAT, [0022] of translation) is disposed on a side of the first electrode (Fig 5 anode ANO, [0022] of translation) away from (Fig 5) the array substrate (Fig 5 substrate SUB, [0051] of translation); wherein the display panel (Fig 1 display panel 10, [0016] of translation) further comprises a plurality of auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) disposed in the same layer (Examiner notes that Bae teaches the auxiliary power line can be placed on different layers, Fig 6a, [0068] of translation) as the first electrode (Fig 5 anode ANO, [0022] of translation) , each of the auxiliary electrodes (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is disposed corresponding to (Fig 5, placing the auxiliary power line on the same player as the anode as taught by Bae) the first electrode (Fig 5 anode ANO, [0022] of translation) of at least one of the light-emitting devices (Fig 5 organic light-emitting diode OLE, [0053] of translation), the auxiliary electrode (Fig 5 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is electrically connected (Fig 7, [0069]) to the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation), and a potential of the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) is less than a potential (low potential power supply is connected to AVSL, [0080] of translation) of the power signal trace (Fig 2 high potential power source EVDD, [0022] of translation; not shown in Fig 5 in the array substrate); S200, supplying a potential (low-potential power supply voltage, [0080] of translation) to the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation), and supplying an electric signal (low-potential power supply voltage, [0080] of translation) by the auxiliary trace (Fig 7 second auxiliary power line AVSL-H, [0068] of translation) to the first electrode (Fig 11 anode ANO, [0022] of translation; through the connected drain electrode) connected to (Fig 11) the auxiliary electrode (Fig 11 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL).
Bae fails to teach irradiating the auxiliary electrode and the respective first electrode corresponding to the auxiliary electrode by a laser, to melt the auxiliary electrode and the respective first electrode to electrically connect to each other.
However, Shim teaches irradiating (laser, [0081]) the auxiliary electrode (Fig 6A repair line RL, [0081] corresponds to Bae: Fig 11 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) and the respective first electrode (Fig 6A repair electrode RT1, [0081] corresponds to Bae: Fig 11 anode ANO, [0022] of translation; through the connected drain electrode) corresponding to the auxiliary electrode (Fig 6A repair line RL, [0081] corresponds to Bae: Fig 11 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) by a laser (laser, [0081]), to melt ([0081]) the auxiliary electrode (Fig 6A repair line RL, [0081] corresponds to Bae: Fig 11 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) and the respective first electrode (Fig 6A repair electrode RT1, [0081] corresponds to Bae: Fig 11 anode ANO, [0022] of translation; through the connected drain electrode) to electrically connect ([0081]) to each other.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bae to incorporate the teachings of Shim by using a low energy laser to melt and connect electrodes for repair purposes. This would allow for localized melting of electrodes to prevent damage to surrounding areas ([0011]).
Examiner notes that Bae teaches connecting electrodes using a welding process ([0083]). This process is shown in Fig 11 as a star for welding location. One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that localized welding can be done with a laser.
Regarding claim 19, Bae fails to teach a distance between each of the auxiliary electrode and the respective first electrode is larger than 0 µm and less than or equal to 2 µm.
However, Bae teaches the drain electrode and auxiliary power wiring are connected through a welding process ([0083] of translation). Further, Bae teaches the concerns of shorting the anode and auxiliary power line. Shim teaches a repair element (RP) where the two elements of the repair element (RP) are placed close closer to each other than other elements, such that a laser having low energy is sufficient to melt and weld the repair elements ([0081]). The distance between the auxiliary electrode and the respective first electrode is therefore a result-effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date of
the claimed invention to vary, through routine optimization, the distance between the electrodes as Shim has identified the distance as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at a distance between each of the auxiliary electrode and the respective first electrode is larger than 0 µm and less than or equal to 2 µm, in order to achieve the desired balance between the energy needed to perform repair operations and the distance to prevent a short between electrodes, as taught by Bae and Shim. MPEP 2144.05.
Furthermore, the applicant has not presented persuasive evidence that the claimed distance is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions).
Regarding claim 20, Bae as modified in claim 19 teaches each of the auxiliary electrodes (Fig 11 auxiliary power line AVSL-V, [0070] of translation; corresponds to ASVL) is disposed corresponding to (Fig 11) the respective first electrodes (Fig 11 anode ANO, [0022] of translation) of the plurality of light-emitting devices (Fig 11 organic light-emitting diode OLE, [0053] of translation).
Response to Arguments
Applicant’s arguments, see 35 USC §112 section starting on page 6, filed February 03, 2026, with respect to amendments to claims with a 35 USC §112 rejection have been fully considered and are persuasive. The 35 USC §112 rejection of claims 2, 5, 7, 9, 12, 14, 16, and 19-20 has been withdrawn. The withdrawal of the 35 USC §112 rejection of claim 5 is moot as Applicant has cancelled claim 5.
Applicant's arguments, see 35 USC §103 section starting on page 7, filed February 03, 2026, with
respect to the Bae not teaching a structure that is the same or similar to the auxiliary electrode of the instant invention in claims 1 and 18, have been fully considered but they are not persuasive.
In response to applicant’s argument that Bae does not teach a structure that is the same or similar to the auxiliary electrode of the instant invention, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim.
Examiner notes [0080]-[0083] and Figs 10 and 11 of Bae disclose post modification of pixel connection relationships.
Conclusion
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALVIN L LEE whose telephone number is (703)756-1921. The examiner can normally be reached Monday - Friday 8:30 am - 5 pm (ET).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN GAUTHIER can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ALVIN L LEE/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
Prosecution Insights