DETAILED ACTION
This Office action responds to Applicant’s amendments filed on 08/20/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection mailed on 05/21/2024. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/20/2025 has been entered.
Amendment Status
The amendment filed as an RCE submission on 08/20/2025, responding to the Office action mailed on 05/021/2024 has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-5, and 21.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Harada (US 2019/0287890) in view of Lin (US 2014/0346672) in further view of Fujiwara (US 2014/0339710).
Regarding claim 1, Harada shows (see, e.g., Harada: figs. 4-6) most aspects of the instant invention including a semiconductor device, comprising:
A substrate 41 including a substrate main surface 411 and a substrate back surface 412 facing in opposite directions
A wire portion including a conductive layer 21 and a through wire (see, e.g., Harada: fig. 4, the component as a downward continuation of the conductive part next to the substrate)
The conductive layer 21 being formed on the substrate main surface 411
The through wire extending from the substrate main surface 411 to the substrate back surface 412
A semiconductor element 1 including an element main surface 12 facing the substrate main surface 411
A bonding portion 220a
An encapsulation resin 6 covering the semiconductor element 1
An external connection terminal 3 that covers the wire portion exposed from the substrate 41 and the encapsulation resin 6
The external connection terminal 3 includes a first conductive film 33 covering a lower surface of the through wire and a second conductive film 32 covering a side surface of the through wire and a side surface of the conductive layer 21
Harada, however, fails to show a bonding portion that includes a first plated layer formed on the upper surface of the wire portion and a first solder layer formed on the upper surface of the first plated layer. Harada shows instead only a bonding /member 5 (see, e.g., Harada: figs. 4-6). Lin, in a similar device to Harada, shows (see, e.g., Lin: figs. 2 and 3) the bonding portion 142 that includes a first plated layer 44 (see, e.g., Lin: par. [0022], [0023], and [0025]) is formed on the upper surface of the wire portion 34, and a first solder layer 48 formed on an upper surface of the first plated layer 44. Lin shows that the bonding portion 142 that includes a first plated layer 44 and a first solder layer 48 forms a bump structure that is part of an integrated circuit structure that bonds the substrate to the semiconductor die (see, e.g., Lin: par. [0029]), and introduce extra dimensionality to the integrate circuit structure (see, e.g., Lin: background).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the bonding portion of Lin with a first plated layer and a first solder layer in the device of Harada in order to form a bump structure that is part of an integrated circuit structure that bonds the substrate to the semiconductor die, and to introduce extra dimensionality into the integrated circuit structure.
Harada in view of Lin shows (see, e.g., Lin: figs. 2 and 3):
An element electrode 22 formed on the element main surface
A second plated layer 24/26 formed on a lower surface of the element electrode 22
A second solder layer 28 formed on a lower surface of the first second plated layer 24/26 and bonded to the first solder layer 48
The second solder layer 28 is in contact with the entire portion of the lower surface of the second plated layer 24/26
However, Harada in view of Lin fails (see, e.g., Lin: figs. 2 and 3) to show that the bonding portion 142 is larger than the element electrode 22 and the second plated layer 24/26 as viewed in a thickness-wise direction that is perpendicular to the substrate main surface. Fujiwara, in a similar device to Harada in view of Lin, shows (see, e.g., Fujiwara: figs. 2(A)-2(B)) that the bonding portion 7/6/4 is larger than the element electrode 15 and the second plated layer 16 as viewed in a thickness-wise direction that is perpendicular to the substrate main surface. Fujiwara also shows (see, e.g., Fujiwara: figs. 2(A)-2(B)) that the bonding portion 7/6/4 larger than the element electrode 15 and the second plated layer 16 as viewed in a thickness-wise direction that is perpendicular to the substrate main surface contributes to bonding wafers and forming a structure of a bonding part that is capable of preventing the bonding part from deteriorating (see, e.g., Fujiwara: par. [0010]). Moreover, Fujiwara shows (see, e.g., Fujiwara: figs. 2(A)-2(B)) a structure of a bonding part is capable of preventing the bonding part from being damaged when a penetration wiring is formed in a via hole (see, e.g., Fujiwara: par. [0010]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the bonding portion of Fujiwara that is larger than the element electrode and the second plated layer as viewed in a thickness-wise direction that is perpendicular to the substrate main surface in the device of Harada in view of Lin in order to form a structure of a bonding part that is capable of preventing the bonding part from deteriorating, and to form a structure of a bonding part that is capable of preventing the bonding part from being damaged when a penetration wiring is formed in a via hole.
Regarding claim 5, Harada in view of Lin in view of Fujiwara shows (see, e.g., Lin: figs. 2 and 3) that the element electrode 22 and the second solder layer 28 are disposed on each end of a mount surface in a first direction that is parallel to the mount surface. Harada in view of Lin in view of Fujiwara shows (see, e.g., Harada: fig. 4) that the wire portion extends toward an outer side of the semiconductor element 1.
Regarding claim 21, Harada in view of Lin in view of Fujiwara shows (see, e.g., Fujiwara: figs. 2(A)-2(B)) that the first plated layer 7 is larger than the second plated layer 16 as viewed in the thickness-wise direction that is perpendicular to the substrate main surface.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Harada in view of Lin in view of Fujiwara in further view of Ikuta (US 2014/0054757).
Regarding claim 2, Harada in view of Lin in view of Fujiwara shows (see, e.g., Harada: figs. 4-6) most aspects of the instant invention (see paragraph 6 above). Harada in view of Lin in view of Fujiwara shows (see, e.g., Lin: fig. 2) a first solder 48 that has an aspect ratio in the cross-section perpendicular to the substrate main surface, wherein the aspect ratio is define by the length of the first solder layer 48 in a longitudinal direction to the thickness of the first solder layer 48.
Harada in view of Lin in view of Fujiwara fail to specify that the aspect ratio of the first solder layer 48 (see, e.g., Lin: fig. 2) is greater than or equal to 40 and less than or equal to 80. Ikuta, in a similar device to Harada in view of Lin in view of Fujiwara, shows (see, e.g., Ikuta: fig. 5) that the solder layer 4 having a length of 4 mm, a width of 6 mm and a thickness of 100 µm. Thus, Ikuta shows that the aspect ratio of the solder layer is 40 and 60. Ikuta also shows that this aspect ratio of the solder layer is for connecting a power semiconductor device that can stand to heat stress (see, e.g., Ikuta: par. [0138] – [0139]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the aspect ratio of the solder layer of Ikuta in the device of Harada in view of Lin in view of Fujiwara in order to form connections for a power semiconductor device that can stand to heat stress.
However, differences in aspect ratio values will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such aspect ratio values are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see next paragraph) of the aspect ratio of the first solder layer, and Ikuta has identified such aspect ratio as a result-effective variable subject to optimization, it would have been obvious to one of ordinary skill in the art to use these aspect ratio values in the device of Harada in view of Lin in view of Fujiwara.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed aspect ratio values or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Harada in view of Lin in view of Fujiwara in further view of Pendse (US RE47600).
Regarding claim 3, Harada in view of Lin in view of Fujiwara shows (see, e.g., Harada: figs. 4-6) the most aspects of the instant invention (see paragraph 6 above). Harada in view of Lin in view of Fujiwara shows (see, e.g., Lin: fig. 2) an electrode element 22 and a bonding portion 142.
Harada in view of Lin in view of Fujiwara fails to specify that the distance (see, e.g., Lin: fig. 2) from the element electrode 22 to an end of the bonding portion 142 is greater than or equal to 4 µm and less or equal to 10 µm. Pendse, in a similar device to Harada in view of Lin in view of Fujiwara, teaches (see, e.g., Pendse: fig. 5a) that the distance between the electrode element 134 (see, e.g., Pendse: col.12/II. 26-38) and an end of the bonding portion 126 (see, e.g., Pendse: col.10/II. 49-63) can have different values among which the value of 5 µm. Pendse further teaches that the tampered bumps are needed to minimize the contact pad size and to increase trace routing density without impacting electrical functionality or manufacturing reliability (see, e.g., Pendse: col.5/II.8-11]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include distance of Pendse from the element electrode to an end of the bonding portion in the device of Harada in view of Lin in view of Fujiwara in order to minimize the contact pad size and to increase trace routing density without impacting electrical functionality or manufacturing reliability.
However, differences in distance values will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such distance values are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see next paragraph 13) of the distance from the electrode element to an end of the bonding portion, and Pendse has identified such distance as a result-effective variable subject to optimization, it would have been obvious to one of ordinary skill in the art to use these distance values in the device of Harada in view of Lin in view of Fujiwara.
Regarding claim 4, Harada in view of Lin in view of Fujiwara shows (see, e.g., Harada: figs. 4-6) a conductive layer 21 and a bonding portion 220a. The conductive layer 21 is part of the element electrode 134. Harada in view of Lin in view of Fujiwara teaches (see, e.g., Harada: figs. 6 and 35) that the surface 211 is the wiring-layer front surface (see, e.g., par. [0116]). Harada in view of Lin in view of Fujiwara further teaches that the distance between an end of the conductive layer and an end of the bonding portion can be chosen by design in order to apply an insulating film 42 on the surface 211 that can prevent the conductive bonding member 5 from spreading along the wiring-layer front surface 211 (see, e.g., Harada: par. [0116]).
Harada in view of Lin in view of Fujiwara fail to specify that a distance between an end of the conductive layer and an end of the bonding portion is less than or equal to 1 µm. Pendse, in a similar device to Harada in view of Lin in view of Fujiwara, teaches (see, e.g., Pendse: fig. 5a) that the distance between the conductor element 134 (see, e.g., Pendse: col.12/II. 26-38) and an end of the bonding portion 126 (see, e.g., Pendse: col.10/II. 49-63) can have different values among which the values of less than 1 µm. Pendse further teaches that the tampered bumps are needed to minimize the contact pad size and to increase trace routing density without impacting electrical functionality or manufacturing reliability (see, e.g., Pendse: col.5/II.8-11]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include distance of Pendse from the element electrode to an end of the bonding portion in the device of Harada in view of Lin in view of Fujiwara in order to minimize the contact pad size and to increase trace routing density without impacting electrical functionality or manufacturing reliability.
However, differences in distance values will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such distance values are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see next paragraph below) of the distance between an end of the conductive layer and an end of the bonding portion, and Harada and Pendse have identified such distance as a result-effective variable subject to optimization, it would have been obvious to one of ordinary skill in the art to use these aspect ratio values in the device of Harada in view of Lin in view of Fujiwara.
Response to Arguments
Applicants’ arguments have been considered but are moot in view of the previous and new grounds of rejection.
Conclusion
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/TIBERIU DAN ONUTA/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814