DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I, claims 11-17, and 19 in the reply filed on September 10, 2025 is acknowledged. The traversal is on the ground(s) that there is no serious search burden on the Examiner to collectively examiner the different claim groups. This is not found persuasive because if a national stage application lacks unity of invention restriction is deemed proper (see MPEP 1893.03(d)). In order to demonstrate a lack of unity, the Examiner must (1) list the different groups of claims and (2) explain why each group lacks unity with each other group. The different groups of claims and the reason each group lacked unity was outlined on page 4 in the previous Office Action.
The requirement is still deemed proper and is therefore made FINAL.
Claim 18 is withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Group, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on September 10, 2025.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “504” has been used to designate both the growth restrict mask and the designed shape in Figs. 5(e) and 5(f), reference character “509” has been used to designate both the current confining aperture and the p-pad in Fig. 5(f), the reference character “510” is used to designed both the designed shape and the carrier in Fig. 5(f), and reference character “310” has been used to designate both the n-GaN layer and a length in Figs. 10(k) and 10(l).
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
On page 75, lines 19-20: “growth restrict mark” should read --growth restrict mask--.
On page 76, line 11: “growth restrict mark” should read --growth restrict mask--.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 17 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 17, the claim recites the limitation “the semiconducting substrate is independent of crystal orientations” in lines 1-2. It is indefinite as to what it means for a substrate to be “independent of crystal orientations”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-7, 9, 14-17, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Futagawa et al. (US 20150044795 A1) herein after “Futagawa”.
Regarding claim 1, Figs. 1A-6 of Futagawa disclose a method (Figs. 1A-6, “the method of manufacturing a light emitting element”, ¶ [0057]), comprising:
forming one or more epitaxial lateral overgrowth (ELO) III-nitride layers (Fig. 1B, “a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor,”, ¶ [0096]) on a growth restrict mask (Fig. 1B, mask layer for selective growth 12, ¶ [0105]) using a host substrate (Fig. 1B, substrate for manufacturing a light emitting element 11, ¶ [0105]);
removing the ELO III-nitride layers (21) from the host substrate (11) (Fig. 4, “the substrate for manufacturing a light emitting element 11 is removed”, ¶ [0109]); and
placing one or more dielectric distributed Bragg reflector (DBR) mirrors (Fig. 4, first light reflecting layer 41, ¶ [0110]) for a resonant cavity of a vertical cavity surface emitting laser (VCSEL) on a backside (Fig. 4, first surface 21a, ¶ [0096]) of the removed ELO III-nitride layers (21).
Regarding claim 2, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Fig. 5 further discloses wherein the dielectric DBR mirrors (41) are placed on the backside of the removed ELO III-nitride layers (Fig. 5, “the first light reflecting layer 41 formed from a multilayer film is formed on the first surface 21a of the first compound semiconductor layer 21”, ¶ [0097]) at a wing region (flat region of 21 with low defect density, ¶ [0069-0070]) of the removed ELO IIl-nitride layers (21).
Regarding claim 3, Fig. 5 of Futagawa discloses the method of claim 2 as applied above, and Fig. 2 further discloses wherein the wing region has a roughness value less than 2 nm (“the value of the surface roughness Ra of the flat region 21A is 0.2 nm”, ¶ [0121]).
Regarding claim 5, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Fig. 6 further discloses wherein the dielectric DBR mirrors (41) are placed on the backside of the removed ELO III-nitride layers (21) at a distance of at least 1 µm away from a coalesced region and open area edge (Fig. 6 of Futagawa shows that the dielectric DBR mirrors are separated from a coalesced region and open area edge by the layers 21, 22, and 23. Futagawa discloses in ¶ [0103] that “the first compound semiconductor layer 21 is formed from a 1 .mu.m thick n-GaN layer”, therefore the dielectric DBR mirrors are separated from a coalesced region and open area edge by at least 1 µm).
Regarding claim 6, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Fig. 6 further discloses wherein the removed ELO IIl-nitride layers (21) contain at least a partially processed portion of the VCSEL (“The light emitting element may have a structure formed from a surface-emitting laser element (vertical resonator laser, VCSEL)”, ¶ [0080]).
Regarding claim 7, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Fig. 6 further discloses wherein a thickness of the removed ELO III-nitride layers (21) are controlled epitaxially to realize a functional version of the VCSEL (“it is possible to suppress… the occurrence of thickness variations the first compound semiconductor layer…, it is possible to achieve stability in the characteristics of the obtained light emitting element “, “the first compound semiconductor layer is formed using horizontal growth using a method in which epitaxial growth is caused in the horizontal direction, such as an epitaxial lateral overgrowth (ELO) method”, ¶ [0010] and [0069]).
Regarding claim 9, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Fig. 4 further discloses wherein the resonant cavity of the VCSEL does not contain a substantial portion of the host substrate (11) (Fig. 4, “the substrate for manufacturing a light emitting element 11 is removed”, ¶ [0109]).
Regarding claim 14, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Futagawa further discloses wherein the growth restrict mask (12) is placed using a sputter-like deposition system (“the method of forming the mask layer… a sputtering method”, ¶ [0093]).
Regarding claim 15, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Futagawa further discloses wherein the host substrate (11) is a semiconducting substrate (“the substrate for manufacturing a light emitting element 11 formed from a GaN substrate”, ¶ [0105]).
Regarding claim 16, Figs. 1A-6 of Futagawa disclose the method of claim 15 as applied above, and Futagawa further discloses wherein the semiconducting substrate (11) is a III-nitride substrate (11) (“the substrate for manufacturing a light emitting element 11 formed from a GaN substrate”, ¶ [0105]).
Regarding claim 17, Figs. 1A-6 of Futagawa disclose the method of claim 15 as applied above, and Futagawa further discloses wherein the semiconducting substrate (11) is independent of crystal orientations (“it is possible to use any of the main surfaces of the GaN substrate in forming the compound semiconductor layer”, ¶ [0083]).
Regarding claim 19, Figs. 1A-6 of Futagawa disclose a method for fabricating a quality and manufacturable aperture for light emitting elements (Figs. 1A-6, “the method of manufacturing a light emitting element”, ¶ [0057]), comprising:
forming IIl-nitride semiconductor layers (Fig. 1B, “a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor,”, ¶ [0096]) on a substrate (11) using a growth restrict mask (12) and epitaxial lateral overgrowth (ELO),
wherein the III-nitride semiconductor layers (21) are formed as a bar of one or more devices (Fig. 1B, “a layered structure body 20 formed by layering a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor”, ¶ [0096]); and
fabricating one or more light emitting resonating cavities on the bar, wherein the light emitting resonating cavities are defined by distributed Bragg reflectors (41) formed on wing regions of the epitaxial lateral overgrowth (“the first compound semiconductor layer is formed using horizontal growth using a method in which epitaxial growth is caused in the horizontal direction, such as an epitaxial lateral overgrowth (ELO) method”, “a surface-emitting laser element (vertical resonator laser, VCSEL) that emits light from the top surface of the first compound semiconductor layer 21 via the first light reflecting layer 41”, ¶ [0069] and [0098]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) in view of Nurmikko et al. (US 6233267 B1) herein after “Nurmikko”.
Regarding claim 4, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, but Futagawa fails to disclose wherein at least one of the dielectric DBR mirrors are sandwiched between the removed ELO III-nitride layers.
In the similar field of endeavor of VCSEL, Fig. 1A of Nurmikko discloses wherein at least one of the dielectric DBR mirrors (Fig. 1A, first multilayered DBR laser mirror 18a, col. 4, line 32) are sandwiched between the removed ELO III-nitride layers (Fig. 1A, buffer layer 14, n-type nitride layer 16, col. 4, lines 27-28).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the sandwiched layers as disclosed by Nurmikko, to obtain the desired output properties (see Nurmikko, col. 3, lines 36-40).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) in view of David et al. (US 20200366067 A1) herein after “David”.
Regarding claim 8, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, and Futagawa discloses the need to extract heat from the VCSEL during device operation (see Futagawa, ¶ [0176]), but fails to explicitly disclose wherein at least one of the removed ELO III-nitride layers is used to extract heat from the VCSEL during device operation.
In the similar field of endeavor of VCSEL, David discloses wherein at least one of the removed ELO III-nitride layers is used to extract heat from the VCSEL during device operation (“utilize the thermal conductivity of the epitaxial layers and nitride-containing substrate (or other substrate with high thermal conductivity) to spread the heat laterally first and increase the area for heat extraction out of the device”, ¶ [0288]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the using the ELO III-nitride layers for heat extraction as disclosed by David, to extract heat generated in the active layer (see Futagawa, ¶ [0176]).
Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) in view of Zhu et al. (US 20020163688 A1) herein after “Zhu”.
Regarding claim 10, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, but Futagawa fails to disclose wherein the backside of the removed ELO III- nitride layers has a non-planar shape.
In the similar field of endeavor of VCSEL, Fig. 5 of Zhu discloses wherein the backside of the removed ELO III-nitride layers (514) has a non-planar shape (“a long laterally overgrown spacer 514… may be constructed upon a concave mesa”, ¶ [0075]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the non-planar shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]).
Regarding claim 11, Futagawa and Zhu together disclose the method of claim 10, but Futagawa fails to disclose wherein the non-planar shape comprises a curvature, the backside of the removed ELO III-nitride layers has a finite radius of the curvature, and a center of the curvature is on a side of the host substrate's surface.
In the similar field of endeavor of VCSEL, Fig. 5 of Zhu discloses wherein the non-planar shape comprises a curvature (Fig. 5, “the VCSEL substrate is curved”, ¶ [0069]), the backside of the removed ELOIII-nitride layers (514) has a finite radius of the curvature, and a center of the curvature is on a side of the host substrate's (Fig. 5, substrate 512, ¶ [0073]) surface.
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the curved shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]).
Regarding claim 12, Futagawa and Zhu together disclose the method of claim 10, but Futagawa fails to disclose wherein the host substrate is pre-patterned to realize the non-planar shape.
In the similar field of endeavor of VCSEL, Fig. 8 of Zhu discloses wherein the host substrate (512) is pre-patterned to realize the non-planar shape (Fig. 8, “process will be to smooth out the rough edges and form the desired concave shape 854”, ¶ [0074]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the curved shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) in view of Izumi et al. (US 20170373468 A1) herein after “Izumi”.
Regarding claim 13, Figs. 1A-6 of Futagawa disclose the method of claim 1 as applied above, but Futagawa fails to disclose wherein the growth restrict mask comprises a multi-layer structure.
In the similar field of endeavor of light emitting devices, Fig. 3C of Izumi discloses wherein the growth restrict mask (Fig. 3C, selective growth mask layer 44, ¶ [0167]) comprises a multi-layer structure (Fig. 3C, “the selective growth mask layer 44 includes the dielectric multilayer film 43B”, ¶ [0174]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the multi-layer structure as disclosed by Izumi, to achieve desired dimensions and electrical properties (see Izumi, ¶ [0037]).
Conclusion
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/C.A.N./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893