Prosecution Insights
Last updated: May 29, 2026
Application No. 17/766,960

METHOD OF FABRICATING A RESONANT CAVITY AND DISTRIBUTED BRAGG REFLECTOR MIRRORS FOR A VERTICAL CAVITY SURFACE EMITTING LASER ON A WING OF AN EPITAXIAL LATERAL OVERGROWTH REGION

Final Rejection §103
Filed
Apr 06, 2022
Priority
Oct 23, 2019 — provisional 62/924,756 +2 more
Examiner
NETTLES, CORALIE ANN
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
The Regents of the University of California
OA Round
2 (Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
22 granted / 33 resolved
-1.3% vs TC avg
Strong +31% interview lift
Without
With
+30.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
29 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§103
92.6%
+52.6% vs TC avg
§102
3.4%
-36.6% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 33 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This Office Action is in response to Applicant's amendments filed March 27, 2026. Claims 1-5, and 17-19 have been amended. No claims have been added. No claims have been canceled. Claim 18 stands withdrawn. Currently, claims 1-17, and 19 are pending. Applicant’s Amendments to the drawings overcome the drawing objections outlined in the previous Office Action. The drawing objections have been withdrawn. Applicant’s Amendments to the specification overcome the specification objections outlined in the previous Office Action. The specification objections have been withdrawn. Applicant’s Amendment to claim 17 has overcome the 112(b) rejection outlined in the previous Office Action. The 112(b) rejection of claim 17 has been withdrawn. Response to Arguments Applicant’s arguments with respect to claims 1 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3, 5-7, 9, 14-17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Futagawa et al. (US 20150044795 A1) herein after “Futagawa” in view of Wunderer et al. (US 20150340223 A1) herein after “Wunderer”. Regarding claim 1, Figs. 1A-6 of Futagawa disclose a method (Figs. 1A-6, “the method of manufacturing a light emitting element”, ¶ [0057]), comprising: forming one or more epitaxial lateral overgrowth (ELO) III-nitride layers (Fig. 1B, “a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor,”, ¶ [0096]) on a growth restrict mask (Fig. 1B, mask layer for selective growth 12, ¶ [0105]) deposited on a host substrate (Fig. 1B, substrate for manufacturing a light emitting element 11, ¶ [0105]); removing the ELO III-nitride layers (21) from the host substrate (11) (Fig. 4, “the substrate for manufacturing a light emitting element 11 is removed”, ¶ [0109]); and placing one or more dielectric distributed Bragg reflector (DBR) mirrors (Fig. 4, first light reflecting layer 41, ¶ [0110]) for a resonant cavity of a vertical cavity surface emitting laser (VCSEL) on a backside (Fig. 4, first surface 21a, ¶ [0096]) of the removed ELO III-nitride layers (21). Futagawa fails to disclose wherein growth of the ELO III-nitride layers occurs first in an opening area in the growth restrict mask and then laterally from the opening area over the growth restrict mask, resulting in a wing region on either side of the opening area; the one or more dielectric distributed Bragg reflector (DBR) mirrors for a resonant cavity of a vertical cavity surface emitting laser (VCSEL) on a backside of the removed ELO III- nitride layers at the wing region of the removed ELO III-nitride layers. In the similar field of endeavor of gallium nitride-based devices, Figs. 7 and 24 of Wunderer disclose wherein growth of the ELO III-nitride layers (Fig. 7, epitaxial film 20, ¶ [0038]) occurs first in an opening area in the growth restrict mask (Fig. 7, SAG mask 14 , ¶ [0036]) and then laterally from the opening area over the growth restrict mask (“the epitaxial film 20 of GaN is planarized by utilizing SAG growth parameters that encourage two-dimensional growth”, ¶ [0038]), resulting in a wing region on either side of the opening area (“The resulting epitaxial film 20 includes an upper portion 22 substantially free of TDs”, ¶ [0038]); the one or more dielectric distributed Bragg reflector (DBR) mirrors (Fig. 24, distributed Bragg reflector 220, ¶ [0051]) at the wing region of the removed ELO III-nitride layers (Fig. 24, GaN region 206 free of TDs, ¶ [0051]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the DBR placement as disclosed by Wunderer, to increase device performance and lifetime (see Wunderer, ¶ [0028]). Regarding claim 3, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Fig. 2 of Futagawa further discloses wherein the wing region has a roughness value less than 2 nm (“the value of the surface roughness Ra of the flat region 21A is 0.2 nm”, ¶ [0121]). Regarding claim 5, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Fig. 6 of Futagawa further discloses wherein the dielectric DBR mirrors (41) are placed on the backside of the removed ELO III-nitride layers (21) at a distance of at least 1 µm away from a coalesced region of the ELO III-nitride layers (21) and an edge of the open area of the growth restrict mask (Fig. 6 of Futagawa shows that the dielectric DBR mirrors are separated from a coalesced region and open area edge by the layers 21, 22, and 23. Futagawa discloses in ¶ [0103] that “the first compound semiconductor layer 21 is formed from a 1 .mu.m thick n-GaN layer”, therefore the dielectric DBR mirrors are separated from a coalesced region and open area edge by at least 1 µm). Regarding claim 6, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Fig. 6 of Futagawa further discloses wherein the removed ELO IIl-nitride layers (21) contain at least a partially processed portion of the VCSEL (“The light emitting element may have a structure formed from a surface-emitting laser element (vertical resonator laser, VCSEL)”, ¶ [0080]). Regarding claim 7, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Fig. 6 further discloses wherein a thickness of the removed ELO III-nitride layers (21) are controlled epitaxially to realize a functional version of the VCSEL (“it is possible to suppress… the occurrence of thickness variations the first compound semiconductor layer…, it is possible to achieve stability in the characteristics of the obtained light emitting element “, “the first compound semiconductor layer is formed using horizontal growth using a method in which epitaxial growth is caused in the horizontal direction, such as an epitaxial lateral overgrowth (ELO) method”, ¶ [0010] and [0069]). Regarding claim 9, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Fig. 4 of Futagawa further discloses wherein the resonant cavity of the VCSEL does not contain a substantial portion of the host substrate (11) (Fig. 4, “the substrate for manufacturing a light emitting element 11 is removed”, ¶ [0109]). Regarding claim 14, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Futagawa further discloses wherein the growth restrict mask (12) is placed using a sputter-like deposition system (“the method of forming the mask layer… a sputtering method”, ¶ [0093]). Regarding claim 15, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Futagawa further discloses wherein the host substrate (11) is a semiconducting substrate (“the substrate for manufacturing a light emitting element 11 formed from a GaN substrate”, ¶ [0105]). Regarding claim 16, Futagawa and Wunderer together disclose the method of claim 15 as applied above, and Futagawa further discloses wherein the semiconducting substrate (11) is a III-nitride substrate (11) (“the substrate for manufacturing a light emitting element 11 formed from a GaN substrate”, ¶ [0105]). Regarding claim 17, Futagawa and Wunderer together disclose the method of claim 15 as applied above, and Futagawa further discloses wherein the semiconducting substrate (11) has any crystal orientation (“it is possible to use any of the main surfaces of the GaN substrate in forming the compound semiconductor layer”, ¶ [0083]). Regarding claim 19, Figs. 1A-6 of Futagawa disclose a method for fabricating a quality and manufacturable aperture for light emitting elements (Figs. 1A-6, “the method of manufacturing a light emitting element”, ¶ [0057]), comprising: forming IIl-nitride semiconductor layers (Fig. 1B, “a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor,”, ¶ [0096]) on a substrate (11) using a growth restrict mask (12) deposited on a host substrate (11), wherein the III-nitride semiconductor layers (21) are formed as a bar of one or more devices (Fig. 1B, “a layered structure body 20 formed by layering a first compound semiconductor layer 21 formed from a GaN-based compound semiconductor”, ¶ [0096]); and fabricating one or more light emitting resonating cavities on the bar, wherein the light emitting resonating cavities are defined by distributed Bragg reflectors (41) formed on the removed III-nitride semiconductor layers (“the first compound semiconductor layer is formed using horizontal growth using a method in which epitaxial growth is caused in the horizontal direction, such as an epitaxial lateral overgrowth (ELO) method”, “a surface-emitting laser element (vertical resonator laser, VCSEL) that emits light from the top surface of the first compound semiconductor layer 21 via the first light reflecting layer 41”, ¶ [0069] and [0098]). Futagawa fails to disclose wherein epitaxial lateral overgrowth (ELO) of the III-nitride layers occurs first in an opening area in the growth restrict mask and then laterally from the opening area over the growth restrict mask, resulting in a wing region on either side of the opening area, and the light emitting resonating cavities are defined by distributed Bragg reflectors formed on the wing region. In the similar field of endeavor of gallium nitride-based devices, Figs. 7 and 24 of Wunderer disclose wherein epitaxial lateral overgrowth (ELO) of the III-nitride layers (20) occurs first in an opening area in the growth restrict mask (14) and then laterally from the opening area over the growth restrict mask(“the epitaxial film 20 of GaN is planarized by utilizing SAG growth parameters that encourage two-dimensional growth”, ¶ [0038]), resulting in a wing region on either side of the opening area (“The resulting epitaxial film 20 includes an upper portion 22 substantially free of TDs”, ¶ [0038]), and the light emitting resonating cavities (Fig. 24, VCSEL 200, ¶ [0051]) are defined by distributed Bragg reflectors (220) formed on the wing region (Fig. 24, GaN region 206 free of TDs, ¶ [0051]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the DBR placement as disclosed by Wunderer, to increase device performance and lifetime (see Wunderer, ¶ [0028]). Claims 2, 4, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) and Wunderer (US 20150340223 A1) in further view of David et al. (US 20200366067 A1) herein after “David”. Regarding claim 2, Futagawa and Wunderer together disclose the method of claim 1 as applied above, but Futagawa and Wunderer fail to disclose further comprising forming additional ELO III-nitride layers on the at least one of the dielectric DBR mirrors. In the similar field of endeavor of VCSEL, Fig. 2 of David discloses further comprising forming additional ELO III-nitride layers (Fig. 2, top n-doped GaN, ¶ [0068]) on the at least one of the dielectric DBR mirrors (Fig. 2, intermediate mirror, ¶ [0064]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with additional nitride layers as disclosed by David, to obtain the desired electrical properties (see David, ¶ [0189]). Regarding claim 4, Futagawa, Wunderer and David together disclose the method of claim 1 as applied above, but Futagawa and Wunderer fail to disclose wherein the at least one of the dielectric DBR mirrors are sandwiched between the removed ELO III-nitride layers and the additional ELO III-nitride layers. In the similar field of endeavor of VCSEL, Fig. 2 of David discloses wherein the at least one of the dielectric DBR mirrors (intermediate mirror) are sandwiched between the removed ELO III-nitride layers (Fig. 2, bottom n-doped GaN, ¶ [0068]) and the additional ELO III-nitride layers (top n-doped GaN). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with additional nitride layers as disclosed by David, to obtain the desired electrical properties (see David, ¶ [0189]). Regarding claim 8, Futagawa and Wunderer together disclose the method of claim 1 as applied above, and Futagawa discloses the need to extract heat from the VCSEL during device operation (see Futagawa, ¶ [0176]), but Futagawa and Wunderer fail to explicitly disclose wherein at least one of the removed ELO III-nitride layers is used to extract heat from the VCSEL during device operation. In the similar field of endeavor of VCSEL, David discloses wherein at least one of the removed ELO III-nitride layers is used to extract heat from the VCSEL during device operation (“utilize the thermal conductivity of the epitaxial layers and nitride-containing substrate (or other substrate with high thermal conductivity) to spread the heat laterally first and increase the area for heat extraction out of the device”, ¶ [0288]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the using the ELO III-nitride layers for heat extraction as disclosed by David, to facilitate good performance (see David, ¶ [0287]). Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) and Wunderer (US 20150340223 A1) in further view of Zhu et al. (US 20020163688 A1) herein after “Zhu”. Regarding claim 10, Futagawa and Wunderer together disclose the method of claim 1 as applied above, but Futagawa fails to disclose wherein the backside of the removed ELO III- nitride layers has a non-planar shape. In the similar field of endeavor of VCSEL, Fig. 5 of Zhu discloses wherein the backside of the removed ELO III-nitride layers (514) has a non-planar shape (“a long laterally overgrown spacer 514… may be constructed upon a concave mesa”, ¶ [0075]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the non-planar shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]). Regarding claim 11, Futagawa, Wunderer and Zhu together disclose the method of claim 10, but Futagawa fails to disclose wherein the non-planar shape comprises a curvature, the backside of the removed ELO III-nitride layers has a finite radius of the curvature, and a center of the curvature is on a side of the host substrate's surface. In the similar field of endeavor of VCSEL, Fig. 5 of Zhu discloses wherein the non-planar shape comprises a curvature (Fig. 5, “the VCSEL substrate is curved”, ¶ [0069]), the backside of the removed ELOIII-nitride layers (514) has a finite radius of the curvature, and a center of the curvature is on a side of the host substrate's (Fig. 5, substrate 512, ¶ [0073]) surface. It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the curved shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]). Regarding claim 12, Futagawa, Wunderer and Zhu together disclose the method of claim 10, but Futagawa fails to disclose wherein the host substrate is pre-patterned to realize the non-planar shape. In the similar field of endeavor of VCSEL, Fig. 8 of Zhu discloses wherein the host substrate (512) is pre-patterned to realize the non-planar shape (Fig. 8, “process will be to smooth out the rough edges and form the desired concave shape 854”, ¶ [0074]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the curved shape as disclosed by Zhu, to reduce diffraction and geometrical losses (see Zhu, ¶ [0031]). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa (US 20150044795 A1) and Wunderer (US 20150340223 A1) in further view of Izumi et al. (US 20170373468 A1) herein after “Izumi”. Regarding claim 13, Futagawa and Wunderer together disclose the method of claim 1 as applied above, but Futagawa fails to disclose wherein the growth restrict mask comprises a multi-layer structure. In the similar field of endeavor of light emitting devices, Fig. 3C of Izumi discloses wherein the growth restrict mask (Fig. 3C, selective growth mask layer 44, ¶ [0167]) comprises a multi-layer structure (Fig. 3C, “the selective growth mask layer 44 includes the dielectric multilayer film 43B”, ¶ [0174]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the method of Futagawa with the multi-layer structure as disclosed by Izumi, to achieve desired dimensions and electrical properties (see Izumi, ¶ [0037]). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORALIE NETTLES whose telephone number is (571)270-5374. The examiner can normally be reached Mon-Fri. 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.N./ Examiner, Art Unit 2893 /YARA B GREEN/ Supervisor Patent Examiner, Art Unit 2893
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Prosecution Timeline

Apr 06, 2022
Application Filed
Dec 29, 2025
Non-Final Rejection mailed — §103
Mar 27, 2026
Response Filed
Apr 28, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
97%
With Interview (+30.6%)
3y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 33 resolved cases by this examiner. Grant probability derived from career allowance rate.

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