Prosecution Insights
Last updated: April 19, 2026
Application No. 17/768,182

METHOD TO IMPROVE THE PERFORMANCE OF ALUMINUM-CONTAINING AND GALLIUM-CONTAINING LIGHT- EMITTING DEVICES USING SIDEWALL SURFACE TREATMENTS AND SIDEWALL PASSIVATION

Non-Final OA §103§112
Filed
Apr 11, 2022
Examiner
WINTERS, SEAN AYERS
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
The Regents of the University of California
OA Round
5 (Non-Final)
87%
Grant Probability
Favorable
5-6
OA Rounds
3y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
97 granted / 112 resolved
+18.6% vs TC avg
Strong +25% interview lift
Without
With
+24.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
80 currently pending
Career history
192
Total Applications
across all art units

Statute-Specific Performance

§103
58.8%
+18.8% vs TC avg
§102
30.6%
-9.4% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 112 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/16/2026 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 33-36 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 33 presently requires “wherein the sidewalls of the dry-etched mesa of the micro light emitting diode are surface-treated by alternating pulse cycles of trimethyl aluminum (TMA) and at least nitrogen plasma to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls, such that there is no deposition from the TMA and nitrogen plasma”, that is, claim 33 requires there be no deposition whatsoever from use of the TMA + Nitrogen plasma. However, page 4 lines 1-8 of the instant application’s specification indicate that when the Nitrogen plasma is employed ‘to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls’, this is done “by removing non-radiative combination sites, reducing the surface sites, and filling the vacancies by nitrogen” – indicating that the plasma treatment process necessarily results in the incorporation of nitrogen atoms from the plasma into the treated surface, which would constitute a deposition of nitrogen into/onto the surface. Therefore, the instant application fails to provide evidence supporting the negative limitation(s) that there is “no deposition from the TMA and nitrogen plasma”, as the plasma treatment involves a deposition of nitrogen atoms. In order to resolve this apparent contradiction, Applicant would need to rephrase claim 33 to more-specifically clarify that ‘there is no deposition from TMA’, which captures what is apparently intended by the statement “there is no deposition from the metal organic” in page 4, lines 7-8 of the instant application’s specification. Applicant could accomplish this by amending claim 33 to read “such that there is no deposition from the TMA in the nitrogen plasma” or “such that there is no deposition from the TMA with the nitrogen plasma” or, simply, “such that there is no deposition from the TMA…”. For the purposes of Examination, claim 33 has been interpreted as “wherein the sidewalls of the dry-etched mesa of the micro light emitting diode are surface-treated by alternating pulse cycles of trimethyl aluminum (TMA) and at least nitrogen plasma to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls, such that there is no deposition from the TMA; and wherein one or more dielectric materials comprising sapphire (A1203) are deposited after the surface-treated sidewalls are surface-treated to passivate the surface-treated sidewalls…”. Claims 34-36 are also rejected by virtue of their dependency on claim 33. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 16, 18, 20-22, 24-26, 28-30, and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Kopp (U.S. PG Pub No US2018/0358510A1) (of record) in view of Ando (U.S. PG Pub No US2018/0005821A1) (of record). Regarding claim 16, Kopp teaches a device (100) fig. 7 [0001, 0053], comprising: one or more aluminum-containing and gallium-containing [0006] semiconductor layers (comprising 3 and 5) fig. 7 [0006, 0052] grown on a substrate (1) fig. 1 [0054] and forming a micro light emitting diode (100) (microLED) (LED [0001] with micron-sized parts [0014-0016]); wherein the aluminum-containing and gallium-containing semiconductor layers (comprising 3 and 5) are dry-etched [0055] to define a mesa [0018, 0042, 0053] of the micro light emitting diode (100) (microLED) (LED [0001] with micron-sized parts [0014-0016]) and sidewalls of the mesa [0018, 0042, 0053]; wherein the sidewalls of the dry-etched mesa of the micro light emitting diode (100) (comprising aluminum-containing and gallium-containing semiconductor layers (3, 5)) are surface-treated [0064] (by pulses of nitrogen plasma [0040]) to remove damage from the sidewalls (the additional etching process [0064] is considered as a surface treatment since it would remove an outermost surface of the sidewalls and any damage associated with it); and wherein one or more dielectric materials (81) fig. 7 [0065] are deposited on the sidewalls (of 3 and 5) which are surface treated [0064] to passivate [0065] the surface-treated sidewalls (of 3 and 5). With respect to the following, underlined limitation(s) --- wherein the sidewalls of the dry-etched mesa of the micro light emitting diode are surface-treated by alternating pulse cycles of trimethyl aluminum (TMA) and at least nitrogen plasma to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls, such that there is no deposition from the TMA and nitrogen plasma; and wherein one or more dielectric materials comprising sapphire (Al2O3) are deposited after the sidewalls are surface-treated to passivate the surface-treated sidewalls.--- For the purposes of Examination, these limitation(s) in the device claims concerning the chemicals used in intermediate processing steps – that is, their chemical state (plasma), their chemical identity (TMA and nitrogen), and their sequential application (alternating pulses) – as well as the limitation(s) concerning the sequence of deposition relative to the surface-treatment step (“one or more dielectric materials comprising sapphire (Al2O3) are deposited after the sidewalls are surface-treated…”) - have been considered product-by-process limitations that do not have patentable weight since they are not known to impart a distinct structure in the finished product. In order to overcome this interpretation, Applicant would need to claim a structural detail of the finished product which is changed by the specific chemicals applied in intermediate steps, such as the incorporation of nitrogen as part of the nitrogen plasma treatment. (See MPEP, 2113). Therefore, for the purposes of Examination, the underlined limitation(s) above have been interpreted as “wherein the sidewalls of the dry-etched mesa of the micro light emitting diode are surface-treated to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls; and wherein one or more dielectric materials comprising sapphire (Al2O3) are deposited on the sidewalls which are surface-treated to passivate the surface-treated sidewalls” in the device claim 16. However, Kopp does not explicitly disclose one or more dielectric materials (81) fig. 7 [0065] (“passivation layer”) comprising sapphire (Al2O3) (material not disclosed). Ando teaches a device (100) fig. 2 [0025, 0029] comprising one or more dielectric materials (215) fig. 2 [0050] (“passivation layer”) comprising sapphire (Al2O3) [0030, 0051] (as well as nitrogen-additives). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the passivation layer of Kopp to be composed of aluminum oxide [0051] (sapphire) because of the material’s art-recognized suitability as a passivation layer [0021, 0030, 0065] which provides a good interface for other dielectric materials [0065] and offers lower leakage [0021, 0065] and improved device capacitance characteristics [0021, 0065], as taught by Ando. Regarding claim 18, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 16. Kopp also teaches wherein the aluminum-containing and gallium-containing semiconductor layers (comprising 3 and 5) fig. 7 [0006, 0052] include one or more nitrogen (N) [0006], phosphorus (P) [0006], or arsenic (As) [0006] atoms as counter atoms. Regarding claim 20, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 16. Kopp also teaches wherein the micro light emitting diode (100) (microLED) (LED [0001] with micron-sized parts [0014-0016]) has one or more edges (of layer 5) fig. 7 [0016] with a (vertical) length of less than 80 micrometers (right, vertical edge “length” / thickness of p-type layer 5 could be 10nm/ 0.01 micrometers). Regarding claim 21, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 16. Kopp also teaches wherein the dielectric materials (81) fig. 7 [0065] are conformal in covering the surface-treated sidewalls (of 3 and 5) fig. 7 [0065]. Regarding claim 22, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 16. Kopp also teaches wherein the dielectric materials (81) fig. 7 [0065] are deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition, or other chemical vapor deposition. For the purposes of Examination, the limitation(s) concerning the specific deposition process of the dielectric material - i.e., by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition, or other chemical vapor deposition – have been considered product-by-process limitations that do not have patentable weight since they are not known to impart a distinct structure in the finished product (See MPEP, 2113). Regarding claim 24, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 16. Kopp also teaches wherein the aluminum-containing and gallium-containing [0006] semiconductor materials (comprising 3 and 5) fig. 7 [0006, 0052] comprise group III and group V elements with a chemical formula of AIxGayInzNvPwAsu where 0 ≤ x/y/z/v/w/u≤1 [see 0006]. Regarding claim 25, Kopp teaches a device (100) fig. 7 [0001, 0053] comprising: a micro light emitting diode (microLED) (LED [0001] with micron-sized parts [0014-0016]), comprising: a mesa [0018, 0053] comprising aluminum-containing and gallium-containing [0006] semiconductor layers (3 and 5) fig. 7 [0006, 0052]: a top surface with an area (of a selected portion of top surface) of 100 micrometers squared of less (although top surface area not explicitly disclosed [0016], “an area” of a select portion of the top surface may be chosen having “an area” far below 100 micrometers squared); a side surface connected to the top surface (bordering at upper corner), wherein the side surface is a (part of) a sidewall of the mesa [0018, 0042] surface-treated by nitrogen plasma [0040, 0065] to alter a surface chemistry of the sidewall [0040] (by-passivation) [0065]; and a dielectric (81) fig. 7 [0065] deposited on the sidewall which is surface treated [0040] to passivate [0065] the sidewall of the mesa [0018, 0042]. With respect to the following, underlined limitation(s) --- wherein the side surface is a dry-etched sidewall of the mesa surface-treated by alternating pulse cycles of trimethyl aluminum (TMA) and at least nitrogen plasma to remove damage from the sidewall that was dry-etched or to alter a surface chemistry of the sidewall, such that there is no deposition from the TMA and nitrogen plasma; and a dielectric comprising sapphire (A12O3) deposited after the sidewall is surface-treated to passivate the sidewall of the mesa --- For the purposes of Examination, these limitation(s) in the device claims concerning the chemicals used in intermediate processing steps – that is, their chemical state (plasma), their chemical identity (TMA and nitrogen), and their sequential application (alternating pulses) - as well as the limitation(s) concerning the sequence of deposition relative to the surface-treatment step (“a dielectric comprising sapphire (A1203) deposited after the sidewall is surface treated…”) - have been considered product-by-process limitations that do not have patentable weight since they are not known to impart a distinct structure in the finished product. In order to overcome this interpretation, Applicant would need to claim a structural detail of the finished product which is changed by the specific chemicals applied in intermediate steps, such as the incorporation of nitrogen as part of the nitrogen plasma treatment. (See MPEP, 2113). Therefore, the underlined limitation(s) above have been interpreted as “wherein the side surface is a dry-etched sidewall of the mesa surface-treated to remove damage from the sidewall that was dry-etched or to alter a surface chemistry of the sidewall; and a dielectric comprising sapphire (A12O3) deposited on the sidewall which is surface-treated to passivate the sidewall of the mesa.” in the device claim 25. However, Kopp does not explicitly comprising one or more dielectric materials (81) fig. 7 [0065] (“passivation layer”) comprising sapphire (Al2O3) (material not disclosed). Ando teaches a device (100) fig. 2 [0025, 0029] comprising one or more dielectric materials (215) fig. 2 [0050] (“passivation layer”) comprising sapphire Al2O3 [0062] (as well as nitrogen-additives). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the passivation layer of Kopp to be composed of aluminum oxide [0051] (sapphire) because of the material’s art-recognized suitability as a passivation layer [0021, 0030, 0065] which provides a good interface for other dielectric materials [0065] and offers lower leakage [0021, 0065] and improved device capacitance characteristics [0021, 0065], as taught by Ando. Regarding claim 26, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 25. Kopp also teaches wherein the aluminum-containing and gallium-containing semiconductor layers (comprising 3 and 5) fig. 7 [0006, 0052] include one or more nitrogen (N) [0006], phosphorus (P) [0006], or arsenic (As) [0006] atoms as counter atoms. Regarding claim 28, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 25. Kopp also teaches wherein the device has one or more edges (of layer 5) fig. 7 [0016] with a (vertical) length of less than 80 micrometers (right, vertical edge “length” /thickness of p-type layer 5 could be 10nm/ 0.01 micrometers). Regarding claim 29, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 25. Kopp also teaches wherein the dielectric materials (81) fig. 7 [0065] are conformal in covering the surface-treated sidewalls (of 3 and 5) fig. 7 [0065]. Regarding claim 30, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 25. Kopp also teaches wherein the dielectric materials (81) fig. 7 [0065] are deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition, or other chemical vapor deposition. For the purposes of Examination, the limitation(s) concerning the specific deposition process of the dielectric material - i.e., by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition, or other chemical vapor deposition – have been considered product-by-process limitations that do not have patentable weight since they are not known to impart a distinct structure in the finished product (See MPEP, 2113). Regarding claim 32, Kopp teaches the device (100) fig. 7 [0001, 0053] of claim 25. Kopp also teaches wherein the aluminum-containing and gallium-containing [0006] semiconductor materials (comprising 3 and 5) fig. 7 [0006, 0052] comprise group III and group V elements with a chemical formula of AIxGayInzNvPwAsu where 0 ≤ x/y/z/v/w/u≤1 [see 0006]. Claims 19 and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Kopp (U.S. PG Pub No US2018/0358510A1) (of record) modified by Ando (U.S. PG Pub No US2018/0005821A1) (of record), as applied in claims 16 and 25 above, and further in view of Chen (U.S. PG Pub No US2011/0038146A1) (of record). Regarding claims 19 and 28 Kopp teaches the device (100) fig. 7 [0001, 0053] of claims 16 and 25. However, Kopp does not explicitly disclose wherein the micro light emitting diode (100) (microLED) (LED [0001] with micron-sized parts [0014-0016]) has a sidewall perimeter to light emitting area ratio larger than 0.04 /micrometer. Chen teaches a device (3_2) fig. 5 [0083] wherein the (LED) device has a sidewall perimeter (“side length” 40 microns [0084]) to light emitting area ratio (“peripheral area” portion = 16 microns^2) larger than 0.04 /micrometer (40 micron / 16 micron^2 = 2.5 / micron > 0.04 / micron). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the proportions of the micro-LED of Kopp such that the side length: emission area is greater than typical [0084] in order to increase side-liberation of photons [0084] so as to boost quantum efficiency [0084], as taught by Chen. Claims 23 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Kopp (U.S. PG Pub No US2018/0358510A1) (of record) modified by Ando (U.S. PG Pub No US2018/0005821A1) (of record), as applied in claims 16 and 25 above, and further in view of Moore (U.S. PG Pub No US2015/0311084A1) (of record). Regarding claims 23 and 31, Kopp teaches the device (100) fig. 7 [0001, 0053] of claims 16 and 25. However, Kopp does not explicitly disclose a post-dielectric deposition improve material quality and an interface between the dielectric materials (81) fig. 7 [0065] and the sidewalls. Moore teaches a device [see fig. 12, 0011, 0036] comprising a post-dielectric deposition (subsequent, additional passivation layer 53 deposited) fig. 3 [0020-0022] to improve material quality and an interface between the dielectric materials (52) fig. 3 [0020] and the sidewalls. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the deposition of the passivation layer of Kopp to include the deposition of additional passivation layers [0020-0022] in order to enhance the leakage current reduction qualities [0021] of the passivation layer, as taught by Moore. Response to Arguments Applicant's arguments filed 12/31//2025 have been fully considered but they are not persuasive: Applicant’s argument(s) of device claims 16 and 25 with respect to the teachings of Kopp and Ando and the amended limitation(s) concerning the missing details of the claimed surface treatment that “there is no surface treatment … after being dry-etched by alternating pulse cycles of TMA and at least nitrogen plasma to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls, such that there is no deposition from the TMA and nitrogen plasma, and there is no deposition of sapphire (A1203) after the sidewalls are surface-treated to passivate the surface-treated sidewalls …” have been fully-considered, but are rendered largely moot by the product-by-process argument detailed in the 35 U.S.C. 103 rejection; see 35 U.S.C. 103 rejection presented above as well as MPEP 2113. It is emphasized that claims 16 and 25 are directed to a finished device, not a method, and intermediate process steps are deemed irrelevant when determining the patentability of the claimed device if they do not impart a distinct structure to the finished product. The details of the plasma deposition process such as “alternating pulses” and “TMA and nitrogen plasma” are particularly irrelevant since there is supposedly “no deposition from the TMA and nitrogen plasma” – that is, these details of the intermediate process steps are explicitly said not to impart any unique, remaining structural detail/difference to the finished product. In order to definitively overcome the product-by-process arguments, Applicant would need to claim specific structural details in the finished product that result from use of these plasma-precursors in the finished product, such as nitrogen plasma treatment resulting in “filling vacancies by nitrogen” (instant application specification page 4, line 4). Allowable Subject Matter Claims 33-36, as interpreted in the 35 U.S.C. 112(a) new matter rejection, are considered to contain allowable subject matter. The following is a statement of reasons for the indication of allowable subject matter: If claim 33 were amended to overcome the 35 U.S.C. 112(a) new matter rejection and read “wherein the sidewalls of the dry-etched mesa of the micro light emitting diode are surface-treated by alternating pulse cycles of trimethyl aluminum (TMA) and at least nitrogen plasma to remove damage from the sidewalls that were dry-etched or to alter a surface chemistry of the sidewalls, such that there is no deposition from the TMA; and…”, this would be considered to render claims 33-36 allowable. The prior art of record neither anticipates nor renders obvious the claimed limitation(s) “such that there is no deposition from the TMA” in the context of claim 33. Claims 34-36 would also be allowed by virtue of their dependency on claim 33. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Matsuoka (U.S. PG Pub No US2008/0012025A1) (of record) discloses other length, width, and thickness characteristics for a micro-LED stack. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAN AYERS WINTERS whose telephone number is (571)270-3308. The examiner can normally be reached Monday - Friday 10:30 am - 7:00 pm (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEAN AYERS WINTERS/Examiner, Art Unit 2892 01/20/2026 /NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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Prosecution Timeline

Apr 11, 2022
Application Filed
Jul 30, 2024
Non-Final Rejection — §103, §112
Nov 07, 2024
Response Filed
Nov 18, 2024
Final Rejection — §103, §112
Feb 25, 2025
Request for Continued Examination
Feb 26, 2025
Response after Non-Final Action
Mar 20, 2025
Non-Final Rejection — §103, §112
Jul 25, 2025
Response Filed
Sep 25, 2025
Final Rejection — §103, §112
Dec 16, 2025
Response after Non-Final Action
Dec 31, 2025
Request for Continued Examination
Jan 12, 2026
Response after Non-Final Action
Jan 20, 2026
Non-Final Rejection — §103, §112 (current)

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5-6
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+24.7%)
3y 5m
Median Time to Grant
High
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