Prosecution Insights
Last updated: July 17, 2026
Application No. 17/770,363

RESISTANCE ELEMENT AND ELECTRONIC DEVICE

Non-Final OA §102§103§112
Filed
Apr 20, 2022
Priority
Oct 31, 2019 — JP 2019-198096 +1 more
Examiner
BODNAR, JOHN A
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Group Corporation
OA Round
6 (Non-Final)
83%
Grant Probability
Favorable
6-7
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
492 granted / 591 resolved
+15.2% vs TC avg
Moderate +12% lift
Without
With
+11.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
27 currently pending
Career history
616
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
80.7%
+40.7% vs TC avg
§102
5.3%
-34.7% vs TC avg
§112
8.9%
-31.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 591 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION This application, 17/770,363, attorney docket 6810-1570, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned to Sony Semiconductor Solutions Corp, and is a National Stage entry of PCT/JP2020/030440 and claims foreign priority to Japanese application JP2019-198096, filed 10/31/2019. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/2/2028 has been entered. Claims 12-14, 16,17 and 19-26 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found. Response to Arguments In his response of 6/2/2025, applicant argues that the art of record Yoo does not teach or make obvious a protective layer between portions of the resistance line. Examiner disagrees. Yoo teaches in figure 3c, ta portion of the protective film 128 between the left and right portion of the resistive layer , directly below contact 122a. Applicant appears to intend to claim the protective material that fills the trench formed by resistive material deposited on the sidewalls of the fins, call protrusion by the applicant. However, because the formed trench is taught by Cheng, filling it with protective material would have been obvious. Examiner notes that the amendment “above a semiconductor substrate does not distinguish from Yoo because every portion of the resistive structure of Yoo is above the substrate, although arguably not above the topmost surface of the substrate. Examiner must maintain the rejection which is amened below. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 12, 13, 14, 16, 17 and 19-33 rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claims contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor at the time the application was filed, had possession of the claimed invention. Applicant has amended claim 12 and added claim 27 to include a limitation that the protective film is between the portions of the resistive film in a vertical direction. The examiner can only interpret that to mean that the protective film extends from the first portion to the second portion in a vertical direction that is perpendicular to the substrate. This requires the first and second portions of the resistive film to be vertically aligned, with the protective film between them. The disclosure labels the protective film as 150 [0052]. Nowhere is it vertically between portions of the resistive film 140. Claims 13, 14, 16, 17, 19-26 and 28-33 depend from claims 12 or 27 and include the same defect. As for claim 14, the disclosure does not appear to support claim 14, which requires a plurality of resistive films that traverse the plurality of protrusions. That requires multiple lines of films over the same set of protrusion claimed previously. Claim 16 includes the same defect as the parent As for claims 12 and 27, claims 12 and 27 require the resistive film to form along the protrusions, which examiner interprets to mean across the major axis of the protrusions as shown in figure 1 of the disclosure. There is no support for a resistive film formed along the protrusions, only across the protrusions. Claims 13, 14, 16,17, 19-26 and 28-33 depend from claims 12 or 27 and include the same defect. Claim 13 and 14 16 and 28 and 29 and 30 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term “series” in claims 13, 14, 27 and 28 is used by the claims to mean “continuous” while the accepted meaning is “discrete but electrically connected” The term is indefinite because the specification does not clearly redefine the term. One skilled is an electronics design engineer who would interpret a series of resistor portions to be physically separated and connected by a wire, so the use of series here is misleading and not clarified by the specification. Dependent claims include the defect of the parent. Claims 27-33 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claim 27 recites, “wherein the resistive film includes a first portion and a second portion are provided between the first protrusion and the second protrusion, with the first portion in contact with the first protrusion and the second portion in contact with the second protrusion.” It is not clear what is provided between the protrusions, examiner will assume both portions are provided between the protrusions, i.e., “wherein the resistive film includes a first portion and a second portion that are provided between the first protrusion and the second protrusion…” Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 12-14, 17, 19-21, 25, 27-29 and 31-33 are rejected under 35 U.S.C. 102a1/a2 as being anticipated by Yoo et al. (U.S. 2015/0102394). As for claim 12, Yoo teaches in figures 2 and 3C, electronic device, comprising: a resistance element (122) including a resistive film (108c), wherein the resistive film forms above a semiconductor substrate (100 at 102); a plurality of protrusions (fins, 102) including a first protrusion and a second protrusion located side by side (three fins are shown extending in the first direction of figure 2), wherein the resistive film includes a first portion and a second portion (108c at left and right of figure 3c), wherein the first portion forms along the first protrusion (102 at far left of figure 3c), and wherein the second portion forms along the second protrusion (center fin under 108c on the left side of figure 3c) a protective film (128, under 122b, which runs along the fins, thus between the portions, shown in figure 3A) located between the first portion and the second portion in a vertical direction (see §112 discussion above); and a fin transistor (gate120b in figure 3A and source/drains 112/110) placed on the semiconductor substrate and connected to the resistance element (at 136 in figure 2), wherein a fin of the fin transistor is part of the plurality of protrusions (the channel 120b is on fin 102 in figure 3b ). As for claim 13, Yoo teaches the electronic device according to claim 12, and teaches in figure 2 a plurality of the resistive films (108C) connected in series (by connector 122b). As for claim 14, Yoo teaches the electronic device according to claim 13, wherein the plurality of substrate is connected in series (shown in figs 2 and 3c). As for claim 17, Yoo teaches the electronic device according to claim 12, and teaches that the resistive film is adjacent to the plurality of protrusions via an insulating film (106). As for claim 19, Yoo teaches the electronic device according to claim 12, and Yoo teaches that the resistive film includes polycrystalline silicon [0016]. As for claim 20, Yoo teaches the electronic device according to claim 12, but does not teach that the plurality of protrusions is formed by grinding a surface of the semiconductor substrate around each protrusion of the plurality of protrusions. However, the limitation “formed by grinding a surface of the semiconductor substrate” is a process, and the claim is directed to a product. It has been held that a product-by-process claim is directed to the product per se, regardless of how the product is actually made. In re Thorpe, 227 USPQ 964 (CAFC, 1985) and the related case law cited therein make it clear that it is the final product which must determine patentability in a product-by-process claim, and not the process by which it is made. Here the fins are formed by a etch process in figure 4, and a grinding process along the edges of the pattern using the appropriate width grinder would form the same device, so the limitation does not distinguish the claimed invention from Yoo. As for claim 21, Yoo teaches the electronic device according to claim 12, and teaches in figure 4 that the plurality of protrusions is formed simultaneously with a fin of the fin transistor. As for claim 25, Yoo teaches the electronic device according to claim 12, and Yoo teaches a source (110a, [0102], shown in figure 3A) of a MOS transistor is located between the resistance element and a gate of the MOS transistor. As for claim 27, Yoo teaches in figures 2 and 3a-3c an electronic device, comprising a resistance element (122) including a resistive film (208c), wherein the resistive film forms above a semiconductor substrate (102/104); a plurality of protrusions (fins, 102, formed of the substrate) including a first protrusion and a second protrusion located directly adjacent to each other (three fins are shown extending in the first direction of figure 2), extending from the semiconductor substrate and formed of a same material as the semiconductor substrate (fins, 102, formed of the substrate), wherein the resistive film includes a first portion and a second portion (108c at left and right of figure 3c), are provided between the first protrusion and the second protrusion (both extend across the protrusions, figure 3c), with the first portion in contact with the first protrusion and the second portion in contact with the second protrusion (both contact both fins); a protective film (128, under 122b, which runs along the fins, thus between the portions, shown in figure 3A) located between the first portion and the second portion in a vertical direction (see §112 discussion above); and a fin transistor (gate120b in figure 3A and source/drains 112/110) placed on the semiconductor substrate and connected to the resistance element (at 136 in figure 2), wherein a fin of the fin transistor is part of the plurality of protrusions. (the channel 120b is on fin 102 in figure 3b ). As for claim 28, Yoo teaches the electronic device according to claim 27, further comprising a plurality of the resistive films connected in series. (by connector 122b). As for claim 29, Yoo teaches the electronic device according to claim 28, wherein the plurality of the resistive films traversing the plurality of the protrusions on the semiconductor substrate is connected in series. (by connector 122b). As for claim 31, Yoo teaches the electronic device according to claim 27, and teaches that the resistive film is adjacent to the plurality of protrusions via an insulating film. (106) As for claim 32, Yoo teaches the electronic device according to claim 27, wherein the resistive film includes polycrystalline silicon. Yoo [0016]. As for claim 33, Yoo teaches the electronic device according to claim 27, but does not teach that the plurality of protrusions is formed by grinding a surface of the semiconductor substrate around each protrusion of the plurality of protrusions. However, the limitation “formed by grinding a surface of the semiconductor substrate” is a process, and the claim is directed to a product. It has been held that a product-by-process claim is directed to the product per se, regardless of how the product is actually made. In re Thorpe, 227 USPQ 964 (CAFC, 1985) and the related case law cited therein make it clear that it is the final product which must determine patentability in a product-by-process claim, and not the process by which it is made. Here the fins are formed by a etch process in figure 4, and a grinding process along the edges of the pattern using the appropriate width grinder would form the same device, so the limitation does not distinguish the claimed invention from Yoo. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 16, 22-24, 26 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo in view of Cheng et al. (U.S. 2015/0061076). As for claim 16, Yoo teaches the electronic device according to claim 14, but Yoo does not teach that two adjacent protrusions of the plurality of protrusions are placed at an interval exceeding twice a thickness of the resistive film. However, Cheng teaches in figure 5 that two adjacent protrusions of the plurality of protrusions are placed at an interval exceeding twice a thickness of the resistive film. It would have been obvious to one skilled in the art at the effective filing date of this application to substitute fin spacing of Cheng for the spacing of Yoo because it is necessary to provide space to fill with an insulation to prevent a shorted path between the vertical portions of the resistive film to provide the resistance characteristics of Cheng. One skilled in the art would have combined these elements with a reasonable expectation of success because one of ordinary skill in the art would have recognized that using the dimensions of Cheng would have yielded predictable results and resulted in a desired resistor characteristic. As for claim 22, Yoo teaches the electronic device according to claim 12, but does not teach an insulating layer (106) placed on the surface of the semiconductor substrate (110b) adjacent to the plurality of protrusions (covers the protrusion and forms a step), wherein the resistive film traverses a step between the insulating layer and the plurality of protrusions. However, Cheng teaches in figure 11, an insulating layer (52) placed on the surface of the semiconductor substrate (50) adjacent to the plurality of protrusions (50f), wherein the resistive film (16) traverses a step between the insulating layer and the plurality of protrusions. It would have been obvious to one skilled in the art at the effective filing date of this application add the STI layer 52 to the device of Yoo to isolate the substrate from the resistive layer and isolate the components. One skilled in the art would have combined these elements with a reasonable expectation of success. As for claim 23, Yoo teaches the electronic device according to claim 22, but does not teach that the protrusion has a height of about 400 nm or less from the insulating layer. However, Cheng teaches a height above the Isolation layer of 10-100 nm ([0043], same as the fin in figure 2, [0065]), It would have been obvious to one skilled in the art at the effective filing date of this application adopt the height of the fin of Cheng to the device of Yoo because Cheng teaches that the resistance of the resistor is increased by the height of the fin times two, so a similar height will result in a similar resistance for a given resistive material. One skilled in the art would have combined these elements with a reasonable expectation of success because one of ordinary skill in the art would have recognized that using the dimensions of Cheng would have yielded predictable results and resulted in a desired resistor characteristic. As for claim 24, Yoo in view of Cheng makes obvious the electronic device according to claim 22, and in the combination, Cheng teaches that the insulating layer separates the resistive film from the surface of the semiconductor substrate excluding the plurality of protrusions. As for claim 26, Yoo teaches the electronic device according to claim 12, but does not teach the resistive film includes a concaved part between the first protrusion and the second protrusion. However, Cheng teaches in figure 5 resistive film includes a concaved part between the first protrusion and the second protrusion. It would have been obvious to one skilled in the art at the effective filing date of this application to provide the concave feature of Cheng in the device of Yoo because it is necessary to provide space to fill with an insulation to prevent a shorted path between the vertical portions of the resistive film to provide the resistance characteristics of Cheng. One skilled in the art would have combined these elements with a reasonable expectation of success because one of ordinary skill in the art would have recognized that using the dimensions of Cheng would have yielded predictable results and resulted in a desired resistor characteristic. As for claim 30, Yoo teaches the electronic device according to claim 29, but does not teach that two adjacent protrusions of the plurality of protrusions are placed at an interval exceeding twice a thickness of the resistive film. However, Cheng teaches in figure 5 that two adjacent protrusions of the plurality of protrusions are placed at an interval exceeding twice a thickness of the resistive film. It would have been obvious to one skilled in the art at the effective filing date of this application to substitute fin spacing of Cheng for the spacing of Yoo because it is necessary to provide space to fill with an insulation to prevent a shorted path between the vertical portions of the resistive film to provide the resistance characteristics of Cheng. One skilled in the art would have combined these elements with a reasonable expectation of success because one of ordinary skill in the art would have recognized that using the dimensions of Cheng would have yielded predictable results and resulted in a desired resistor characteristic. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A BODNAR whose telephone number is (571)272-4660. The examiner can normally be reached M-Th and every other Friday 7:30-5:30 Central time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN A BODNAR/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 10 earlier events
Apr 02, 2025
Final Rejection mailed — §102, §103, §112
Jun 02, 2025
Response after Non-Final Action
Jul 02, 2025
Request for Continued Examination
Jul 07, 2025
Response after Non-Final Action
Aug 18, 2025
Non-Final Rejection mailed — §102, §103, §112
Nov 13, 2025
Response Filed
Feb 02, 2026
Final Rejection mailed — §102, §103, §112
Apr 01, 2026
Response after Non-Final Action

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Prosecution Projections

6-7
Expected OA Rounds
83%
Grant Probability
95%
With Interview (+11.7%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 591 resolved cases by this examiner. Grant probability derived from career allowance rate.

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