Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 4/23/2026 has been entered.
Response to Amendment
Applicant’s amendments filed 4/23/2026 have been fully considered. The amendments of claims 11, 29, 30, and 34 and the cancellation of claims 31-33 are acknowledged. The rejections of claims 11-16, 19-20, 23-25, 27-28, and 30 under 35 U.S.C. 112 are withdrawn.
Response to Arguments
Applicant’s arguments with respect to claims 11, 29, and 30 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 11-16, 20-21, 27, 28, and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Tu et al. US 20120175630 A1 (hereinafter referred to as Tu), in view of Wu et al., US 20190115333 A1 (hereinafter referred to as Wu).
Regarding claim 11, Tu teaches
a mesa (“LED die 15” para. 0011);
a dielectric on the top surface (“electrically insulating layer 16” para. 0015); and
a hole in the dielectric that is centered or self aligned on the top surface (“through hole 161 defined above a central portion of a top of the P-type gallium nitrogen layer 157” of “LED die 15”, para. 0015); the hole has a first center within 0.5% of a second center of the top surface (the examiner understands that by saying “through hole 161” is in a central portion of the top surface of “LED 15”, the center of “through hole 161” and the center of the top of “LED die 15” are substantially aligned); and wherein the top surface includes an ohmic contact layer through which light from the microLED is emitted (“transparent electrically conducting layer 17” is made of indium tin oxide, para. 0017, a known ohmic contact as evidenced in para. 0051 of Lin et al. US 20170323873 A1 and col 5 lines 27-31 of Chang et al. US 6583443 B1).
However, Tu fails to teach the mesa comprising an epitaxial structure, the mesa having at least one of: a top surface with an area of 10 micrometers squared or less, or at least one of a diameter, a largest width, or a largest dimension of 10 micrometers or less; wherein the hole has a diameter of 2 microns or less.
Nevertheless Wu teaches
the mesa comprising an epitaxial structure (the mesa is “epitaxial structure 122” of “micro light-emitting devices 120”, para. 0031 FIG. 1B)
the mesa having at least one of: a top surface with an area of 10 micrometers squared or less, or at least one of a diameter, a largest width, or a largest dimension of 10 micrometers or less (“the maximum width of the vertical type micro LEDs may be 1 μm-100 μm” para. 0033 FIG. 1B).
Tu and Wu teach light emitting devices. Tu teaches an “N-type gallium nitrogen layer 153” and a P-type gallium nitrogen layer 157” sandwiching an “active layer 154” but they are not described as epitaxial. Wu teaches micro LEDs comprising an “epitaxial structure 122” (para. 0031). Epitaxial growth is a common technique used to form group III-nitride semiconductor LEDs as shown in Hwang et al. US 20170236807 A1 para. 0030-0042, Chae et al. US 20140361327 A1 para. 0006, and Lo et al. US 20190051792 A1 para. 0031-0033. The “epitaxial structure 122” in Wu has a maximum width as low as 1-2μm for use in a micro LED display device such as “display apparatus 100a” in FIG. 1. The examiner understands that by making light-emitting diodes smaller they can be more densely packed in a given surface area to offer greater image resolution. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that micro light emitting diodes allow for higher resolution displays than larger LEDs in a same surface area.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the light emitting device taught in Tu with the epitaxially formed mesas having a maximum width as taught in Wu. Epitaxial growth is a well-known process for forming group-III nitride semiconductor layers. By making the LED a micro light emitting diode, a display of higher resolution is obtained.
However, Tu modified by Wu fails to expressly teach wherein the hole has a diameter of 2 microns or less, the mesa sidewall is passivated and free of defects.
Nevertheless, Tu teaches that “electrically insulating layer 16” teaches a periphery of the top surface of “LED die 15” except the central “through hole 161”, such that the “through hole 161” is understood to have a smaller width or diameter than the “LED die 15”. Wu teaches that the maximum width of the “micro light-emitting devices 120” is 1m (Wu para. 0033). By making the microLED with a maximum diameter between 1-2µm as taught in Wu, forming “LED die 15” as taught in Tu implies the “through hole 161” has a diameter less than the diameter than the microLED. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that a hole in an insulating layer on top of a microLED as taught between Tu and Wu will have a smaller diameter than the microLED.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the microLED taught between Tanaka and Wu will have a hole diameter of 2 microns or less. By making the microLED smaller in order to achieve a greater resolution display, the diameter of the hole will scale down accordingly. For a microLED with a greatest diameter of 2 microns or less, for example, the diameter of the hole will be smaller than 2 microns.
Regarding claim 12, Tu, modified by Wu, teaches the micro light emitting diode of claim 11 but fails to expressly teach the area being: 1 micron squared or less, or 0.5 microns squared or less (the maximum width of the “micro light-emitting devices 120” in Wu can be 1μm. As such, it is understood that 1µm is the greatest extent on the top and bottom surfaces of the “micro light-emitting devices 120”).
Regarding claim 13, Tu, modified by Wu, teaches the micro light emitting diode of claim 11, comprising at least one of the diameter, the largest width, or the largest dimension being: 5 microns or less, 1 micron or less, or 0.5 microns or less (“the maximum width of the vertical type micro LEDs may be 1 μm-100 μm” para. 0033 FIG. 1B).
Regarding claim 14, Tu, modified by Wu, teaches the micro LED of claim 11. Tu further teaches
wherein the micro LED comprises III-nitride (“LED die 15” includes “P-type gallium nitrogen layer 157” and “N-type gallium nitrogen layer 153”, para, 0013).
Regarding claim 15, Tu, modified by Wu, teach the micro LED of claim 14, further comprising metallization in the hole forming an ohmic contact with the epitaxial structure (“transparent electrically conducting layer 17” is made of indium tin oxide, a known ohmic contact as evidenced in para. 0051 of Lin et al. US 20170323873 A1 and col 5 lines 27-31 of Chang et al. US 6583443 B1).
Regarding claim 16, Tu, modified by Wu, teach the micro LED of claim 11, wherein: the epitaxial structure comprises an n-type layer (“P-type gallium nitrogen layer 157” para. 0013), a p-type layer (“N-type gallium nitrogen layer 153” para. 0013), and an active region between the n-type layer and the p-type layer (“active layer 154” para. 0013), a first contact in the hole forms an ohmic contact with the n-type layer or the p-type layer (“transparent electrically conducting layer 17” is formed in contact with “P-type gallium nitrogen layer 157” via “through hole 161” and is made of indium tin oxide, para. 0016-0017), and the active region emits electromagnetic radiation in response an electric field across the n-type layer and the p-type layer, the electric field formed by a potential difference between the first contact and a second contact to the micro light emitting diode (the examiner understands that “active layer 154” emits light when a sufficient voltage difference is produced between “transparent electrically conducting layer 17” above and “electrically conductive layer 18” below and a current flows, as evidenced in Seong et al. US 20180026162 A1 para. 0003 and Tanaka et al. US 20030232455 A1 para. 0054. This is a basic operation of an LED.).
Regarding claim 20, Tu, modified by Wu, teaches an array of the micro light emitting diodes (“a plurality of micro light-emitting devices 120” in a patterned arrangement as seen in FIG. 1A, para. 0031).
Regarding claim 21, Tu, modified by Wu, teaches a display (“display apparatus 100a” para. 0031 FIG. 1A) comprising the array of claim 20 (“a plurality of micro light-emitting devices 120” in a patterned arrangement as seen in FIG. 1A, para. 0031), wherein the array comprises pixels each comprising at least one of the micro light emitting diodes (At least three of the micro light-emitting devices 120 are disposed in each of the pixel regions 112”, para. 0031 FIG. 1A).
Regarding claim 27, Tu, modified by Wu, teaches the microLED of claim11. Tu further teaches
wherein the epitaxial structure comprises or consists essentially of a semiconductor including comprising a III-nitride material or a III-V material (“LED die 15” includes “P-type gallium nitrogen layer 157” and “N-type gallium nitrogen layer 153”, para, 0013).
Regarding claim 28, Tu, modified by Wu, teaches the microLED of claim11. Tu further teaches
wherein the mesa includes sidewalls (“GaN-based semiconductor laminate 40”, para. 0051, has sidewalls, as seen in FIG. 2) and at least one of a dielectric or passivation on the sidewalls (“insulating layer 61”, para. 0051, is also formed along the sidewalls of the “GaN-based semiconductor laminate 40”, as seen in FIG. 2. As modified, “passivation layer 170” from Bour is formed on the sidewalls.).
Regarding claim 34, Tu, modified by Wu, teaches the microLED of claim 11, wherein the top surface includes the ohmic contact layer comprising an indium tin oxide layer through which the light from the microLED is emitted (“transparent electrically conducting layer 17” is made of indium tin oxide, para. 0017).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Tu, in view of Wu, in view of Tanaka et al. US 20030232455 A1 (hereinafter referred to as Tanaka).
Tu, modified by Wu, teaches the micro light emitting diode of claim 11. Tu, modified by Wu, fails to expressly teach wherein the light emitting diode is plasma damage free.
Nevertheless, Tanaka teaches that a “GaN-based semiconductor laminate 40” can be made by selective epitaxial growth as an alternative to epitaxially growing across a large surface and then removing portions by etching (para. 0059). Tu is silent with respect to the processes of forming the semiconductor layers and Wu is silent to the type of epitaxial growth process. “Selective-area growth (SAG), which is also called selective growth (SG), selective epitaxy (SE), selective-area epitaxial growth (SAEG), and selective epitaxial growth (SEG), involves epitaxial growth of materials on nonmasked (window) regions” as defined in Ryou and Lee (see page 60, “3.4.1. Selective area growth and epitaxial lateral overgrowth of GaN” in Nitride Semiconductor Light-Emitting Diodes, by Jae-Hyun Ryou, Wonseok Lee. Plasma is a known etchant, as evidenced in para. 0116 in Okagawa et al. US 20080135868 A1, and the selective epitaxial growth in Tanaka would not require the use of an etchant as plasma. Furthermore, even though “mouth 61a” may be made by etching, there is no indication of plasma being used as an etchant. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that plasma damage can be avoided by doing a selective epitaxial growth process as done in Tanaka for “semiconductor laminate 40”.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the light emitting diode taught between Tu and Wu is plasma damage free when formed with a selective epitaxial growth process as taught in Tanaka.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Tu, modified by Wu, as applied to claim 11 above, and further in view of Muramoto US 20200098832 A1 (hereinafter referred to as Muramoto).
Tu, modified by Wu, teaches the microLED of claim 11. Tu further teaches
the micro light emitting diode emits electromagnetic radiation in response to a bias applied between a first contact to the epitaxial structure (“first section 141” is connected to “LED die 15” through “transparent electrically conductive layer 18” on top, para. 0018) in the hole and a second contact to the epitaxial structure (“second section 142” is connected to “LED die 15” through “electrically conductive layer 18” on the bottom, para. 0014. The examiner understands that “active layer 154” emits light when a sufficient voltage difference is produced between “transparent electrically conducting layer 17” above and “electrically conductive layer 18” below and a current flows.), and
the first contact is electrically connected to an n-type layer in the epitaxial structure and the second contact is electrically connected to a p-type layer in the epitaxial layer, or the first contact is electrically connected to the p-type layer (“first section 141” is connected to “P-type gallium nitrogen layer 157” through “transparent electrically conductive layer 18” on top, para. 0018) and the second contact is electrically connected to a n-type layer (“second section 142” is connected to “N-type gallium nitrogen layer 153” through “electrically conductive layer 18” on the bottom, para. 0014).
However, Tu, modified by Wu, fail to teach wherein: the micro light emitting diode emits electromagnetic radiation for a current density of at least 100 amps per centimeter square in response to a bias of at least 2.5 volts.
Nevertheless, Muramoto teaches a “UV-LED chip” (para. 0037 FIG. 2) described as having “microchip sizes” (para. 0083) that emits electromagnetic at a wavelength of 385 nm (para. 0037). The “UV-LED chip” is operated with a forward voltage of 3.4-3.5V and a current of 25.5 A/cm2 for different chip sizes (para. 0088 FIG. 13). The luminous intensity of the chip increases for increased current density and current densities as high as 357.1 A/cm2 are measured, as seen in FIG. 9. It is further evidenced in Valentine that “The amount of light emitted by the mLED increases as the amount of current supplied to the mLED increases” and “In some implementations, mLEDs are driven using a voltage controlled current source which generates a driving current that increases with the increase in the voltage level of a voltage signal” (Valentine para. 0003). One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the microLED taught between Tu and Wu can have increased luminous intensity when operated at an elevated current density, the current density depending on the amount of forward voltage.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the microLED taught between Tu and Wu with the current density and bias voltage taught between Muramoto and Valentine. The microLED will emit a greater amount of light when operated at a higher current density and the current density increases as the voltage bias increases.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Tu, modified by Wu and Muramoto as applied to claim 23 above, and further in view of Yonkee et al., US 20190207043 A1 (hereinafter referred to as Yonkee).
Tu, modified by Wu and Muramoto, teaches the microLED of claim 23 but fails to teach wherein the first contact or the second contact are connected to the p-type layer via an n-type region in a tunnel junction.
Nevertheless, Yonkee teaches
wherein the first contact (“n-contact metallization 1218” on “n-type material 1214c” para. 0156 and 0158 FIG. 12(a)) or the second contact (“n-contact metallization 1220” on “n-type III-nitride layer 1202” para. 0156 and 0151 FIG. 12(a)) are connected to the p-type layer (“p-type III-nitride layer 1208” para 0153 FIG. 12(a)) via an n-type region in a tunnel junction (“first n.sup.+-GaN/III-nitride layer 602, 1214a closest to the p-type III-nitride layer 1208, 618 can form the tunnel junction 1216” para. 0156 FIG. 12(a)).
Tu, modified by Wu and Muramoto, and Yonkee, teach microLED devices. Yonkee teaches the formation of a “tunnel junction 1216” over a “p-type III-nitride layer 1208”. Yonkee teaches that “A low resistance tunnel junction on top of p-GaN would allow for current spreading in n-type GaN (n-GaN) on both sides of the device, as well as the use of low resistance n-type contacts on both sides of the device” (para. 0018). One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the tunnel junction allows for the current to more evenly spread on both sides of the microLED device.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the microLED device taught between Tu, Wu and Muramoto with the tunnel junction as taught in Yonkee. The tunnel junction is useful for current spreading on the p-type side of the microLED device.
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Tu, Wu, and Muramoto as applied to claim 23 above, further in view of Ogihara et al. US 8174028 B2 A1 (hereinafter referred to as Ogihara).
Tu, modified by Wu and Muramoto, teaches the microLED of claim 23 but fail to teach wherein at least one of the first contact and the second contact comprise a metal layer.
Nevertheless, Ogihara teaches
wherein at least one of the first contact and the second contact comprise a metal layer (“Thin metal wires 31” are metal, col 9 line 48, and “common electrode contact 33” is a metal contact, col 5 line 54 FIG. 5).
Tu, modified by Wu and Muramoto, and Ogihara teach LED mesa structures using transparent ohmic contacts. Tu is silent with respect to the materials of “first and second electrode portions 141 and 142”. A “electrode contact 30” and “common electrode contact 33” are metals that electrically contact opposite sides of the LED for operation of the device, analogous to the “first and second electrode portions 141 and 142” in Tu. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that metals are suitable materials for use as electrical contacts in LED packages.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the microLED taught between Tu, Wu, and Muramoto with the metal contacts taught in Ogihara. Metals are known materials used as first and second contacts in an LED package.
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Tu US 20120175630 A1 (hereinafter referred to as Tu), in view of Wu et al., US 20190115333 A1 (hereinafter referred to as Wu), in view of Bour et al. US 20160197232 A1 (hereinafter referred to as Bour), and further in view of Lin et al., US 20120228655 A1 (hereinafter referred to as Lin).
Claim 29 is a product-by-process claim. A product-by-process claim is a product claim. Applicant has merely chosen to define the claimed product by the process by which it was made. It has been well established that process limitations do not impart patentability to an old/obvious product. Process limitations are significant only to the extent that they distinguish the claimed product over the prior art product. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir.1985). In this case, the claimed “micro light emitting diode, comprising: a mesa comprising an epitaxial structure and having at least one of: a top surface with an area of 10 micrometers squared or less, or at least one of a diameter, a largest width, or a largest dimension of 10 micrometers or less; a dielectric on the top surface; and a hole in the dielectric that is centered or self aligned on the top surface; the epitaxial structure including an n-type layer, a p-type layer, and an active region between the n-type layer and the p-type layer, sidewalls of the mesa are free of dangling bonds and defects, an ALD layer on the sidewalls of the mesa, an ohmic contact layer through which light from the microLED is emitted” need not be formed by the process of “(b) depositing a first hardmask layer comprising a first material on the epitaxial structure;(c) depositing a second hardmask layer comprising a second material on the first hardmask layer, wherein the first hardmask layer and the second hardmask layer are at least partially resistant to a wet chemical solution used in step(e);(d) patterning the first hardmask layer, the second hardmask layer, and the epitaxial structure using lithography so as to form the mesa comprising the epitaxial structure, wherein the patterning includes selectively etching the first hardmask layer over the second hardmask layer so as to form an undercut structure comprising the second hardmask layer extending laterally beyond the edges of the underlying patterned first hardmask layer;(e) performing one or more sidewall treatments so as to remove impurities, defects and passivate dangling bonds from sidewalls of the mesa, wherein the sidewall treatments include a dip of the sidewalls in the wet chemical solution;(g) depositing the dielectric layer on the ALD layer using a directional deposition method so that a discontinuity in the dielectric layer is formed, the discontinuity exposing the ALD layer surrounding the first hardmask layer;(h) removing the ALD layer surrounding the first hardmask layer and exposed by the discontinuity, using an etching technique; and etching the first hardmask layer, thereby removing the first hardmask layer and all of the layers above the first hardmask layer, leaving the hole in the dielectric layer on top of the mesa having a location and a first area defined by the position and second surface area of patterned hardmask layer prior to removal of patterned first hardmask layer, so that the hole exposes the top surface of the epitaxial structure in the mesa.”. Once the Examiner provides a rationale tending to show that the claimed product appears to be the same or similar to that of the prior art, although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product. In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir.1983).
Tu teaches
A micro light emitting diode (“LED 10” para. 0009 FIG. 1), comprising:
a mesa (“LED die 15” para. 0011)
a dielectric (“electrically insulating layer 16” para. 0015) on the top surface; and
a hole in the dielectric that is centered or self aligned on the top surface (“through hole 161 defined above a central portion of a top of the P-type gallium nitrogen layer 157” of “LED die 15”, para. 00152),
the mesa comprises an n-type layer (“P-type gallium nitrogen layer 157” para. 0013), a p-type layer (“N-type gallium nitrogen layer 153” para. 0013), and an active region between the n-type layer and the p-type layer (“active layer 154” para. 0013),
an ohmic contact layer on the top surface through which light from the microLED is emitted (“transparent electrically conducting layer 17” is made of indium tin oxide, para. 0017, a known ohmic contact as evidenced in para. 0051 of Lin et al. US 20170323873 A1 and col 5 lines 27-31 of Chang et al. US 6583443 B1).
However, Tu fails to teach the mesa comprising an epitaxial structure, the micro light emitting diode having at least one of: a top surface with an area of 10 micrometers squared or less, or at least one of a diameter, a largest width, or a largest dimension of 10 micrometers or less, the epitaxial structure including an n-type layer, a p-type layer, and an active region between the n-type layer and the p-type layer, sidewalls of the mesa are free of dangling bonds and defects, an ALD layer on the sidewalls of the mesa.
the mesa comprising an epitaxial structure (the mesa is “epitaxial structure 122” of “micro light-emitting devices 120”, para. 0031 FIG. 1B)
the mesa having at least one of: a top surface with an area of 10 micrometers squared or less, or at least one of a diameter, a largest width, or a largest dimension of 10 micrometers or less (“the maximum width of the vertical type micro LEDs may be 1 μm-100 μm” para. 0033 FIG. 1B),
Tu and Wu teach light emitting devices. Tu teaches an “N-type gallium nitrogen layer 153” and a P-type gallium nitrogen layer 157” sandwiching an “active layer 154” but they are not described as epitaxial. Wu teaches micro LEDs comprising an “epitaxial structure 122” (para. 0031). Epitaxial growth is a common technique used to form group III-nitride semiconductor LEDs as shown in Hwang et al. US 20170236807 A1 para. 0030-0042, Chae et al. US 20140361327 A1 para. 0006, and Lo et al. US 20190051792 A1 para. 0031-0033. The “epitaxial structure 122” in Wu has a maximum width as low as 1-2μm for use in a micro LED display device such as “display apparatus 100a” in FIG. 1. The examiner understands that by making light-emitting diodes smaller they can be more densely packed in a given surface area to offer greater image resolution. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that micro light emitting diodes allow for higher resolution displays than larger LEDs in a same surface area.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the light emitting device taught in Tu with the epitaxially formed mesas having a maximum width as taught in Wu. Epitaxial growth is a well-known process for forming group-III nitride semiconductor layers. By making the LED a micro light emitting diode, a display of higher resolution is obtained.
However, Tu, modified by Wu, fails to teach sidewalls of the mesa are free of dangling bonds and defects, an ALD layer formed over sidewalls of the mesa.
Nevertheless, Bour teaches a “sidewall passivation layer 170” formed over a “mesa structure 120” made of GaN that forms a “LED 150” (para. 0070 and 0116-0117 FIG. 17A- 17F). In LEDs, efficiency degradation may occur due to non-radiative recombination at the LED sidewalls when the sidewalls have unsatisfied bonds, chemical contamination, and structural damage (para. 0051). Passivation of the sidewall surface of the LED mesas reduces the amount of non-radiative recombination near the exterior or side surfaces of the active layer, such that efficiency of the LED device increased (para. 0052). One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that passivation of the sidewalls of the “semiconductor laminate 40” in Tu with the “sidewalls passivation layer 170” can prevent non-radiative recombination around the sidewalls and improve device efficiency.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the micro light emitting device taught between Tu and Wu with the passivated mesa sidewall from Bour. Passivated sidewalls are free of dangling bonds and defects and improve the emission efficiency of the device.
Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over Tu US 20030232455 A1 (hereinafter referred to as Tu), in view of Wu et al., US 20190115333 A1 (hereinafter referred to as Wu).
Claim 30 is a product-by-process claim. A product-by-process claim is a product claim. Applicant has merely chosen to define the claimed product by the process by which it was made. It has been well established that process limitations do not impart patentability to an old/obvious product. Process limitations are significant only to the extent that they distinguish the claimed product over the prior art product. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir.1985). In this case, the claimed “a mesa comprising an epitaxial structure, the mesa comprising a top surface comprising an area of 10 micrometers squared or less; a dielectric on the top surface; and a hole in the dielectric centered on the top surface, an ohmic contact layer through which light from the microLED is emitted” need not be formed by the process of “a location and a first area of the hole are defined by and aligned to a position and area of a patterned hardmask layer, prior to removal of the patterned hardmask layer to leave the hole exposing a surface of the epitaxial structure in the mesa.”. Once the Examiner provides a rationale tending to show that the claimed product appears to be the same or similar to that of the prior art, although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product. In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir.1983).
Tu teaches
A microLED (“semiconductor light-emitting element 10” para. 0048 FIG. 1A and 2), comprising:
a mesa (“GaN-based semiconductor laminate 40” forms a mesa structure over the “light guide 30” and “monocrystal silicon substrate 20” as seen in FIG. 2, para.0048, 0050, and 0053) comprising an epitaxial structure (“GaN-based semiconductor laminate 40” is comprised of “N-type semiconductor layer 41”, “activation layer 42”, and “P-type semiconductor layer 43” that are epitaxially grown, para. 0050 FIG. 2), the mesa comprising a top surface (top surface of “P-type semiconductor layer 43”);
a dielectric (“insulating layer 61” para. 0051 FIG. 2) on the top surface; and
a hole in the dielectric centered on the top surface (“The insulating layer covers the uppermost layer of the GaN-based semiconductor laminate 40 other than a predetermined center region”, the predetermined region being the “mouth 61a”, para. 0051, as seen in FIG. 2),
the top surface includes an ohmic contact layer through which light from the microLED is emitted (“transparent electrically conducting layer 17” is made of indium tin oxide, para. 0017, a known ohmic contact as evidenced in para. 0051 of Lin et al. US 20170323873 A1 and col 5 lines 27-31 of Chang et al. US 6583443 B1).
However, Tu fails to teach the mesa comprising a top surface comprising an area of 10 micrometers squared or less, wherein sidewalls of the mesa are free of dangling bonds and defects.
Nevertheless, Wu teaches
the top surface comprising an area of 10 micrometers squared or less (“the maximum width of the vertical type micro LEDs may be 1 μm-100 μm” para. 0033 FIG. 1B).
Tu and Wu teach light emitting devices. Wu teaches micro LEDs comprising an “epitaxial structure 122” (para. 0031) with a maximum width as low as 1μm or use in a micro LED display device. The examiner understands that by making light-emitting diodes smaller they can be more densely packed in a given surface area to offer greater image resolution. One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that micro light emitting diodes allow for higher resolution displays than larger LEDs in a same surface area.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the light emitting device taught in Tu with the maximum width taught in Wu. By making the LED a micro light emitting diode, a display of higher resolution is obtained.
Prior art not cited but relevant to applicant’s disclosure
Kim et al. US 20190165207 A1: a microLED stack with an opening in a conductive layer over the microLED stack.
Yang et al. US 20170309678 A1: a microLED having an insulating layer on top with an opening.
Conclusion
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/ERIC MANUEL MULERO FLORES/Examiner, Art Unit 2898
/JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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