Prosecution Insights
Last updated: April 19, 2026
Application No. 17/773,314

DISPLAY PANEL, MANUFACTURE METHOD THEREFOR, AND DISPLAY DEVICE

Final Rejection §103
Filed
Apr 29, 2022
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
4 (Final)
60%
Grant Probability
Moderate
5-6
OA Rounds
3y 11m
To Grant
81%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
417 granted / 693 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
67 currently pending
Career history
760
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
52.6%
+12.6% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
29.5%
-10.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 693 resolved cases

Office Action

§103
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA DETAILED ACTION Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 7-8, 10 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Song et. (8,344,619) in view of Liu et al. (CN 106373988, provided as IDS on 10/28/2022).Regarding claim 1, Song et al. teach in figure 2 and related text a display device comprising: a display panel comprising: a base substrate 102 comprising a display area; first sub-pixels 111R, second sub-pixels 111G and third sub-pixels 111B disposed in the display area; and a separating insulated layer 132 (or 728, see figure 12) disposed at a side of the base substrate, an orthographic projection of the separating insulated layer on the base substrate at least covering the display area, the second sub-pixels 111G and third sub-pixels 111B are above the base substrate 102, the separating insulated layer is above the second sub-pixels and third sub-pixels, distances between the first sub-pixels 111R and the base substrate 102 are larger than distances between the second sub-pixels 111G and the base substrate 102, distances between the first sub-pixels 111R and the base substrate 102 are larger than distances between the third sub-pixels 111B and the base substrate, wherein two of the first sub-pixels 111R are spaced apart from each other by one of the second sub-pixels 111G or one of the third sub-pixels 111B, and an orthographic projection of the first sub-pixel 111R on the base substrate is between an orthographic projection of the second sub-pixel 111G on the base substrate and an orthographic projection of the third sub-pixel 111B on the base substrate. Song et al. do not teach in the embodiment of figure 2 that and a peripheral area is surrounding the display area, that the first sub-pixels are above the separating insulated layer, and the first sub-pixels the second sub-pixels are separated by the separating insulated layer and the first sub-pixels and the third sub-pixels are separated by the separating insulated layer. Song et al. teach in figure 12 and related text that the first sub-pixels 733 are above the separating insulated layer728, and the first sub-pixels the second sub-pixels are separated by the separating insulated layer 728 (since the first sub-pixels the second sub-pixels are adjacent to each other) and the first sub-pixels and the third sub-pixels are separated by the separating insulated layer 728 (since first sub-pixels and the third sub-pixels are adjacent to each other). In the alternative, Liu et al. teach in figure 3 and related text that the first sub-pixels 400 are above the separating insulated layer 200, and the first sub-pixels 400 the second sub-pixels 300 are separated by the separating insulated layer 200 and the first sub-pixels 400 and the third sub-pixels 50 are separated by the separating insulated layer 200. Liu et al. and Song et al. are analogous art because they are directed to display devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Liu et al. because they are from the same field of endeavor. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a peripheral area is surrounding the display area, and wherein the first sub-pixels are above the separating insulated layer, and the first sub-pixels the second sub-pixels are separated by the separating insulated layer and the first sub-pixels and the third sub-pixels are separated by the separating insulated layer, as taught by the embodiment of figure 12 of Song et al., in Song et al.’s device, in order to provide better protection to the device, since it is well-known in the art to form a peripheral area surrounding the display area, and in order to provide better protection to the device from the external environments, respectively.In the alternative, it would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a peripheral area is surrounding the display area, and wherein the first sub-pixels are above the separating insulated layer, and the first sub-pixels the second sub-pixels are separated by the separating insulated layer and the first sub-pixels and the third sub-pixels are separated by the separating insulated layer, as taught by Liu et al., in Song et al.’s device, in order to provide better protection to the device, since it is well-known in the art to form a peripheral area surrounding the display area, and in order to provide better protection to the device from the external environments, respectively. Regarding the illustration of layer 200 in Liu et al., this illustration does not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. The formation of plurality of identical layers does not produce a structure which is different from a structure which is formed by forming only one layer. Regarding claim 2, Song et al. teach in figure 2 and related text that the first sub-pixel comprises a first anode 131, a first light emitting layer 111R and a first cathode 134 stacked at the side of the separating insulated layer 132 away from the base substrate. Regarding claim 3, Song et al. teach in none illustrated figure and related text that the second sub- pixel comprises a second anode, a second light emitting layer and a second cathode stacked between the base substrate and the separating insulated layer; and the third sub-pixel comprises a third anode, a third light emitting layer and a third cathode stacked between the base substrate and the separating insulated layer. Regarding claim 4, Song et al. appears to teach in figure 2 and related text that the second anode and the third anode are disposed in the same layer, and the second cathode and the third cathode are disposed in the same layer. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the second anode and the third anode are disposed in the same layer, and the second cathode and the third cathode are disposed in the same layer in prior art’s device in order to simplify the processing steps of making the device. Regarding claim 7, Song et al. teach in figure 2 and related text that an orthographic projection of the second sub-pixel 111G on the base substrate and an orthographic projection of the third sub-pixel 111B on the base substrate are not overlapped with each other. Regarding claim 8, it would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the first sub-pixels blue sub-pixels, the second sub-pixels green sub-pixels, and the third sub-pixels red sub-pixels, in prior art’s device in order to operate the device in its intended use by adapting the device to the requirements of the application at hand. Regarding claim 10, Song et al. do not teach in figure 2 and related text that the display panel further comprises an encapsulation layer at a side of the first sub-pixels away from the base substrate, wherein an orthographic projection of the encapsulation layer on the base substrate at least covers the display area. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form an encapsulation layer at a side of the first sub-pixels away from the base substrate, wherein an orthographic projection of the encapsulation layer on the base substrate at least covers the display area in prior art’s device in order to provide better protection to the device. Regarding claim 13, Song et al. teach in figure 2 and related text a display device comprising the display panel according to claim 1. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Song et. (8,344,619) and Liu et al. (CN 106373988, provided as IDS on 10/28/2022), as applied to claim 1 above, and further in view of Takaei (2012/0305952).Regarding claim 9, Song et al. and Liu et al. teach in figure 3 and related text substantially the entire claimed structure, as applied to claim 1 above, except explicitly stating having a buffer layer on the base substrate, a thin film transistor layer at a side of the buffer layer away from the base substrate; a passivation layer at a side of the thin film transistor layer away from the base substrate, but do not teach a planarization layer at a side of the passivation layer away from the base substrate and between the base substrate and the second and third sub-pixels, wherein the first sub-pixels, the second sub-pixels and the third sub-pixels are electrically connected to the thin film transistor layer via through holes penetrating the passivation layer and the planarization layer. Takaei teaches in figure 7 and related text a thin film transistor layer 53 at a side of the substrate away from the base substrate; a passivation layer 54 at a side of the thin film transistor layer away from the base substrate; and a planarization layer 55 at a side of the passivation layer away from the base substrate and between the base substrate and the second and third sub-pixels, wherein the first sub-pixels, the second sub-pixels and the third sub-pixels are electrically connected to the thin film transistor layer via through holes 57 penetrating the passivation layer and the planarization layer. Song et al. Liu et al. and Takaei are analogous art because they are directed to display devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Song et al. because they are from the same field of endeavor. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a thin film transistor layer at a side of the buffer layer away from the base substrate; a passivation layer at a side of the thin film transistor layer away from the base substrate, but do not teach a planarization layer at a side of the passivation layer away from the base substrate and between the base substrate and the second and third sub-pixels, wherein the first sub-pixels, the second sub-pixels and the third sub-pixels are electrically connected to the thin film transistor layer via through holes penetrating the passivation layer and the planarization layer, as taught by Takaei, in prior art’s device, in order to operate the device in its intended use. Response to Arguments Applicant’s arguments with respect to the claim(s) have been considered but are moot because of the new ground of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). O.N. /ORI NADAV/ 2/11/2026 PRIMARY EXAMINER TECHNOLOGY CENTER 2800
Read full office action

Prosecution Timeline

Apr 29, 2022
Application Filed
Jan 14, 2025
Response after Non-Final Action
Apr 03, 2025
Non-Final Rejection — §103
Jul 03, 2025
Response Filed
Jul 09, 2025
Final Rejection — §103
Sep 10, 2025
Response after Non-Final Action
Oct 10, 2025
Request for Continued Examination
Oct 20, 2025
Response after Non-Final Action
Oct 28, 2025
Non-Final Rejection — §103
Jan 30, 2026
Response Filed
Feb 11, 2026
Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
60%
Grant Probability
81%
With Interview (+20.6%)
3y 11m
Median Time to Grant
High
PTA Risk
Based on 693 resolved cases by this examiner. Grant probability derived from career allow rate.

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