Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 04/23/26 have been fully considered but they are not persuasive.
Applicant’s arguments, Riou and Sasaki do not teach or suggest "wherein the sides of each electrical power component of at least a subset including more than one of the electrical power components are not orthogonal to a line that: passes through a geometric centre of the electrical power component of the subset, extends orthogonal to a side of the substrate, and lies in the plane of the substrate on which the electrical power components are arranged," as recited in independent claim 1.
The Examiner has considered the Applicant’s arguments, but respectfully disagrees for the following reasons;
The Examiner directs the Applicant to the previously cited areas of the Non-Final Action issued on 12/29/25, where it has be shown that Sasaki shows, a power module (fig. #1, item 100) (paragraph 0023, 0102) wherein the sides of each power component of (fig. #1, item 1a; chip) (paragraph 0105) of at least a subset of the electrical power components (fig. #8C, item OA) are not orthogonal (As shown below; fig. #Ex1, item DC1) (paragraph 0112) to a line (As shown below; fig. #Ex1, item X1).
In an attempt to further clarify the teachings of Sasaki, the Examiner directs the Applicant to the following locations;
Sasaki, paragraph (0125, fig. #10A), where it is shown that the different areas (SoAd, SOAa, Oad, Oad, OAb, etc.) poses different Chips (1a, 1b) that preside in the different areas. As can be seen in fig. #7, the foundation for the existing chips (fig. #7, item 5a) indeed houses the power chips (fig. #7, item1a, 1b) (also shown in fig. #1, item 1a, 1b; paragraph 0023).
Thus, it can be clearly seen that the foundation as shown in fig. #8A, with parallel sides surfaces (4sk and 1sj, paragraph 0030) (which are parallel to the ‘X’ axis), which are orthogonal to the parallel sided (1sb and 1sa, paragraph 0029), which houses Sasaki’s claimed power chips (fig. #8C, item 1a and 1b).
Furthermore, the Examiner takes the position that it would be understood by one of ordinary skill in the art, at the time of conception or possession of the presently claimed invention, to view both the teachings and drawings of Sasaki, and perceive that said claimed chips (as shown in fig. 8B-D) do not run perpendicular (orthogonal) to the ‘X’ or ‘Y’ axis.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim #1-6, 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over RIOU (U.S. Pub. No, 2020/0336078), hereinafter referred to as "Riou" and in view of Sasaki et al., (U.S. Pat. No. 2018/0308833), hereinafter referred to as "Sasaki".
Riou shows, with respect to claim #1, a power module (fig. #2, item 1) comprising a plurality of rectangular and or square electrical power components (fig. #1, item 2) (paragraph 0039) arranged on a substrate (fig, #5, item 44; fig. #2, item X) (paragraph 0009, 0040-0042, 0085) of the electrical power components of the subset and extends orthogonal to a side of the substrate (paragraph 0085).
Rior substantially shows the claimed invention as shown in the rejection of claim #1 above.
The Examiner notes that Riou does not explicitly state wherein the sides each electrical power component of at least a subset of the electrical power components are not orthogonal to a line that passes through the geometric center of the electrical power components of the subset. However, Riou shows (paragraph 0051-0052) the angles between the metal portions are determined at the time the electrical power module is fabricated and that these angles serve to optimize integration of the electrical power module in a housing or in any environment. In particular, the accesses to the inputs and to the outputs of the electrical power module, and specifically the accesses to the input connectors and to the output connectors situated on the metal portions of the supports, may be at angles that are freely chosen in three dimensions.
Sasaki teaches, in a similar device wherein power units are mounted, with respect to claim #1, a power module (fig. #1, item 100) (paragraph 0023, 0102) wherein the sides (Below; fig. #Ex1, item 1sb, 1si, 1sa and 1sj) of each power component of (fig. #1, item 1a; chip) (paragraph 0105) of at least a subset including more than one (fig. #1, item 1a and 1b) (paragraph 0022-0023) of the electrical power components (fig. #8C, item OA) are not orthogonal to a line (Below; fig. #Ex1, item X2, Y2) that passes through a geometric center of the electrical power components of the subset (bonding plate boarders, Below; fig. #Ex1, item NOAa, NOAb, NOAc, NOAd) (paragraph 0030, 0032) (paragraph 0102, 0115, 0117).
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The Examiner notes that the applicant has not established the critical nature wherein the sides of at least a subset of the electrical power components are not orthogonal to a line that passes through the geometric center. “The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims. In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.” In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir.1990). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests inside and outside the claimed range to show criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197(CCPA 1960). Furthermore, it would have been obvious to try the particular claimed dimensions, because a change in dimension would have been a known option within the technical grasp of a person of ordinary skill in the art and, "a person of ordinary skill in the art has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success; it is likely the product not of innovation but of ordinary skill and common sense." KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (U.S. 2007). See also, Pfizer Inc. v. Apotex Inc., 82 USPQ2d 1852 (Fed. Cir. 2007). It would have been obvious to vary the ranges, to one having ordinary skill in the art at the time the invention was made, with respect to claim #1, to modified the invention of Riou as modified by the invention of Sasaki, which teaches, a power module wherein the sides of each power component of at least a subset of the electrical power components are not orthogonal to a line that passes through a geometric center of the electrical power components of the subset, to incorporate a structural condition that can provided a uniform intensity distribution in the horizontal and vertical direction and to provide maximation of space and lower the possibility to deformation, as taught by Sasaki.
Riou fails to explicitly state, with respect to claim #2, a power module wherein for all the electrical power components none of the sides of the electrical power component are orthogonal to the line passing through the geometric center of the electrical power component and extending orthogonal to a side of the substrate.
Sasaki shows, with respect to claim #2, a power module wherein for all the electrical power components (fig. #8C, item OA) none of the sides (Above; fig. #Ex1, item 1sb, 1si, 1sa and 1sj) of the electrical power component are orthogonal to the line passing through the geometric center (fig. #8C, item OA) (Above; fig. #Ex1, item X2 and Y2) of the electrical power component and extending orthogonal to a side (Above; fig. #Ex1, item NOAa, NOAb, NOAc, NOAd) of the substrate (paragraph 0023, 0102, 0113-0114).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #2, to modified the invention of Riou as modified by the invention of Sasaki, which teaches, a power module wherein for all the electrical power components none of the sides of the electrical power component are orthogonal to the line passing through the geometric center of the electrical power component and extending orthogonal to a side of the substrate, to incorporate a structural condition that can provided a uniform intensity distribution in the horizontal and vertical direction and to provide maximation of space and lower the possibility to deformation, as taught by Sasaki.
Riou shows, with respect to claim #3, a power module wherein at least some of the electrical power (fig. #1, item 2) components are square (paragraph 0039).
Riou shows, with respect to claim #4, a power module wherein all the electrical power (fig. #1, item 2) components are square (paragraph 0039).
Riou shows, with respect to claim #5, a power module wherein an angle between one or more of the electrical power components and a first side of the substrate is within the range 30-60 (paragraph 0043-0044, 0052).
Riou shows, with respect to claim #6, a power module wherein the angle between one or more of the electrical power components and the first side of the substrate is 45 (paragraph 0043-0044, 0052).
Riou shows, with respect to claim #12, a power module wherein all electrical power components (fig. #2, item 21a-f, 22a-f) have a side extending parallel to a side of each of the remaining electrical power components (paragraph 0030-0032).
Riou shows, with respect to claim #13, a power module wherein the subset of the electrical power components are power semiconductors (paragraph 0002, 0004, 0005, 0007).
Riou shows, with respect to claim #14, a power module wherein the subset of the electrical power components are IGBTs and/or MOSFETs (paragraph 0004).
Riou substantially shows the claimed invention as shown in the rejection of claim #1 above.
Riou fails to show, with respect to claim #15, a power module wherein the substrate has two parallel first sides.
Riou shows, with respect to claim #15, a power module wherein the substrate (fig. #7, item 3) has two parallel first sides (paragraph 0062).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #15, to modified the invention of Riou as modified by the invention of Sasaki, which teaches, a power module wherein the substrate has two parallel first sides, to incorporate a structural condition that provides maximation of space and is less prone to deformation, as taught by Sasaki.
Riou shows, with respect to claim #16, a power module wherein the substrate (fig. #7, item 3) has two parallel first sides and two parallel second sides (paragraph 0062).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #16, to modified the invention of Riou as modified by the invention of Sasaki, which teaches, a power module wherein the substrate has two parallel first sides and two parallel second sides, to incorporate a structural condition that provides maximation of space and is less prone to deformation, as taught by Sasaki.
//
Claim(s) #7-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over RIOU (U.S. Pub. No, 2020/0336078), hereinafter referred to as "Riou" as modified b Sasaki et al., (U.S. Pat. No. 2018/0308833), hereinafter referred to as "Sasaki", as shown in the rejection of claim #1 above and in further view of Song et al., (U.S. Pub. No. 2019/0333702), hereinafter referred to as "Song".
Riou as modified by Sasaki, substantially shows the claimed invention as shown in the rejection of claim #1 above.
Riou as modified by Sasaki, fails to show, with respect to claim #7, a method wherein at least a subset of the electrical power components are arranged in groups of two or more electrical power components arranged side by side and being spaced apart less than 2 mm from each other.
Song teaches, with respect to claim #7, a power module wherein at least a subset of the electrical power components are arranged in groups of two or more electrical power components (fig. #2, item 210 and 225) arranged side by side and being spaced apart less than 2 mm from each other (paragraph 0035-0036).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #7, to modified the invention of Riou as modified by Sasaki, with the invention of Song, which teaches a power module wherein at least a subset of the electrical power components are arranged in groups of two or more electrical power components arranged side by side and being spaced apart less than 2 mm from each other, to incorporate a structural condition that provides a required inductance value or a desired electromagnetic interference (EMI) noise value, as taught by Song.
Riou shows, with respect to claim #8, a power module wherein at least some of the groups (fig. #2, item 21a-f, 22a-f) are arranged in rectangular group areas comprising two or more electrical power components (paragraph 0030).
Riou shows, with respect claim #9, a power module wherein the rectangular group areas (fig. #2, item 21a-f, 22a-f) are arranged along parallel lines (paragraph 0030-0032).
Riou shows, with respect to claim #10, a power module wherein some of the electrical power components (fig. #2, item 21a-f, 22a-f) are offset along a direction perpendicular to the lines (paragraph 0030-0032).
Riou shows, with respect to claim #11, a power module wherein the adjacent electrical power components (fig. #2, item 21a-f, 22a-f) of the groups are offset: in a first direction extending parallel to the lines and in a second direction extending perpendicular to the lines (paragraph 0030-0032).
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Claim #17 is/are rejected under 35 U.S.C. 103 as being unpatentable over RIOU (U.S. Pub. No, 2020/0336078), hereinafter referred to as "Riou" as modified by Sasaki et al., (U.S. Pat. No. 2018/0308833), hereinafter referred to as "Sasaki" as shown in the rejection of claim #1 above and in further view of Heilbronner et al., (U.S. Pat. No. 2005/0024805), hereinafter referred to as "Heilbronner".
Riou as modified by Sasaki, substantially shows the claimed invention as shown in the rejection of claim #1 above.
Riou as modified by Sasaki, fails to show, with respect to claim #17, a power module wherein the substrate is a direct copper bonding (DCB) substrate.
Heilbronner teaches, with respect to claim #17, a power module wherein the substrate is a direct copper bonding (DCB) substrate (paragraph 0064-0065).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #17, to modified the invention of Riou as modified by Sasaki, with the modification of Sasaki invention, with the invention of Heilbronner, which teaches , a power module wherein the substrate is a direct copper bonding (DCB) substrate, to incorporate a structural condition that provides excellent dielectric properties ensure reliable electrical insulation with low coefficients of thermal expansion and allowing integration of complex power and signal routing, as taught by Heilbronner.
EXAMINATION NOTE
The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andre’ Stevenson Sr./
Art Unit 2899
06/09/2026
/ZANDRA V SMITH/ Supervisory Patent Examiner, Art Unit 2899
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