Prosecution Insights
Last updated: April 19, 2026
Application No. 17/788,967

RESONANT TUNNELING DIODES WITH ISOLATION STRUCTURE AND MANUFACTURING METHODS THEREOF

Non-Final OA §103
Filed
Jun 24, 2022
Examiner
WINTERS, SEAN AYERS
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Enkris Semiconductor Inc.
OA Round
5 (Non-Final)
87%
Grant Probability
Favorable
5-6
OA Rounds
3y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
97 granted / 112 resolved
+18.6% vs TC avg
Strong +25% interview lift
Without
With
+24.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
80 currently pending
Career history
192
Total Applications
across all art units

Statute-Specific Performance

§103
58.8%
+18.8% vs TC avg
§102
30.6%
-9.4% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 112 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/21/2026 has been entered. Priority Receipt is acknowledged of certified copies of papers required by PCT. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 18-21, 25, and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (CN Pub No CN105845716A) (of record) (A.K.A. “Hao”) in view of Wang (CN Pub No CN106876442A). *see attached translations (of record, mailed 12/06/2024 for Zhang) for line ref #’s* Regarding claim 18, Zhang teaches a resonant tunneling diode [lines 3-7], comprising: a first barrier layer (5 or 7) fig. 1 [lines 90-113]; a second barrier layer (7 or 5) fig. 1 [lines 90-113]; a potential well layer (6) fig. 1 [lines 94-95] between the first barrier layer (5 or 7) and the second barrier layer (7 or 5), a collector electrode (3) fig. 1 [lines 79-81], an emitter electrode (10) fig. 1 [lines 123-125], the collector electrode (3) close to the first barrier layer (5 or 7) fig. 1 [lines 90-113], the emitter electrode (10) close to the second barrier layer (7 or 5) fig. 1 [lines 90-113]; and a third isolation layer (4) fig. 1 [lines 85-86] vertically between the collector electrode (3) and the first barrier layer (5 or 7); wherein a material of the first barrier layer (5 or 7) is AlxInyN1-x-y, 1>x>0, 1>y>0 (In concentration y = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1) a material of the second barrier layer (7 or 5) is AlmInnN1-m-n, 1>m>0, 1>n>0 (In concentration n = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1), and a material of the potential well layer (6) comprises a gallium element (GaN) [lines 94-95]. However, Zhang does not explicitly disclose wherein the third isolation layer (4) consists of AlN (GaN instead [lines 85-86]). Wang teaches a resonant tunneling diode [see title] wherein the third isolation layer (2) fig. 1 [lines 72, 148] consists of AlN (may be ‘AlN’ without other additives indicated; or GaN instead [lines 72, 148]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the GaN isolation layer(s) of Zhang to consist of aluminum nitride (AlN) instead as both are recognized in the art as equally suitable materials for the buffering isolation layer of a resonant tunneling diode [lines 72, 148], as evidenced by Wang. Further, the modification reflects a mere materials substitution of materials recognized in the art for the same purpose, i.e, as a buffering III-V isolation layer in a resonant tunnel diode, and an express suggestion to substitute one equivalent component or process for another is not necessary to render such substitution obvious. (See MPEP 2144.06, II). Regarding claim 19, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 18. Zhang also teaches wherein the material of the potential well layer (6) fig. 1 [lines 94-95] comprises GaN [lines 94-95]. Regarding claims 20 and 21, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 19. Zhang also teaches wherein the material of the first barrier layer (5 or 7) fig. 1 [lines 90-113] is AlxInyN1-x-y, y < 30% < 45%; and the material of the second barrier layer (7 or 5) fig. 1 [lines 90-113] is AlmInnN1-m-n, n <30% < 45% (neither InGaN barrier layer 5 nor 7 has an Indium concentration greater than 18% [lines 97-113]; 18% < 30% < 45%). Regarding claims 25, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 24. Zhang also teaches wherein a material of the collector electrode (3) fig. 1 [lines 79-81] and a material of the emitter electrode (10) fig. 1 [lines 123-125] comprise a GaN-based material (GaN) [lines 79, 123-125]. Regarding claims 29, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 18. Zhang also teaches further comprising: a fourth isolation layer (9) fig. 1 [line 117] (GaN isolation layer) (vertically) between the emitter electrode (10) and the second barrier layer (7). Regarding claim 38, Zhang teaches a resonant tunneling diode [lines 3-7], comprising: a first barrier layer (5 or 7) fig. 1 [lines 90-113]; a second barrier layer (7 or 5) fig. 1 [lines 90-113]; a potential well layer (6) fig. 1 [lines 94-95] between the first barrier layer (5 or 7) and the second barrier layer (7 or 5), a collector electrode (3) fig. 1 [lines 79-81], an emitter electrode (10) fig. 1 [lines 123-125], the collector electrode (3) close to the first barrier layer (5 or 7) fig. 1 [lines 90-113], the emitter electrode (10) close to the second barrier layer (7 or 5) fig. 1 [lines 90-113]; and a fourth isolation layer (9) fig. 1 [lines 135-137] (AlN passivation layer) vertically between the collector electrode (3) and the second barrier layer (7 or 5) (see modified fig. 1 of Zhang below); wherein a material of the first barrier layer (5 or 7) is AlxInyN1-x-y, 1>x>0, 1>y>0 (In concentration y = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1) a material of the second barrier layer (7 or 5) is AlmInnN1-m-n, 1>m>0, 1>n>0 (In concentration n = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1), and a material of the potential well layer (6) comprises a gallium element (GaN) [lines 94-95]. However, Zhang does not explicitly disclose wherein the fourth isolation layer (9) consists of AlN (GaN instead [line 117]). Wang teaches a resonant tunneling diode [see title] wherein the fourth isolation layer (2) fig. 1 [lines 72, 148] consists of AlN (may be ‘AlN’ without other additives indicated; or GaN instead [lines 72, 148]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the GaN isolation layer(s) of Zhang to consist of aluminum nitride (AlN) instead as both are recognized in the art as equally suitable materials for the buffering isolation layer of a resonant tunneling diode [lines 72, 148], as evidenced by Wang. Further, the modification reflects a mere materials substitution of materials recognized in the art for the same purpose, i.e, as a III-V buffering isolation layer in a resonant tunnel diode, and an express suggestion to substitute one equivalent component or process for another is not necessary to render such substitution obvious. (See MPEP 2144.06, II). Regarding claim 39, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 38. Zhang also teaches wherein the material of the potential well layer (6) fig. 1 [lines 94-95] comprises GaN [lines 94-95]. Regarding claim 40, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 39. Zhang also teaches wherein the material of the first barrier layer (5 or 7) fig. 1 [lines 90-113] is AlxInyN1-x-y, y < 45%; and the material of the second barrier layer (7 or 5) fig. 1 [lines 90-113] is AlmInnN1-m-n, n <45% (neither InGaN barrier layer 5 nor 7 has an Indium concentration greater than 18% [lines 97-113]; 18% < 45%). Regarding claims 41, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 38. Zhang also teaches wherein a material of the collector electrode (3) fig. 1 [lines 79-81] and a material of the emitter electrode (10) fig. 1 [lines 123-125] comprise a GaN-based material (GaN) [lines 79, 123-125]. Claims 22-23, 27-28, and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (CN Pub No CN105845716A) (of record) modified by Wang (CN Pub No CN106876442Al), as applied in claim 18 above, and further in view of Ramaswamy (U.S. PG Pub No US2020/0105881A1) (of record). Regarding claims 22, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 18. However, Zhang does not explicitly disclose wherein a first isolation layer is disposed between the first barrier layer (5 or 7) fig. 1 [lines 90-113] and the potential well layer (6) fig. 1 [lines 94-95]. Ramaswamy teaches a tunnel diode device (201) fig. 2B [0027, 0034] wherein a first isolation layer (225) fig. 2B [0040] is disposed between the first barrier layer (230) fig. 2B [0042] and the potential well layer (210) fig. 2B [0035]. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the RTD of Zhang to include the double-well, multi-barrier structure of Ramaswamy [0034-0040] in order to improve the device’s high-frequency [0001-0002, 0020] and voltage [0025-0027] performance characteristics, as taught by Ramaswamy. Regarding claims 23, Zhang in view of Wang and Ramaswamy teaches the resonant tunneling diode [lines 3-7] of claim 22. Zhang in view of Ramaswamy (with reference to Ramaswamy) also teaches wherein a material of the first isolation layer (225) fig. 2B [0040 Ramaswamy] comprises AlN [0040 Ramaswamy]. Regarding claims 27, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 18. However, Zhang does not explicitly disclose wherein a second isolation layer is disposed between the second barrier layer (7 or 5) fig. 1 [lines 90-113] and the potential well layer (6) fig. 1 [lines 94-95]. Ramaswamy teaches a tunnel diode device (201) fig. 2B [0027, 0034] wherein a second isolation layer (225) fig. 2B [0040] is disposed between the second barrier layer (230) fig. 2B [0042] and the potential well layer (210) fig. 2B [0035]. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the RTD of Zhang to include the double-well, multi-barrier structure of Ramaswamy [0034-0040] in order to improve the device’s high-frequency [0001-0002, 0020] and voltage [0025-0027] performance characteristics, as taught by Ramaswamy. Regarding claims 28, Zhang in view of Wang and Ramaswamy teaches the resonant tunneling diode [lines 3-7] of claim 27. Zhang in view of Ramaswamy (with reference to Ramaswamy) also teaches wherein a material of the first isolation layer (225) fig. 2B [0040 Ramaswamy] comprises AlN [0040 Ramaswamy]. Regarding claims 30, Zhang in view of Wang teaches the resonant tunneling diode [lines 3-7] of claim 29. However, Zhang does not explicitly disclose wherein a material of the fourth isolation layer (9) fig. 1 [line 117] (GaN isolation layer) comprises AlN. Ramaswamy teaches a tunnel diode device (201) fig. 2B [0027, 0034] wherein a material of the fourth isolation layer (215/225) fig. 2B [0038-0040] comprises AlN (AlGaN). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the RTD of Zhang such that the GaN isolation layer possibly comprises aluminum in order to improve control of its polarization/isolation characteristics [0038-0040] through a greater range of possible material compositions [0038-0040], as taught by Ramaswamy. Claims 31-35 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (CN Pub No CN105845716A) (of record) (A.K.A. “Hao”) in view of Chen (U.S. PG Pub No US2019/0096879A1). *See attached translations (of record, mailed 12/06/2024 for Zhang) for line ref #’s* Regarding claim 31, Zhang teaches a method of manufacturing [lines 69-70] a resonant tunneling diode [lines 3-7], comprising: preparing a first barrier layer (5 or 7) fig. 1 [lines 90-113], a potential well layer (6) fig. 1 [lines 94-95], a second barrier layer (7 or 5) fig. 1 [lines 90-113]; preparing a collector electrode (3) fig. 1 [lines 79-81] on (supported by) a side of the first barrier layer (5 or 7) away from the potential well layer (6) fig. 1 [lines 94-95]; and preparing an emitter electrode (10) fig. 1 [line 123] on (supported by) a side of the second barrier layer (7 or 5) away from the potential well layer (6); and one or more of: before preparing (layers formed progressively [lines 69-70]) the collector electrode (3) fig. 1 [lines 79-81] on the side of the first barrier layer (5 or 7) away from the potential well layer (6) fig. 1 [lines 94-95], preparing a third isolation layer (4) [lines 85-86] on (supported by at some point in the method) the side of the first barrier layer (5 or 7) away from the potential well layer (6), such that the third isolation layer (4) is vertically between the collector electrode (3) and the first barrier layer (5 or 7); and before preparing the emitter electrode (10) fig. 1 [line 123] on the side of the second barrier layer (7 or 5) away from the potential well layer (6), preparing a fourth isolation layer (9) fig. 1 [line 117] (GaN isolation layer) on (supported by) the (top) side of the second barrier layer (7 or 5) away from the potential well layer (6), such that the fourth isolation layer (9) is vertically between the emitter electrode (10) and the second barrier layer (7 or 5); wherein a material of the first barrier layer (5 or 7) is AlxInyN1-x-y, 1>x>0, 1>y>0 (In concentration y = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1) a material of the second barrier layer (7 or 5) is AlmInnN1-m-n, 1>m>0, 1>n>0 (In concentration n = 0.03-0.05 or 0.16-0.18 [lines 90-113], making aluminum and nitrogen content remaining atomic percentages / portions between 0-1), and a material of the potential well layer (6) comprises a gallium element (GaN) [lines 94-95]. However, Zhang does not explicitly disclose wherein the third isolation layer (4) consists of AlN (GaN instead [lines 85-86]), and wherein a material of the fourth isolation layer (9) comprises AlN (GaN instead [line 117]). Chen teaches a method [see title, 0042] (comprising formation of RTD) fig. 3 [0042] wherein the third isolation layer (102) fig. 3 [0042, 0022-0025] consists of AlN [0023] (may include only AlN [0023] instead of GaN), and wherein a material of the fourth isolation layer (106) fig. 3 [0024-0025] comprises (undoped) AlN [0025] (or undoped AlGaN) [0025]. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the GaN-comprising-isolation-layer(s) of Zhang to consist of aluminum nitride (AlN) instead as both are recognized in the art as equally suitable materials for the barrier/ buffering isolation layer of a resonant tunneling diode comprising structure [0023, 0025], as evidenced by Chen. Further, the modification reflects a mere materials substitution of materials recognized in the art for the same purpose, i.e, as a III-V isolation layer in a resonant tunnel diode, and an express suggestion to substitute one equivalent component or process for another is not necessary to render such substitution obvious. (See MPEP 2144.06, II). Regarding claim 32, Zhang in view of Chen teaches the method of manufacturing [lines 69-70] the resonant tunneling diode [lines 3-7] of claim 31. Zhang also teaches wherein the material of the potential well layer (6) fig. 1 [lines 94-95] comprises GaN [lines 94-95]. Regarding claims 33, Zhang in view of Chen teaches the method of manufacturing [lines 69-70] the resonant tunneling diode [lines 3-7] of claim 32. Zhang also teaches wherein the material of the first barrier layer (5 or 7) fig. 1 [lines 90-113] is AlxInyN1-x-y, y < 30% < 45%; and the material of the second barrier layer (7 or 5) fig. 1 [lines 90-113] is AlmInnN1-m-n, n <30% < 45% (neither InGaN barrier layer 5 nor 7 has an Indium concentration greater than 18% [lines 97-113]; 18% < 30% < 45%). Regarding claim 34, Zhang in view of Chen teaches the method of manufacturing [lines 69-70] the resonant tunneling diode [lines 3-7] of claim 31. Zhang also teaches wherein in response to determining that the material of the first barrier layer (5 or 7) fig. 1 [lines 90-113] is AlxInyN1-x-y, a temperature of preparing the first barrier layer (5 or 7) ranges from 600°C to 900°C (temperatures of 585°C to 850 or 900°C may be employed) [lines 240-241, 263-264]; and in response to determining that the material of the second barrier layer (7 or 5) fig. 1 [lines 90-113] is AlmInnN1-m-n, temperature of preparing the second barrier layer (7 or 5) ranges from 600°C to 900°C (temperatures of 585°C to 850 or 900°C may be employed) [lines 240-241, 263-264]. Regarding claim 35, Zhang in view of Chen teaches the method of manufacturing [lines 69-70] the resonant tunneling diode [lines 3-7] of claim 31. Zhang also teaches further comprising: before preparing (layers formed progressively [lines 69-70]) the potential well layer (6) fig. 1 [lines 94-95], preparing a first isolation layer (1 or 2) fig. 4 [lines 74-75, 84-85] on (supported by) the first barrier layer (5) fig. 1 [lines 90-113]; and before preparing the second barrier layer (7) fig. 1 [lines 90-113], preparing a second isolation layer (2 or 1) fig. 4 [lines 84-85] on (supported by) the potential well layer (6). Response to Arguments Applicant’s arguments, see pages 1-3, filed 01/21/2026, with respect to the rejection(s) of claim(s) 18, 31, and 38 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Wang (CN Pub No CN106876442A) for claims 18 and 38 and Chen (U.S. PG Pub No US2019/0096879A1) for claim 31. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Remaining refences disclosed on the PTO-892 form (of record) are considered relevant because they disclose other examples of RTD’s. Newly-added Tchelnokov (U.S. PG Pub No US2016/0104743A1) teaches another example of an RTD-structure comprising AlN and GaN as alternatives. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAN AYERS WINTERS whose telephone number is (571)270-3308. The examiner can normally be reached Monday - Friday 10:30 am - 7:00 pm (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEAN AYERS WINTERS/Examiner, Art Unit 2892 02/05/2026 /NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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Prosecution Timeline

Jun 24, 2022
Application Filed
Dec 03, 2024
Non-Final Rejection — §103
Feb 27, 2025
Response Filed
Apr 29, 2025
Final Rejection — §103
Jun 27, 2025
Response after Non-Final Action
Jul 23, 2025
Request for Continued Examination
Jul 24, 2025
Response after Non-Final Action
Aug 05, 2025
Non-Final Rejection — §103
Oct 28, 2025
Response Filed
Nov 19, 2025
Final Rejection — §103
Jan 08, 2026
Interview Requested
Jan 15, 2026
Applicant Interview (Telephonic)
Jan 20, 2026
Examiner Interview Summary
Jan 21, 2026
Request for Continued Examination
Feb 03, 2026
Response after Non-Final Action
Feb 08, 2026
Non-Final Rejection — §103 (current)

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