DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendments filed 12/15/2025 are noted.
The Applicant’s amendment to the Title is noted and has overcome the objection to the Specification made in the Non-Final Office Action mailed 9/15/2025. Therefore, the objection to the Specification is withdrawn.
The Applicant’s cancellation of claim 2 is noted and accordingly overcomes the objection made in the Non-Final Office Action mailed 9/15/2025. Therefore, the objection to claim 2 is withdrawn.
Claims 1 and 3-18 remain pending; claim 2 is canceled; claims 9-18 remain withdrawn from consideration.
Claims 1 and 3-8 have been fully considered in examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over US 20110241185 A1 (of record), hereafter “Koester” in view of US 20140264474 A1 (of record), hereafter “Chu” and US 20110139497 A1, hereafter “Li”.
Regarding claim 1, Koester teaches a wiring substrate (Figs. 3 and 4A; [0010,0011]) comprising:
a silicon substrate 10 [0023] formed of silicon (Si [0024]); and
a through electrode 58 [0030] formed in the silicon substrate 10 [0046] (Fig. 3), wherein:
the through electrode 58 is comprises central conductor 50 [0030] that penetrates through the silicon substrate 10 (Fig. 3) and an external conductor 52 [0030] formed around the central conductor 50 (Figs. 3 and 4A),
the central conductor 50 and the external conductor 52 are electrically insulated from each other by the silicon substrate 10 (see portion 13 of substrate 10 [0030]; Fig. 3).
Koester does not explicitly teach wherein the silicon substrate 10 has an electrical resistivity of 1000 Ω*cm or larger, and further does not teach wherein a width of the external conductor 52 is 0.5 times as large or smaller than a diameter of the central conductor 50.
Chu teaches a wiring substrate (Fig. 4B) comprising a silicon substrate 201 [0016], wherein the silicon substrate has a resistance of at least 1000 ohm*cm [0016].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have made the silicon substrate 10 of Koester to be 1000 ohm*cm or higher, as taught by Chu, given Koester is silent with regard to the resistance of their substrate, and Chu teaches such a material is well suited to form TSVs in for signal transmission, especially in forming, for example, a switching device, as taught by Chu [0014,0015].
Koester in view of Chu does not teach wherein a width of the external conductor 52 is 0.5 times as large or smaller than a diameter of the central conductor 50.
Li teaches a wiring substrate (Fig. 3; [0052]) wherein a width of an external conductor 312 [0046] is 0.5 times as large or smaller than a diameter of a central conductor 310 [0046] (see annotated Fig. 3 below).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the teachings of Li in the wiring substrate of Koester in order to decrease the footprint of each through electrode and provide greater density of said through electrodes, as taught by Li [0042,0044].
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Regarding claim 3, Koester in view of Chu and Li teaches the wiring substrate according to claim 1, and Koester further teaches wherein the external conductor 52 is formed around the central conductor 50 in such a way that the external conductor 52 has a continuous ring shape (Fig. 4A).
Regarding claim 4, Koester in view of Chu and Li teaches the wiring substrate according to claim 1, and Koester further teaches wherein the external conductor 52 may be modified from how it is formed in Fig. 4A such that is formed to surround the central conductor 50 in such a way that the external conductor 52 has a ring shape in which a part of it is cut out (see Fig. 4B; [0034]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the embodiment of Fig. 4A to include the cut out shape of Fig. 4B in order to increase the mechanical support for the portion 13 of the silicon substrate 10, as taught by Koester [0036].
Regarding claim 5, Koester in view of Chu and Li teaches the wiring substrate according to claim 4, and Koester further teaches wherein a separation distance of a part in which the external conductor 52 is cut out is equal to or smaller than the diameter of the central conductor 50 (see Fig. 4B).
Regarding claim 6, Koester in view of Chu and Li teaches the wiring substrate according to claim 1, and Koester further teaches wherein the external conductor 52 is formed to have a continuous shape in a thickness direction (i.e., when viewed from a planar view) of the silicon substrate 10 (see continuous ring shape of Fig. 4A).
Regarding claim 7, Koester in view of Chu and Li teaches the wiring substrate according to claim 1, and Koester further teaches wherein:
the external conductor 52 includes a first external conductor part (52; see Fig. 4C) formed on a side of a first surface of the silicon substrate 10 (one of the segments of 52 on surface of 13) and a second external conductor part (52; the remaining segment) that is formed on a second surface, which is a surface opposite to the first surface of the silicon substrate 10 (opposite side of 13 relative to the central conductor 50) and is electrically connected to the first external conductor part [0038], the first external conductor part (inner) is formed to surround the central conductor 50 in such a way that the first external conductor part has a ring shape (half of ring shape; in tandem with the plurality of 52 [0038]) in which a part of it at a first position is cut out (between the first and second external conductor parts 52 in Fig. 4C), the second external conductor part is formed to surround the central conductor 50 in such a way that the second external conductor part 52 has a ring shape (half of ring shape; Fig. 4C) in which a part of it at a second position is cut out (opposite the first position relative the central conductor 50), and
the first position with respect to the central conductor 50 is different from the second position with respect to the central conductor 50 (where they are on opposite sides of 50; Fig. 4C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the embodiment of Fig. 4A to include the cut out shape of Fig. 4C in order to increase the mechanical support for the portion 13 of the silicon substrate 10, as taught by Koester [0040].
Regarding claim 8, Koester in view of Chu and Li teaches the wiring substrate according to claim 7. Koester further teaches wherein the external conductor 52 further includes a third external conductor part (so as to be in the first and second positions of claim 7; see Fig. 4A) between the first external conductor part and the second external conductor part, the third external conductor part being formed to surround the central conductor 50 in such a way that the third external conductor part has a continuous ring shape (in combination with the other ring shapes of the external conductors to form a continuous ring shape; Fig. 4A).
Response to Arguments
Applicant’s arguments with respect to claims 1-8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Specifically, new art is applied that remedies the deficiencies in the prior rejection of record, as necessitated by amendment.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Bruce Smith III whose telephone number is (571)272-5570. The examiner can normally be reached Monday - Friday; 8 am - 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571)272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRUCE R. SMITH/Examiner, Art Unit 2892
/ERIC W JONES/Primary Examiner, Art Unit 2892
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