DETAILED ACTION
This Notice is responsive to communication filed on 09/02/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 09/02/2025 under 37 CFR 1.131(a) has been entered. Claims 1, 4-9 remain pending in the application. Claims 2 and 3 have been cancelled.
The 112 rejections in the previous Action dated 06/06/2025 has been overcome by the amended claim 4.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 20190131557 A1) and further in view of Lei et al. (CN 108598273 A).
Regarding claim 1, Lee discloses a quantum dot light emitting diode, comprising:
a base substrate (para 0017); and
a first electrode Fig. 4: 210, a first electron transport layer Fig. 4: 242, a second electron transport layer Fig. 4: 244, a quantum dot light emitting layer Fig. 4: 250, a hole transport layer Fig. 4: 264, a hole injection layer Fig. 4: 262 and a second electrode Fig. 4: 220 successively located on the base substrate (see Fig. 4), and the second electron transport layer Fig. 4: 244 is composed of nanoparticles (para 0103 discloses various examples of nanoparticles i.e. PFNBr);
wherein the first electron transport layer Fig. 4: 242 is a film layer formed from one of the following materials: zinc oxide, aluminum zinc oxide and magnesium oxide (para. 0101);
wherein the second electron transport layer Fig. 4: 244 is composed of nanoparticles of one of the following materials: zinc oxide, aluminum oxide and magnesium zinc oxide (para. 0103-0104); and
wherein the second electron transport layer Fig. 4: 244 is directly formed on the first electron transport layer Fig. 4: 242 (shown in Fig. 4).
Lee fails to expressly disclose wherein a surface roughness of a side of the first electron transport layer away from the first electrode is less than a threshold.
However, Lei teaches wherein a surface roughness of a side of the first electron transport layer away from the first electrode is less than a threshold (para. 0012, “surface roughness after film formation is not more than 2nm”). The examiner has interpreted the small number of 2nm as the threshold since the applicant does not provide a threshold in claim 1.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Lee and Lei’s teachings for the purpose of maintaining good electron transporting properties (para. 30, lines 7-8) and maintaining a small surface roughness to ensure the electron transport layer material can form a good film (para 0004, lines 17-18).
Regarding claim 4, although Lee teaches substantial features of the claim 1, Lee fails to explicitly teach the quantum dot light emitting diode according to claim 1, wherein the threshold is 3nm. However, Lei teaches a surface roughness not more than 2nm which is within the threshold of 3nm of claim 4. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Lee and Lei’s teachings for the purpose of maintaining good electron transporting properties (para. 30, lines 7-8) and maintaining a small surface roughness to ensure the electron transport layer material can form a good film (para 0004, lines 17-18).
Regarding claim 5, Lee discloses the quantum dot light emitting diode according to claim 1, wherein the first electron transport layer Fig. 4: 242 has a thickness of 50-150 nm and the second electron transport layer Fig. 4: 244 has a thickness of 20-60 nm (para 0105, “each of the EIL 242 and the ETL 244 may be stacked to have a thickness of about 10 nm to about 200 nm, preferably, a thickness of about 10 nm to about 100 nm”).
Regarding claim 6, Lee discloses the quantum dot light emitting diode according to claim 1, wherein the first electrode Fig. 4: 210 is an ITO cathode (para. 0098).
Regarding claim 7, Lee discloses the quantum dot light emitting diode according to claim 5, wherein the second electrode Fig. 4: 220 is a metal anode (para. 0099).
Regarding claim 8, Lee discloses a display panel, comprising the quantum dot light emitting diode according to any one of claim 1 (display panel of the display device of Fig. 6: 300).
Regarding claim 9, Lee discloses a display device Fig. 6: 300, comprising the quantum dot light emitting diode Fig. 6: 400 according to any one of claims 1.
Response to Arguments
Applicant's arguments filed 09/02/2025 have been fully considered but they are not persuasive.
Regarding applicant's argument that Lee's EIL The examiner points to Lee’s para. 0101 that teaches an EIL layer, which is part of the first charge (i.e. electron) transfer layer, made of a material such as ZnO, TiO, SnO which are inclusive of the claimed materials of the first electron transport layer. Wu et al. (see http://dx.doi.org/10.1016/j.solmat.2016.07.003) teach an electron transport layer with materials metal oxides including ZnO, SnO and TiO applied for improving power conversion efficiency. Since the claims are broader than what is disclosed in the specification, using broadest reasonable interpretation, it would be obvious to one of ordinary skill in the art before the effective filing date to use Lee’s EIL Fig. 4: 242 as an electron transport layer, because the layer of Lee is made of the same materials as the present claimed invention., See Wu et al., Enhanced short-circuit current density… Solar Energy Materials and Solar Cells (http://dx.doi.org/10.1016/j.solmat.2016.07.003) Abstract and Introduction.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NKECHINYERE ESIABA whose telephone number is (571)272-0720. The examiner can normally be reached Monday - Friday 10am-5pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nkechinyere Esiaba/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 November 5, 2025