Prosecution Insights
Last updated: April 19, 2026
Application No. 17/809,408

SEMICONDUCTOR DEVICE INCLUDING A BASE PLATE AND A CASE HAVING CONVEX AND CONCAVE PORTIONS THAT FIT TOGETHER

Final Rejection §102§103
Filed
Jun 28, 2022
Examiner
PURVIS, SUE A
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Final)
61%
Grant Probability
Moderate
3-4
OA Rounds
3y 3m
To Grant
77%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allow Rate
40 granted / 66 resolved
-7.4% vs TC avg
Strong +16% interview lift
Without
With
+16.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
14 currently pending
Career history
80
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
41.4%
+1.4% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
24.3%
-15.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 66 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 3, 6, and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hitomi et. al. (US20200219782A1), hereinafter “Hitomi”. Regarding independent claim 1, Hitomi teaches a semiconductor device (Hitomi, Abstract) comprising: a semiconductor element (1, FIG. 2); an insulating substrate (5, FIG. 2) on which the semiconductor element is mounted; a base plate (10, FIG. 2) on which the insulating substrate is mounted; and a case (7, FIG. 2) mounted on the base plate to surround the semiconductor element and the insulating substrate, (See: Hitomi, FIG. 2) wherein one or more convex portions (9, FIG. 2) each having a tapered shape are provided in one of a surface of the base plate and a surface of the case, and one or more concave portions (71, FIG. 2) each having a tapered shape to be fitted to the one or more convex portions are provided in another one of the surface of the base plate and the surface of the case. (See: Hitomi, FIG. 2) Regarding dependent claim 3, Hitomi teaches the semiconductor device according to claim 1, wherein the one or more convex portions are a plurality of convex portions, and the one or more concave portions are a plurality of concave portions fitted to the plurality of convex portions, respectively. (See: Hitomi, FIG. 2: There are multiple convex portions 9 and multiple concave portions 71 shown fitted to the convex portions 9.) Regarding dependent claim 6, Hitomi teaches the semiconductor device according to claim 3, wherein the plurality of convex portions are adjacent to each other, and the plurality of concave portions are adjacent to each other. (See: Hitomi, FIG. 2, in which the one or more convex portions 9 are adjacent to each other, and in which the one or more concave portions 71 are adjacent to each other.) Regarding dependent claim 7, Hitomi teaches the semiconductor device according to claim 1, wherein a gap is provided between the convex portion and the concave portion facing each other, and at least one of an adhesive agent and a sealing member is provided in the gap. (See: Hitomi, Abstract. In particular, “an adhesive member filled between the base plate and the angled surface to adhere the base plate and the case member.”) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 2, 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Hitomi, et. al. (US20200219782A1) in view of Takahashi, et. al. (US20230005805A1). Regarding dependent claim 2, while Hitomi does not explicitly teach the features of claim 2, Takahashi teaches wherein the one or more convex portions or the one or more concave portions are asymmetrically disposed in the base plate or the case in a plan view. (See: grooves 8 and sealing resin 42 in FIG. 9 of Takahashi. Also, see: groove 5 and component 13 in FIG. 2 of Takahashi) One skilled in the art would appreciate that providing asymmetrically-disposed concave portions would “prevent the semiconductor device from being placed in an incorrect orientation when the semiconductor device is fixed to the printed circuit board”. (See: Takahashi, [0072]) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the combine the teachings of Hitomi and Takahashi to prevent a semiconductor device from being installed in an incorrect orientation. Regarding dependent claim 4, while Hitomi does not explicitly teach the features of claim 4, Takahashi teaches wherein the plurality of convex portions include a first convex portion and a second convex portion having shapes different from each other in a plan view, and the plurality of concave portions include a first concave portion and a second concave portion having shapes different from each other in a plan view. (See: groove 5 and component 13 in FIGS. 1-2 of Takahashi.) One skilled in the art would appreciate that providing multiple concave portions that are shaped differently would prevent the semiconductor device from being affixed to a printed circuit board in an incorrect orientation. (See: Takahashi, [0072]) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the combine the teachings of Hitomi and Takahashi to prevent a semiconductor device from being installed in an incorrect orientation. Regarding dependent claim 5, while Hitomi does not explicitly teach the features of claim 5, Takahashi teaches the semiconductor device according to claim 3, wherein the plurality of convex portions include a first convex portion and a second convex portion having shapes different from each other in a cross-sectional view, and the plurality of concave portions include a first concave portion and a second concave portion having shapes different from each other in a cross-sectional view. One skilled in the art would appreciate that providing multiple concave portions that are shaped differently would prevent the semiconductor device from being affixed to a printed circuit board in an incorrect orientation. (See: Takahashi, [0072]) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the combine the teachings of Hitomi and Takahashi to prevent a semiconductor device from being installed in an incorrect orientation. Conclusion The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure: US-20210020609-A1 JP-2006011185-A WO-2022116055-A1 WO-2020231871-A1 Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joseph Godoy whose telephone number is (571) 272-1346. The examiner can normally be reached on Monday-Friday 9AM-5PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH PATRICK GODOY/ Examiner, Art Unit 2897 /CHAD M DICKE/ Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Jun 28, 2022
Application Filed
Apr 11, 2025
Non-Final Rejection — §102, §103
Jul 17, 2025
Response Filed
Apr 01, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
61%
Grant Probability
77%
With Interview (+16.4%)
3y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 66 resolved cases by this examiner. Grant probability derived from career allow rate.

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