Prosecution Insights
Last updated: October 02, 2026
Application No. 17/812,752

COMPACT BATTERY MODULE UTILIZING DUAL-SIDED PCB BUS

Final Rejection §103
Filed
Jul 15, 2022
Examiner
MCNULTY, SEAMUS PATRICK
Art Unit
1752
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Textron Inc.
OA Round
4 (Final)
43%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
75%
With Interview

Examiner Intelligence

Grants 43% of resolved cases
43%
Career Allowance Rate
18 granted / 42 resolved
-22.1% vs TC avg
Strong +32% interview lift
Without
With
+32.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
41 currently pending
Career history
99
Total Applications
across all art units

Statute-Specific Performance

§103
74.4%
+34.4% vs TC avg
§102
17.4%
-22.6% vs TC avg
§112
7.5%
-32.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 42 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Amendments filed 06/24/2026 have been entered, but they do not overcome the 103 rejection as previously presented in non-final office action filed 03/24/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 7, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over (US-20150263389-A1) hereinafter referred to as ‘Moon’ in view of (US-20190131663-A1) hereinafter referred to as ‘Ardisana’ in further view of (US-20230253679-A1) hereinafter referred to as ‘Stojanovski’ Regarding Claim 1, Moon teaches a dual-sided printed circuit board bus, comprising: a printed circuit board (PCB) having a first face and a second face (Moon, First connection unit, second connection unit, 311 and 312, Fig. 7) ; a first positive battery cell terminal connector coupled to the first face of the PCB and configured to receive a positive terminal of a first battery cell (Moon, battery cells, 101, Fig. 7) ; and a second positive battery cell terminal connector coupled to the second face of the PCB (Moon, battery cells, 102, Fig. 7) and configured to receive a positive terminal of a second battery cell (Moon, second electrode tabs, 131, Fig. 7) Moon does not teach wherein the first face, and the second face are on opposite sides of the PCB. Ardisana teaches wherein the first face, and the second face are on opposite sides of the PCB and positive common bus is electrically coupled to a plurality of positive battery cell terminal connectors on the first face and a plurality of positive battery cell terminal connectors on the second face. (see annotated figure below). PNG media_image1.png 552 762 media_image1.png Greyscale Ardisana teaches that structure allows access to the PCB and the electrode ends and this method of arrangement promotes better manufacturing (Ardisana, “The exemplified method of manufacturing thus promotes manufacturing quality and requires less expensive tooling than would be the case if the electrodes were to be attached to the PCB in their final shapes and positions.”, see [0047]). Moon and Ardisana are analogous as they are both of the same field of battery PCB. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the PCB set up as taught in Moon with the arrangement of faces and sides as taught in Ardisana in order to promote quality in manufacturing. Modified Moon does not teach a positive common bus and a negative common bus electrically separated within the PCB, the positive common bus including a plurality of interconnected positive columns and the negative common bus including a plurality of interconnected negative columns, wherein the plurality of interconnected positive columns and the plurality of interconnected negative columns are arranged in an alternating column configuration across the PCB, wherein each column of the positive common bus is electrically coupled to a plurality of positive battery cell terminal connectors on the first face and a plurality of positive battery cell terminal connectors on the second face. Stojanovski teaches a positive common bus and a negative common bus (Stojanovski, busbar, 12, Fig. 1) electrically separated within the PCB (Stojanovski, senseline assembly, 14, Fig. 1) the positive common bus including a plurality of interconnected positive columns and the negative common bus including a plurality of interconnected negative columns, wherein the plurality of interconnected positive columns and the plurality of interconnected negative columns are arranged in an alternating column configuration across the PCB of the plurality of positive battery cell terminal connectors electrically (Stojanovski, “One of the first terminal 40 (or 140) and the second terminal 42 (or 142) is positive and the other is negative.”, see [0021]). Stojanovski teaches that this form of assembly improves the assembly of the battery pack (Stojanovski, “The structural integration described herein enables a one-step vertical installation with robust positioning of battery cells, busbars (current collectors), senselines and weld locations. The structural integration allows for battery pack mass reductions and simplifies assembly complexity. Another technical advantage is that the interconnect board assembly 10 eliminates the need for a flexible circuit board.”, see [0034]), wherein each column of the plurality of interconnected positive columns and each column of the plurality of interconnected negative columns are a continuous pad of a unitary construction (Stojanovski, see Fig. 1) Modified Moon and Stojanovski are analogous as they are both of the same field of battery PCB and structures. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the PCB as taught in Moon to have the features as taught in Stojanovski to simplify assembly and eliminate the need for a flexible PCB. Regarding Claim 2, Modified Moon teaches the PCB bus of Claim 1, wherein the first positive battery cell terminal connector and the second positive battery cell terminal connector are electrically coupled to a positive common bus configured to receive the voltage of the first and second battery cells (Moon, electrode tabs, 131 and 132, Fig. 7) (Moon, “first and second electrode tabs 131 and 132 can be easily attached to the first and second connection units 311 and 312,”, see [0076]). Regarding Claim 3, Modified Moon teaches the PCB bus of Claim 1, further comprising: a first negative battery cell terminal connector coupled to the negative common bus on the first face of the PCB and configured to receive a negative terminal of the first battery cell; and a second negative battery cell terminal connector coupled to the negative common bus on the second face of the PCB and configured to receive a negative terminal of the second battery cell (Moon, “first and second electrode tabs 131 and 132 can be easily attached to the first and second connection units 311 and 312,”, see [0076]) (see also the two face configuration of Ardisana and Stonjanovski) . Regarding Claim 4, Modified Moon teaches the PCB bus of Claim 3, wherein the first negative battery cell terminal connector and the second negative battery cell terminal connector are electrically coupled to the negative common bus configured to receive the voltage of the first and second battery cells (Moon, “first and second electrode tabs 131 and 132 can be easily attached to the first and second connection units 311 and 312,”, see [0076]). Regarding Claim 7, Modified Moon teaches The PCB bus of Claim 3, wherein the positive common bus is operably coupled to a positive tap point (Moon, “Therefore, the first and second connection units 311 and 312 to be connected to the positive electrodes of the first electrode tabs 131 of the first battery cell 101 and those of the second electrode tabs 132 of the second battery cell 102”, see [0077]). Regarding Claim 8, Modified Moon teaches the PCB bus of Claim 4, wherein the negative common bus is operably coupled to a negative tap point (Moon, “In these embodiments, the negative electrodes of the first and second electrode tabs 131 and 132 can be easily attached to the first and second connection units 311 and 312, ”, see [0076]). Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over (US-20150263389-A1) hereinafter referred to as ‘Moon’ in view of (US-20190131663-A1) hereinafter referred to as ‘Ardisana’, in further view of (US-20230253679-A1) hereinafter referred to as ‘Stojanovski’ in view of (US-20220216711-A1) hereinafter referred to as ‘Palatov’ Regarding Claim 5, Moon does not explicitly wherein the first and second battery cells are coupled in series. Palatov teaches that first and second battery cells are coupled in series (Palatov, “Large capacity packs typically require a plurality of individual small cells, groups of which are connected in parallel to achieve desired current capability, and multiple groups are then connected in series to achieve the desired voltage”, see [0005]) Palatov teaches that putting batteries in series can lead to the desired voltage of a battery pack (Palatov, “Large capacity packs typically require a plurality of individual small cells, groups of which are connected in parallel to achieve desired current capability, and multiple groups are then connected in series to achieve the desired voltage”, see [0005]) Moon and Palatov are analogous as they are of the same field of battery packs. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the cell arrangement as taught in Moon in order to make the cells in series in order to modify the voltage to the desired voltage needed for the application. Regarding Claim 6, Moon does not explicitly wherein the first and second battery cells are coupled in parallel. Palatov teaches that first and second battery cells are coupled in parallel. (Palatov, “Large capacity packs typically require a plurality of individual small cells, groups of which are connected in parallel to achieve desired current capability, and multiple groups are then connected in series to achieve the desired voltage”, see [0005]) Palatov teaches that putting batteries in series can lead to the desired current of a battery pack (Palatov, “Large capacity packs typically require a plurality of individual small cells, groups of which are connected in parallel to achieve desired current capability, and multiple groups are then connected in series to achieve the desired voltage”, see [0005]) Moon and Palatov are analogous as they are of the same field of battery packs. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the cell arrangement as taught in Moon in order to make the cells in parallel in order to modify the voltage to the desired current needed for the application. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over (US-20150263389-A1) hereinafter referred to as ‘Moon’ in view of (US-20190131663-A1) hereinafter referred to as ‘Ardisana’, in view of (US-20200274204 A1), hereinafter referred to as ‘Dawley’, and in further view of ‘Battery balancing methods: A comprehensive review’, hereinafter referred to as ‘Cao’ Regarding Claim 9, Moon doesn’t teach the PCB bus of Claim 1, further comprising a battery cell balancer operably coupled to the PCB and configured to maintain an equivalent state-of-charge of every cell. Dawley teaches a PCB bus , further comprising a battery cell balancer operably coupled to the PCB and configured to maintain an equivalent state-of-charge of every cell (Dawley, “For instance, the BSM may periodically initiate cell balancing functions and/or thermal regulation operations”, see [0003]). One of ordinary skill in the art would know that balancing is important as it prevents the degradation of cells, as taught by Cao (Cao, “balancing is the most important concerning the life of the battery system because without the balancing system, the individual cell voltages will drift apart over time”, Abstract). Moon and Dawley are analogous as they are both of the same field of batteries controls and PCB. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB as taught in Moon with the BSM as taught in Cao in order to balance the cells and improve long term battery life. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over (US-20150263389-A1) hereinafter referred to as ‘Moon’ in view of (US-20230093458-A1) hereinafter referred to as ‘Ardisana’, in further view of (US-20230253679-A1) hereinafter referred to as ‘Stojanovski’ ,in view of (US-20200274204 A1), hereinafter referred to as ‘Dawley’, Regarding Claim 10, Moon doesn’t teach a processor operably coupled to the PCB and configured to thermally manage the first or second battery cells. Dawley teaches a processor operably coupled to the PCB and configured to thermally manage the first or second battery cells. (Dawley, “Further with respect to the BSM 50 of FIG. 1, this electronic battery control device or a network of such devices may include one or more digital computers each one having a processor (P)”, see [0027]) (Dawley, “Example battery parameters that may be wirelessly communicated to and/or from the BSM 50 include cell voltages, temperatures, thermal regulation and/or cell balancing control signals,”, see [0027]) Dawley teaches that the processor allow for signal communication which improves packaging space ( Dawley, “In conjunction with wireless/RF transmission between the ICB assembly 14 and the BSM 50 of FIG. 1, the required packaging space for the ICB assembly 14 may enjoy an even lower profile.”, see [0058]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the PCB from Moon with the controller system with a processor as taught in Dawley in order to improve the packing space of the battery system. Response to Arguments Arguments filed on 06/24/2026 have been entered. Arguments are fully considered. On pg. 11, the applicant argues “In rejecting claim 1, the Office Action seems to equate the busbar assembly 12 to the claimed positive and negative common bus. Office Action at 5. However, the Office Action does not explicitly state which element or aspect of the busbar assembly 12 is equated to the claimed columns of each of the negative and positive common buses. Nonetheless, Applicant submits that under any reading of Stojanovski, Stojanovski fails to disclose "wherein each column of the plurality of interconnected positive columns and each column of the plurality of interconnected negative columns are a continuous pad of a unitary construction." … Thus, Stojanovski fails to disclose "wherein each column of the plurality of interconnected positive columns and each columns of the plurality of interconnected negative columns are a continuous pad of unitary construction.” 20. However, this is not convincing. The applicant claims that 30 and 32 are not a continuous pad of unitary construction, and that the busbars 34 are not disclosed as segregated in negative and positive. The examiner interprets the claims as given with the broadest reasonable interpretation in view of the disclosure (see MPEP 2111 and 2111.01). The examiner finds that the BRI of the amended claims does not overcome Stojanovski. A pad is generally understood to be a thin flat mat, according to Merriam-webster. Stojanovski teaches a flat and thin mat (see Fig.1). Stojanovski also teaches that the pad is continuous and connected to a first and second terminal (Stojanovski ,“connector 44 (e.g., a U-flow collector where the current makes a U-turn) is electrically connected to the first track 30 and the second track 32 at the second edge 38. FIG. 4 shows a first terminal 140, a second terminal 142 and a U-flow connector 144 electrically connected to the busbar assembly 112. One of the first terminal 40 (or 140) and the second terminal 42 (or 142) is positive and the other is negative.”, see [0021]). It seems to the examiner that if the first track is positive and the second track is negative, then it would meet the claim requirement of a “plurality of interconnected positive columns” and “a plurality of interconnected negative columns.” The examiner argues that this is supported by instant application’s disclosure in Fig. 2D, which demonstrates a similar connected pad of negative and positive columns. Therefore, the examiner finds that Stojanovski meets the BRI of the claim language, as the Stojanovski pad is flat and pad-like, connected, and consists of negative and positive columns. Therefore, the rejection is upheld. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAMUS PATRICK MCNULTY whose telephone number is (703)756-1909. The examiner can normally be reached Monday- Friday 8:00am to 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nicholas A. Smith can be reached at (571) 272-8760 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.P.M./Examiner, Art Unit 1752 /NICHOLAS A SMITH/Supervisory Primary Examiner, Art Unit 1752
Read full office action

Prosecution Timeline

Show 1 earlier event
Jun 03, 2025
Non-Final Rejection mailed — §103
Sep 03, 2025
Response Filed
Nov 14, 2025
Final Rejection mailed — §103
Feb 16, 2026
Request for Continued Examination
Feb 21, 2026
Response after Non-Final Action
Mar 24, 2026
Non-Final Rejection mailed — §103
Jun 24, 2026
Response Filed
Sep 22, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
43%
Grant Probability
75%
With Interview (+32.1%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 42 resolved cases by this examiner. Grant probability derived from career allowance rate.

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