Prosecution Insights
Last updated: October 22, 2026
Application No. 17/818,395

PRE-PLATED LEAD TIP FOR WETTABLE FLANK LEADFRAME

Final Rejection §103
Filed
Aug 09, 2022
Examiner
MIHALIOV, DMITRI
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
4 (Final)
74%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
23 granted / 31 resolved
+6.2% vs TC avg
Strong +33% interview lift
Without
With
+33.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
29 currently pending
Career history
63
Total Applications
across all art units

Statute-Specific Performance

§103
52.7%
+12.7% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 31 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Status of Claims Examiner notes that in the instant application following the response September 15, 2026: -Claims 1-5, 7-18 are pending. -Claims 6, 19, and 20 are cancelled. Response to Arguments Applicant’s amendments and arguments filed September 15, 2026 (hereinafter “Response”) have been fully considered and are not persuasive. Firstly, the Examiner notes that Applicant has failed to address the specific citations provided in the Non-Final dated June 16, 2026. As was noted, and will be repeated in the rejections below, Bai explicitly states that the package is singulated from the leadframe strip via the cutting of dam bars (Figs. 3-7, Paragraphs [0034], [0039], and [0051]). Secondly, regarding the argument (Response, PG. 5) towards the method disclosed by Bai ((1600); Fig. 16, Paragraphs [0050] and [0051]]), the argument fails on three points: -Applicant states that the method starts with the lead frames (102) already separated/singulated. Examiner finds no support for this assumption, and in fact finds Bai teaching to the contrary, as Bai states “a lead frame such as one of the lead frames (102) of the lead frame sheet (100) or (1400)” (Paragraph [0050]). Thus Bai identifies the lead frames as part of the lead frame sheet. Furthermore, the term “providing” does not equate with “isolating” or “separate”. -Bai later states that block (1660) of the method (1600) results in the singulating process via cutting the dam bars (Paragraph [0051]). If the lead frames (102) upon which the device is formed were already singulated, it’s unclear what this process would even be doing. Furthermore, if the individual lead frames (102) were already singulated from the lead frame sheet, it’s unclear how the manufacturing is even taking place, as there would be no support/attachment to uphold the device. -Even if the previous two points are somehow disregarded and the lead frames are indeed considered separated/singulated at the start of the method, this would be an entirely different method than is shown in the cited figures and paragraphs upon which the modification was based. Examiner also reminds Applicant of the previously cited Lim et al. (U.S. Pub. 2021/0202356) which teaches that this process (of singulation through cutting dam bars) is known as a conventional manner of fabricating a semiconductor package (Paragraph [0002]) Therefore, the rejections are maintained and presented again below. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-19 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Pub. 2016/0027721), hereinafter Lee, in view of Bai et al. (U.S. 2015/0294929), hereinafter Bai, as evidenced by Bin Abdul Aziz et al. (U.S. Pub. 2020/0235042), hereinafter Bin Andul Aziz. For clarity, an annotated version of Fig. 10 of Lee is provided below, hereinafter Fig. A. PNG media_image1.png 828 1213 media_image1.png Greyscale Regarding Claim 1, Lee teaches a method of forming a semiconductor package (e.g. package (158), labeled (SP2) in Fig. A. Similarly for (SP1); Figs. A and 9-14, Paragraphs [0021], [0035], and [0036]) comprising: -forming the semiconductor package (SP1) having a first plurality of leads ((140)/(140A); Fig. A, Paragraphs [0030] and [0031]) extending from a first side of the semiconductor package (side facing positive Y-direction, Fig. A), the semiconductor package disposed on a leadframe strip ((114); Fig. A, Paragraph [0020]), the leadframe strip (114) comprising the first plurality of leads ((140A)); -making a first cut (cutting dam bar in area labeled (C1); Figs. A and 11, Paragraph [0035]) through a dam bar ((146)/(146A); Figs. A and 11, Paragraphs [0030], [0031], and [0035]) coupled to the first plurality of leads (140A) adjacent to a first side (side facing positive X-direction; Fig. A) of a first lead ((144A); Fig. A, Paragraphs [0031] and [0032]) of the first plurality of leads (140A); and -making a second cut (cutting dam bar in area labeled (C2); Figs. A and 11, Paragraph [0035]) through the dam bar (146A) adjacent (along the X-axis) to a second side (side facing negative X-direction; Fig. A) of the first lead (144A) of the first plurality of leads (140A), the second side of the lead opposite the first side of the lead. (Examiner notes that while describing the method, Lee states that the dam bars are removed in a “conventional manner” (Paragraph [0031]) or “conventionally” (Paragraph [0036]) and earlier states that in prior art they are “trimmed” (Paragraph [0028]). This would be known to one of ordinary skill in the art to mean “cut”- As an example see Paragraph [0001] of Bin Abdul Aziz which identifies that within the art “standard dam bar cutting tools (e.g., punch and die systems) cut the dam bar material”. Compare to the instant application which states the use of a “punch tool” for making the cuts (Paragraph [0042])). Lee nor Bin Abdul Aziz explicitly teach: -singulating the semiconductor package from the leadframe strip, wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars Bai teaches a method of forming a semiconductor package ((1600); Fig. 16, Paragraph [0051]), comprising: -singulating the semiconductor package (e.g. (600); Figs. 6 and 7, Paragraph [0034]) from the leadframe strip ((102); Fig. 3, Paragraph [0026]), wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars (e.g. (116); Fig. 3, Paragraph [0034]) (See Paragraphs [0034] and [0051]) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Bai into the method of Lee as supported by Bin Abdul Aziz such that it further included singulating the semiconductor package from the leadframe strip, wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars. This would be due to the fact that doing so would produce the predictable result of simplifying the method by combining process steps (i.e. singulation and dam bar removal). For the following claim rejections, all references are directed towards Lee unless otherwise specified. For example, (146) refers to (Lee, (146)), while (Bai, (102)) refers to element (102) of Bai. Regarding Claim 2, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: -making the first cut (C1) comprises exposing a portion of the first lead (144A). (This is necessarily the case for the portion of the side of the lead (144A) that was connected to the section of the dam bar (146) removed.) Regarding Claim 3, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: -making the first cut (C1) comprises making the first cut adjacent (along the X-axis) to a third side (side facing negative X-direction; Fig. A) of a second lead (142A) of the first plurality of leads (140A). Regarding Claim 4, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 3, wherein: -making the first cut (C1) exposes a portion of the second lead (142A). (This is necessarily the case for the portion of the side of the lead (142A) that was connected to the section of the dam bar (146) removed.) Regarding Claim 5, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: -making the first cut (C1) comprises making the first cut parallel (i.e. along the Y-axis) to the first side of the first lead (side facing positive X-direction of (144A)). Regarding Claim 7, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: - the semiconductor package (SP1) comprises a flat lead package. (Lee identifies the method as used for SOP type leadframes (Paragraph [0040]) which includes IC packages where leads are not bent (i.e. flat lead) (Paragraph [0027])) Regarding Claim 8, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: - the semiconductor package (SP1) comprises a gullwing lead package. (Lee identifies the method as used for SOP type leadframes (Paragraph [0040]) which includes gullwing lead packages (Paragraph [0027])) Regarding Claim 9, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: -the first lead (144A) comprises a first lead tip (‘free end’ (145)/(145A); Fig. A, Paragraph [0019]) disposed between the first side of the first lead (side facing positive X-direction of (144A)) and the second side of the first lead (side facing negative X-direction of (144A)), and the first lead tip is plated (Paragraph [0038]). Regarding Claim 10, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: -wherein a portion of a side of a lead (e.g. free end (145A) of (144A); Fig. A, Paragraph [0019]) of the first plurality of leads (140A) is exposed (Examiner understands this as not in direct contact with another portion of the lead frame separate from other sides of the same lead- though this is a claim with a very broad limitation generally and many portions of the leads are applicable). Regarding Claim 11, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: - the leadframe comprises a plurality of openings (‘Openings’ consisting of ‘gaps’ e.g. (152), (154) and large gaps e.g. (LG1), (LG2); Fig. A, Paragraph [0034]) disposed adjacent (along the Y-axis) to the first lead (144A). Regarding Claim 12, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 11, wherein: -making the first cut (C1) comprises making the first cut through a first opening (LG1) of the plurality of openings (‘Openings’). Regarding Claim 13, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 11, wherein: -making the first cut (C1) comprises making the first cut along a first side (side facing positive X-direction; Fig. A) of a first opening (154) of the plurality of openings (‘Openings’), the first side disposed between a second side (side facing negative Y-direction; Fig. A) and a third side opposite the second side (side facing positive Y-direction; Fig. A), the second side of the opening forming a lead tip of the first lead (‘free end’ (145)/(145A); Fig. A, Paragraph [0019]). Regarding Claim 14, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 11, wherein: -making the first cut (C1) comprises making the first cut through the leadframe (in this case the portion of the dam bar (146A) which is a part of the leadframe (114); Figs. A and 11, Paragraphs [0030], [0031], and [0036]) between two openings (e.g. (152) and (154)) of the plurality of openings (‘Openings’). Regarding Claim 15, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 1, wherein: - a width of the first cut (C1) is equal to a distance between the first side of the first lead (side facing positive X-direction of (144A)) and a first side (side facing negative X-direction; Fig. A) of a second lead (142A). Regarding Claim 16, Lee teaches a method of manufacturing a semiconductor device (consisting of a plurality of semiconductor packages e.g. integrated circuit package (158), labeled (SP2) in Fig. A. Similarly for (SP1); Figs. A and 9-14, Paragraphs [0021], [0035], and [0036]) comprising: providing a leadframe strip ((110); Fig. A, Paragraph [0019]) with a first semiconductor package (SP1) and a second semiconductor package (SP2) attached to the leadframe strip ((110); via the leads, See also Fig. 9), the first semiconductor package having a first plurality of leads ((140)/(140A); Fig. A, Paragraphs [0030] and [0031]) extending from a first side (side facing positive Y-direction, Fig. A) of the first semiconductor package (SP1) towards the second semiconductor package (SP2), the second semiconductor package having a second plurality of leads ((130); Fig. A, Paragraphs [0030] and [0031]) extending from a second side (side facing negative Y-direction, Fig. A) of the second semiconductor package (SP2) toward the first semiconductor package (SP1), the first semiconductor package and the second semiconductor package disposed adjacent to each other; -making a first cut (cutting dam bar in area labeled (C1); Figs. A and 11, Paragraph [0035]) through a dam bar ((146)/(146A); Figs. A and 11, Paragraphs [0030], [0031], and [0035]) coupled to the first plurality of leads (140A) adjacent to a first side (side facing positive X-direction; Fig. A) of a first lead ((144A) of the first plurality of leads (140A); and -making a second cut (cutting dam bar in area labeled (C2); Figs. A and 11, Paragraph [0035]) through the dam bar (146A) adjacent (along the X-axis) to a second side (side facing negative X-direction; Fig. A) of the first lead (144A) of the first plurality of leads (140A), the second side of the lead opposite the first side of the first lead. (Examiner notes that while describing the method, Lee states that the dam bars are removed in a “conventional manner” (Paragraph [0031]) or “conventionally” (Paragraph [0035]) and earlier states that in prior art they are “trimmed” (Paragraph [0028]). This would be known to one of ordinary skill in the art to mean “cut”- As an example see Paragraph [0001] of Bin Abdul Aziz which identifies that within the art “standard dam bar cutting tools (e.g., punch and die systems) cut the dam bar material”. Compare to the instant application which states the use of a “punch tool” for making the cuts (Paragraph [0042])). Lee nor Bin Abdul Aziz explicitly teach: -singulating the first semiconductor package from the leadframe strip, wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars Bai teaches a method for manufacturing a semiconductor device ((1600); Fig. 16, Paragraph [0051]), comprising: -singulating the first semiconductor package (e.g. (600); Figs. 6 and 7, Paragraph [0034]) from the leadframe strip ((102); Fig. 3, Paragraph [0026]), wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars (e.g. (116); Fig. 3, Paragraph [0034]) (See Paragraphs [0034] and [0051]) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Bai into the method of Lee as supported by Bin Abdul Aziz such that it further included singulating the first semiconductor package from the leadframe strip, wherein singulating the semiconductor package from the leadframe strip comprises cutting the dam bars. This would be due to the fact that doing so would produce the predictable result of simplifying the method by combining process steps (i.e. singulation and dam bar removal). Regarding Claim 17, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 16, wherein: - making the first cut (C1) comprises making the first cut adjacent (along the X-axis) to a third side (side facing positive X-direction; Fig. A) of a second lead (134) of the second plurality of leads (130); Regarding Claim 18, Lee in view of Bai as supported by Bin Abdul Aziz teaches the method (Figs. A and 9-14, Paragraphs [0021] and [0036]) of Claim 16, wherein: - making the second cut (C2) comprises making the second cut adjacent (along the X-axis) to a fourth side (side facing negative X-direction; Fig. A) of a second lead (134) of the second plurality of leads (130). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRI MIHALIOV whose telephone number is (571)270-5220. The examiner can normally be reached weekdays 7:30 - 17:30 US Eastern Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DMITRI MIHALIOV/Examiner, Art Unit 2812 /DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Show 1 earlier event
Aug 26, 2025
Non-Final Rejection mailed — §103
Nov 18, 2025
Response Filed
Feb 25, 2026
Final Rejection mailed — §103
May 21, 2026
Request for Continued Examination
May 26, 2026
Response after Non-Final Action
Jun 16, 2026
Non-Final Rejection mailed — §103
Sep 15, 2026
Response Filed
Oct 02, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
74%
Grant Probability
99%
With Interview (+33.3%)
3y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 31 resolved cases by this examiner. Grant probability derived from career allowance rate.

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