Prosecution Insights
Last updated: April 19, 2026
Application No. 17/819,516

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §103§112
Filed
Aug 12, 2022
Examiner
SALAZ, SAMMANTHA KATELYN
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co. Ltd.
OA Round
3 (Non-Final)
95%
Grant Probability
Favorable
3-4
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allow Rate
18 granted / 19 resolved
+26.7% vs TC avg
Moderate +8% lift
Without
With
+7.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
28 currently pending
Career history
47
Total Applications
across all art units

Statute-Specific Performance

§103
44.9%
+4.9% vs TC avg
§102
31.2%
-8.8% vs TC avg
§112
14.5%
-25.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 19 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/11/2025 has been entered. Status of the Claims Claims 1-20 are pending in the application and are currently being examined. Claims 1, 17, and 19 have been amended. Claims 2, 5, 6, and 20 have been canceled. No new claims have been added. Response to Arguments Applicants' arguments involve discussing why the previously cited prior art documents fail to disclose the amended limitations. Examiner finds this argument persuasive and has brought in an additional reference to address the amended claim limitations. The applicability of the reference to the amended elements is discussed in the claim rejections below. Regarding the argument against the rejection of claim 19 under 35 U.S.C. § 112(a), Examiner finds the argument to not be persuasive. Specifically, claim 19 appeared to indicate the bonding layer is a multi-layered bonding layer, and Examiner fails to see how the mentioned areas of support indicate a multi-layered bonding layer. However, amendments to aforementioned claim have been made, and a secondary new matter issue has been introduced, while fixing the previous issue. As such, the previous rejection is withdrawn, but a new one is listed below. Regarding the claim objections, appropriate amendments have been made, thus all previous objections from the Final Rejection (9/18/2025) have been withdrawn. Information Disclosure Statement The information disclosure statements (IDS) submitted on 12/11/2025 are being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In particular, the limitation "wherein the bonding layer contains an alloy of a first metal, a second metal, and Cu" does not appear to be supported by either the written description or the drawings. The specification discusses forming the bonding layers by bonding layers 12 and 33 (as indicated by Applicant in paragraphs [0088] and [0043]-[0044]). However, layer 12 is not described as containing more than 1 metal [0044]. Layer 33 also described in a similar fashion, with no indication of being an alloy [0082]. It is unknown where the third metal (Cu) is introduced based on the written description. Claim 17 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In particular, the limitation "forming a bonding layer … contains an alloy of the first metal, the third metal, and Cu" does not appear to be supported by either the written description or the drawings. The specification discusses forming the bonding layers by bonding layers 12 and 33 (as indicated by Applicant in paragraphs [0088] and [0043]-[0044]). However, layer 12 is not described as containing more than 1 metal [0044]. Layer 33 also described in a similar fashion, with no indication of being an alloy [0082]. It is unknown where the third metal (Cu) is introduced based on the written description. Claim 19 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In particular, . The specification discusses forming the bonding layers by bonding layers 12 and 33 (as indicated by Applicant in paragraphs [0088] and [0043]-[0044]). However, layer 12 is not described as containing more than 1 metal [0044]. Layer 33 is also described in a similar fashion, with no indication of being an alloy [0082]. It is unknown where the third metal (Cu) is introduced based on the written description. Claim 19 also states, “wherein the support member includes a surface layer containing Ag and Cu” and there is no indication that the surface layer 12 is in itself an alloy [0044]. Claim Rejections - 35 USC § 103 Claim(s) 1, 7-14, and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martens et al. (US 2012/0273935 A1, hereafter Martens), in view of Tago et al. (US 2002/0093096 A1, hereafter Tago), and in further view of Sakai et al. (US 2018/0326542 A1, hereafter Sakai). Regarding claim 1, in Figs. 5a and 6a, Martens discloses a semiconductor device including: a semiconductor element (semiconductor chip, 320, [0026]); a support member (400/410, [0035]); a bonding layer (431, [0039], Note: Martens discloses the embodiment explicitly shown in Fig. 6a does not include the “optional” intermediate layer 314, which comprises nickel, see [0027]) interposed between the semiconductor element (320) and the support member (400/410), a first layer (314, nickel [0027]) interposed between the bonding layer (431) and the semiconductor element (320); a second layer (i.e., an intermetallic compound layer formed by the “optional” intermediate layer 314 and layer 316, see Fig. 5a, which will be a nickel/tin intermetallic compound layer), wherein the bonding layer (431) contains an alloy of a first metal, and a second metal, and Cu (while Martens does not show it in Fig. 6A, they describe a ternary layer between layers 431 and 432 in which Cu, Sn, and Ag exist [0039]. As this is directly involved in the formation of bonding layer 431, one of ordinary skill in the art would reasonably assume it is a part of the bonding layer, making the bonding layer comprising an alloy of the first metal, second metal, and Cu), wherein the first layer 314 contains a third metal (Ni, [0027]), wherein the second layer (intermetallic compound of nickel/tin, Ni/Sn) contains an alloy of the first metal (Sn) and the third metal (Ni); wherein the first metal is Sn [0039], wherein the second metal is Ag [0039], and wherein the third metal is Ni [0027]. Martens does not explicitly disclose an embodiment in which the optional intermediate layer 314, which is nickel, is incorporated when the bonding layer is formed; however, note the materials for the elements shown in Fig. 5a, wherein Martens discloses layer 312 is copper [0027], layer 314 is nickel [0027], and layer 316 is tin [0028]. Accordingly, after a bonding process that explicitly incorporates the nickel intermediate layer 314, these three layers will form at least a nickel/tin intermetallic compound layer. Furthermore, Martens is silent as to whether or not the first (nickel) layer 314 would remain such that the second layer (intermetallic compound layer of nickel/tin) is interposed between the bonding layer (431) and the first layer (314). Tago teaches, during a bonding process using similar materials (copper, nickel and tin) as in Martens, a tin/silver solder ball 9 (see Fig. 2 and [0071]) and a copper layer 8 [0072] will form a combination of nickel/tin intermetallic compound and copper/tin intermetallic compound. Tago discloses the bonded structured (in Fig. 1) shows that a majority of the original nickel/tin solder remains after the bonding process, such that tin in the original solder 9 remains and the bonded region contains the combination of intermetallic compound layers. Therefore, it would have been obvious to one of ordinary skill in the art to explicitly incorporate the intermediate nickel layer (314) disclosed by Martens and further incorporate a sufficiently thick nickel layer 314, as taught/shown by Tago, because the sufficiently thick nickel layer would ensure there is enough nickel to provide a complete and sufficiently strong intermetallic Ni/Sn bond in the bonded region, wherein incorporating the sufficiently thick nickel layer (314) would further provide a bonded structure comprising the second layer (nickel/tin) being interposed between the bonding layer (431) and the first layer (314). Martens fails to disclose a base layer interposed between the semiconductor element and the first layer, wherein the base layer contains Ti. However, Sakai teaches a similar stack in which an ohmic layer (103, [0024]) is disposed between a semiconductor device (101, [0023]) and a first layer (metallized layer, 104, [0025]). This ohmic layer is comprised of Ti [0024]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Martens in view of Tago to include the ohmic layer of Sakai in order to have good ohmic bonding between the semiconductor device and the layers below ([0024] of Sakai). Regarding claim 7, Martens in view of Tago and in view of Sakai discloses the device of claim 1, and in Fig. 6a, Martens discloses the bonding layer 431 is thicker than an intermetallic compound 432 (in a region directly beneath layer 310 in Fig. 6a); accordingly, when the optional intermediate layer 314 is incorporated, the nickel/tin intermetallic compound layer would likewise be thinner than the bonding layer 431. Regarding claim 8, Martens discloses the support member (400/410, [0035]) including a base material (410, copper, [0035]) and a surface layer (411, silver, [0039]) that is interposed between the base material and the bonding layer (431, Fig. 6a). Regarding claim 9, Martens discloses the surface layer (411, Fig. 6a) is thinner than the base material 430. Regarding claim 10, Martens discloses the surface layer (411, Fig. 6a) contains Ag. Regarding claim 11, Martens discloses the base material (410, [0035]) contains Cu. Regarding claim 12, Martens discloses the surface layer (411, Fig. 6a) protrudes outward from the semiconductor element (semiconductor chip, 320) when viewed in a thickness direction (top-down view as in Fig. 6a) of the support member 400/410. Regarding claim 13, Martens discloses a portion of the surface layer (411) protrudes from the semiconductor element (semiconductor chip, 320, Fig. 6a) when viewed in the thickness direction (top-down view as in Fig. 6a) includes a first surface (e.g., a top surface of the highest peak in the wavy top surface of layer 411) facing the thickness direction. Regarding claim 14, Martens discloses the bonding layer (431, Fig. 6a) including a portion (e.g., a bottom surface of layer 431 located in a valley of the wavy top surface of layer 411) located closer to the base material (410, Fig. 6a) than the first surface (e.g., a top surface of the highest peak in the wavy top surface of layer 411) in the thickness direction (see annotated Fig. 2). Regarding claim 17, in Figs. 5a, 6a, and 7 Martens discloses a method of manufacturing a semiconductor device, comprising: providing a semiconductor element (320, Fig. 5a and [0026 and 0035]) comprising: a semiconductor layer (inherent within element 320, [0026]), a first layer (316, [0027]) containing a first metal (Sn, [0028]), and a second layer (314, [0027]) containing a second metal (Ni, [0027]); providing a support member (400/410/411, [0035]) containing a third metal (Ag, [0035]) at least in a surface layer (411, [0039]) of the support member (400/410/411); forming a bonding layer (431, [0039]) that is interposed between the semiconductor layer (within 320) and the support member (400/410/411) and contains an alloy of the first metal, the third metal, and CU (while Martens does not show it in Fig. 6A, they describe a ternary layer between layers 431 and 432 in which Cu, Sn, and Ag exist [0039]. As this is directly involved in the formation of bonding layer 431, one of ordinary skill in the art would reasonably assume it is a part of the bonding layer, making the bonding layer comprising an alloy of the first metal, second metal, and Cu), by contacting and heating the first layer and the surface layer [0039]; forming a third layer (314, nickel [0027]), from the second layer 314 (Note: In [0029], Martens discloses layers 310, 314 and 316 are formed/deposited within openings of a photoresist layer, i.e., during this forming/depositing process, a first/lower portion of layer 314 is the second layer of the current claim, and a second/upper/final portion of layer 314, as viewed in Fig. 5a, is the third layer of the current claim), interposed between the bonding layer (431) and the semiconductor layer (within element 320); and forming a fourth layer (i.e., an intermetallic compound layer formed by “optional” intermediate layer 314 and layer 316, see Fig. 5a, which will be a nickel/tin intermetallic layer). wherein the third layer (upper portion of 314 in Fig. 5a) contains the second metal (Ni, [0027]), wherein the fourth layer contains an alloy of the first metal (Sn) and the second metal (Ni), wherein further the first metal is Sn (see above instances of first metal), wherein further the second metal is Ni (see above instances of second metal), and wherein further the third metal is Ag (see above instances of third metal). Martens does not explicitly disclose an embodiment in which the optional intermediate layer 314, which is nickel, is incorporated when the bonding layer is formed; however, note the materials for the elements shown in Fig. 5a, wherein Martens discloses layer 312 is copper [0027], layer 314 is nickel [0027], and layer 316 is tin [0028]. Accordingly, after a bonding process that explicitly incorporates the nickel intermediate layer 314, these three layers will form at least a nickel/tin intermetallic compound layer. Furthermore, Martens is silent as to whether or not the third (upper portion of) layer 314 would remain such that the fourth layer (intermetallic compound layer of nickel/tin) is interposed between the third layer (upper portion of 314) and bonding layer (431). Tago teaches, during a bonding process using similar materials (copper, nickel and tin) as in Martens, a tin/silver solder ball 9 (see Fig. 2 and [0071]) and a copper layer 8 [0072] will form a combination of nickel/tin intermetallic compound and copper/tin intermetallic compound. Tago discloses the bonded structured (in Fig. 1) shows that a majority of the original nickel/tin solder remains after the bonding process, such that tin in the original solder 9 remains and the bonded region contains the combination of intermetallic compound layers. Therefore, it would have been obvious to one of ordinary skill in the art to explicitly incorporate the intermediate nickel layer (314) disclosed by Martens and further incorporate a sufficiently thick nickel layer 314, as taught/shown by Tago, because the sufficiently thick nickel layer would ensure there is enough nickel to provide a complete and sufficiently strong intermetallic Ni/Sn bond in the bonded region, wherein incorporating the sufficiently thick nickel layer (314) would further provide a bonded structure comprising the fourth layer (intermetallic compound layer of nickel/tin) being interposed between the third layer (upper portion of 314) and bonding layer (431). Martens fails to disclose a base layer interposed between the semiconductor element and the first layer, wherein the base layer contains Ti. However, Sakai teaches a similar stack in which an ohmic layer (103, [0024]) is disposed between a semiconductor device (101, [0023]) and a first layer (metallized layer, 104, [0025]). This ohmic layer is comprised of Ti [0024]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Martens in view of Tago to include the ohmic layer of Sakai in order to have good ohmic bonding between the semiconductor device and the layers below ([0024] of Sakai). Regarding claim 18, Martens (in view of Tago) discloses the method of Claim 17, wherein in the formation of the bonding layer (431, [0039]), the support member (400/410/411), [0035]) is heated, and then the first layer (316, Fig. 5a) and the surface layer (411 [0035], which is plated onto the pad 410 prior to the heating/bonding step) are brought into contact with each other [0023]. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martens, in view of Tago, in view of Sakai, and in further view of Mukherjee et al. (US 2018/0044782 A1, hereafter Mukherjee). Regarding claim 19, Martens discloses a semiconductor element including: a semiconductor element (semiconductor chip, 320, [0026]); a support member (400/410, [0035]); a bonding layer (431/432, Fig. 6a and [0039]) interposed between the semiconductor element (320) and the support member (400/410); a first layer (an intermetallic compound layer formed by the “optional” intermediate layer 314 and layer 316, see Fig. 5a and [0027], which will be a nickel/tin intermetallic compound layer) interposed between the bonding layer (431/432) and the semiconductor element (320) –Note: Martens does not explicitly show an embodiment in which the optional intermediate layer 314, which is nickel, is incorporated when the bonding layer is formed; However, note in Fig. 5a, Martens discloses layer 312 is copper [0027], layer 314 is nickel [0027], and layer 316 is tin [0028]; accordingly, after a bonding process, these three layers will form at least a nickel/tin intermetallic compound layer, as will be evidenced by Tago. Tago discloses, in Fig. 2, a tin/silver solder ball 9 [0071] and a copper layer 8 [0072] are provided; and in Fig. 1, Tago further shows the result after a bonding process is performed, wherein Tago specifies [0096] that the copper, nickel, and tin materials will form a combination of nickel/tin intermetallic compound and copper/tin intermetallic compound. Therefore, when the optional intermediate, nickel layer 314 is incorporated, Martens anticipates a first layer that is a nickel/tin intermetallic compound layer, as is known in the art by Tago); and a base layer interposed between the first layer and the semiconductor element, wherein the support member includes a surface layer containing Ag and Cu, wherein the bonding layer (431/432) contains an alloy of Sn, Ag, and Cu (while Martens does not show it in Fig. 6A, they describe a ternary layer between layers 431 and 432 in which Cu, Sn, and Ag can exist [0039]. As this is directly between bonding layers 431 and 432, one of ordinary skill in the art would reasonably assume it is a part of the bonding layer, making the bonding layer containing an alloy of Sn, Ag, and Cu), by contacting and heating the first layer and the surface layer [0039]; wherein the first layer contains an alloy of Sn and Ni (i.e., a nickel/tin intermetallic compound layer). Martens in view of Tago do not teach a base layer interposed between the first layer and the semiconductor element, wherein the base layer contains Ti. However, Sakai teaches a similar stack in which an ohmic layer (103, [0024]) is disposed between a semiconductor device (101, [0023]) and a first layer (metallized layer, 104, [0025]). This ohmic layer is comprised of Ti [0024]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Martens in view of Tago to include the ohmic layer of Sakai in order to have good ohmic bonding between the semiconductor device and the layers below ([0024] of Sakai). Martens in view of Tago and in view of Sakai fail to teach the support member includes a surface layer containing Ag and Cu, (Martens teaches a plating of only Ag (411, [0039]). However, Mukherjee teaches amorphous thin films, in particular comparing Ag-Cu films with those of pure Ag or pure Cu. Mukherjee discusses that Ag-Cu thin films are preferred as they provide good adhesion and good electro-migration resistance [0007]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Martens in view of Tago and in view of Sakai by replacing the Ag layer taught by Martens (411) with an Ag-Cu layer as taught by Mukherjee in order to improve electrical conductivity of the device ([0007] of Mukherjee) Claim(s) 3 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martens (in view of Tago and in view of Sakai) as applied to claim 1 above, and further in view of Kao et al. (US 2003/0132271 A1, hereinafter, Kao). Regarding claim 3, while Martens (in view of Tago and in view of Sakai) discloses a bonding layer containing Sn and Ag, neither explicitly discloses the bonding layer containing Ag3Sn. However, Kao is cited to show that tin (Sn) and silver (Ag) will react to form Ag3Sn (see Kao, [0031]). Therefore, one of ordinary skill in the art would have readily recognized that the tin/silver bonding layer 431 (in Martens) contains Ag3Sn because Kao shows tin and silver readily react to form Ag3Sn. Regarding claim 4, Ag has an atomic mass of 107.87 au, and Sn has an atomic mass of 118.71 au; therefore, Ag3Sn readily has a ratio of Ag of 73 mass% or more. Claim(s) 15 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martens (in view of Tago and in view of Sakai) as applied to claim 1 above, and further in view of Haga (US 2012/0205790 A1). Regarding claim 15, Martens (in view of Tago and in view of Sakai) does not disclose a sealing resin or the support member including a plurality of recesses recessed from the first surface. Haga teaches, in a device package device incorporating a leadframe similar to that of Martens, discloses a sealing resin (resin package, 6, [0068]) that covers a semiconductor element (semiconductor chip, 2, [0068]) and at least a portion of a support member (lead frame, 14, [0068]), wherein the support member (14) includes a plurality of recesses (minute pin recesses, 34, [0077-0078]) recessed from the first surface (visible portion of lead frame, 14). It would have been obvious to one of ordinary skill in the art to modify Martens (in view of Tago) by incorporating a sealing resin that fills recesses in the leadframe and protects the semiconductor element, as taught by Haga, because the modification could provide a stronger package that protects the semiconductor element from the environment. Regarding claim 16, does not explicitly disclose the recesses penetrate a surface layer and reach a base material. However, the recesses in Fig. 1 of Haga are from 10-50 µm [0078]. When the resin and leadframe, as taught by Haga, are combined with Martens (in view of Tago), the copper layer 410 of Martens plated with Ag (411) with a thickness of 1µm to 4µm (see Martens [0040]), the recesses of Haga would obviously penetrate the surface and reach the base material, as required by the claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMMANTHA K SALAZ whose telephone number is (571)272-2484. The examiner can normally be reached Monday - Friday 8:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMMANTHA K SALAZ/Examiner, Art Unit 2892 /ERIC W JONES/Primary Examiner, Art Unit 2892
Read full office action

Prosecution Timeline

Aug 12, 2022
Application Filed
Apr 03, 2025
Non-Final Rejection — §103, §112
Jul 09, 2025
Response Filed
Sep 15, 2025
Final Rejection — §103, §112
Dec 11, 2025
Request for Continued Examination
Dec 29, 2025
Response after Non-Final Action
Jan 06, 2026
Non-Final Rejection — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12575142
SEMICONDUCTOR DEVICE INCLUDING ELEMENT ISOLATION INSULATING FILM HAVING THERMAL OXIDE FILM
2y 5m to grant Granted Mar 10, 2026
Patent 12568650
PROFILE ENGINEERING FOR DEEP TRENCHES IN A SEMICONDUCTOR DEVICE
2y 5m to grant Granted Mar 03, 2026
Patent 12568740
DISPLAY APPARATUS WITH REDUCED NON-DISPLAY AREA
2y 5m to grant Granted Mar 03, 2026
Patent 12560574
ELECTROLYTE-BASED FIELD EFFECT TRANSISTOR AND ASSOCIATED METHOD OF FABRICATION
2y 5m to grant Granted Feb 24, 2026
Patent 12550534
DISPLAY SUBSTRATE AND ELECTRONIC APPARATUS HAVING CONCAVE POINTS WITHIN GAP BETWEEN PIXEL REGIONS
2y 5m to grant Granted Feb 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+7.7%)
3y 4m
Median Time to Grant
High
PTA Risk
Based on 19 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month