DETAILED ACTION
Claims 1, 11, and 17 have been amended. Claims 1-20 remain pending in the application.
Claims 1, 11 and 17 are independent.
This action is final.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment and Arguments
Applicant's arguments regarding rejections directed to amended claims under 35 U.S.C. § 103 have been fully considered but in moot in view of new ground of rejection.
Applicant amended independent claims to further specify:
determining a first plurality of etch rates corresponding to a first plurality of locations on the first substrate based on the first profile map;
processing data associated with the first plurality of etch rates using a model, wherein the model outputs, based on the first plurality of etch rates, a first estimated substrate placement value for a placement of the first substrate relative to one or more components of the substrate support and multiple estimated surface profiles associated with multiple estimated placement locations on the substrate support;
determining a recommended placement for substrates on the substrate support based on the first estimated substrate placement value and the multiple estimated placement locations.
The CHEN US 20080080845 A1 is introduced in view of new ground of rejection. The teachings of KANG, Sakamoto, and Yamaguchi as disclosed in the previous office action are hereby incorporated by references to the extent applicable to the amended claims.
Another iteration of claim analysis has been made. Referring to the corresponding sections of the claim analysis below for details.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-11, 14-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over CHEN US 20080080845 A1 in view of KANG US 20220270904 A11
Regarding claim 11, CHEN teaches a system comprising:
a process chamber (Fig .1 [0034] [0047] PM modules etching wafers with a substrate chuck);
a substrate measurement tool ([0045] metrology tool 116);
a memory ([0032] computer readable medium); and
a processing device coupled to the memory ([0032] computer), the processing device to:
cause a first substrate to be processed in the process chamber according to a recipe while the first substrate is supported by a substrate support of the process chamber (Fig. 6 [0034] [0066] substrate is geometrically centered with transfer module program i.e. “a recipe” and processed inherently by a recipe), wherein the first substrate comprises a first surface profile after the processing (Figs. 2B & 6-7 [0054] [0055] [0064] – [0067] the film surface profile after etching process);
generate a first profile map of the first surface profile of the first substrate using the substrate measurement tool (Figs. 2B & 6-7 [0067] – [0068] the etched film thickness is measured at the predetermined locations);
determining a first plurality of etch rates corresponding to a first plurality of locations on the first substrate based on the first profile map (Figs. 2B & 6-7 [0069] – [0071] etch rate profile of teach data location is calculated);
processing data associated with the first plurality of etch rates using a model; determine a recommended placement for substrates on the substrate support (Figs. 2B & 6-7 [0072] – [0075] the created etch profiled data are analyzed by models to determine the parameters for substate offset); and
cause one or more of the substrates to be placed on the substrate support according to the recommended placement ([0124] robotic arm is taught to offset a substrate for next run).
CHEN does not explicitly further teach:
the model outputs, based on the first plurality of etch rates, a first estimated substrate placement value for a placement of the first substrate relative to one or more components of the substrate support and multiple estimated surface profiles associated with multiple estimated placement locations on the substrate support; and the recommended placement for substrates on the substrate support is determined based on the first estimated substrate placement value and the multiple estimated placement locations.
KANG explicitly teaches in an analogous art that:
the model outputs, based on the first plurality of etch rates, a first estimated substrate placement value for a placement of the first substrate relative to one or more components of the substrate support and multiple estimated surface profiles associated with multiple estimated placement locations on the substrate support; and the recommended placement for substrates on the substrate support is determined based on the first estimated substrate placement value and the multiple estimated placement locations ([0048] teaching position i.e. wafer placement position, Figs. 8, 14-17 [0079] [0080] [0093] – [0099] based on the measurement profile result of MP1 to MP24, the eccentricity state is analyzed i.e. “first estimated substrate placement value”, the eccentricity state analysis result is input to the machine learning model; the machine learning model is trained based on the input and wafer profile results, teach position (defined by a pair of fork position RT and FB) within an acceptable range (Fig. 16 constraint condition) are used as an input to the optimization model that uses the trained machine learning model, for each run, the optimization model calculates an evaluation function J:
Evaluation Function J=f (residual difference from an Edge average of a current Run, model RT FE vs Unevenness of Each Point, movement change amount);
The "residual difference from an Edge average of a current Run" is the residual difference between the average film thickness of the current Run and the fill thickness of the monitor locations MP1 to M24 i.e. “estimated surface profiles” corresponding to current pair of RT and FB i.e. “associated with estimated placement location”; the "movement change amount" of the evaluation function J represents the RT movement amount and the FB movement amount set in the next Run; The optimization model search the pairs of RT and FB within the constrain defined in the table of Fig. 16 with multiple runs, each run with different pairs of RT and FB, calculation corresponding residual difference from an Edge average of a current Run, i.e. “multiple estimated surface profiles, each one of the multiple estimated surface profiles associated with a corresponding estimated placement location of multiple estimated placement locations on the substrate support”, and finds the pair that have the minimum evaluation function J).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN to incorporate the teachings of KANG, because they all directed to wafer process system, to make the system wherein the model outputs, based on the first plurality of etch rates, a first estimated substrate placement value for a placement of the first substrate relative to one or more components of the substrate support and multiple estimated surface profiles associated with multiple estimated placement locations on the substrate support; and the recommended placement for substrates on the substrate support is determined based on the first estimated substrate placement value and the multiple estimated placement locations. One of ordinary skill in the art would have been motivated to do this modification so as to optimize the substrate placement, as KANG teaches in [0099].
Regarding claim 14, CHEN further teaches determining a center of the substrate support; and cause the first substrate to be aligned with the center of the substrate support prior to the processing of the first substrate ([0034] a test substrate geometrically centered over the chuck).
Regarding claim 15, CHEN further teaches for the recommended placement for the substrates a center of the substrates is offset from the center of the substrate support ([0034] a substrate offset from the chuck’s hardware center to the chuck’s process center).
Regarding claim 16, KANG further teaches the model comprises a trained machine learning model, and wherein the processing device is further to: train a machine learning model to produce the trained machine learning model, wherein the machine learning model is trained using data from a plurality of processed substrates processed according to the recipe ([0080] the learning function learns based on the inputs of processing results).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN to incorporate the teachings of KANG, because they all directed to wafer process system, to make the system wherein the model comprises a trained machine learning model, and wherein the processing device is further to: train a machine learning model to produce the trained machine learning model, wherein the machine learning model is trained using data from a plurality of processed substrates processed according to the recipe. One of ordinary skill in the art would have been motivated to do this modification so as to optimize the substrate placement, as KANG teaches in [0099].
Regarding claim 17, it is directed to non-transitory computer readable medium comprising instructions of carrying out the system with similar limitations as set forth in claim 11. Since CHEN and KANG teach the claimed system, they teach the instructions for implementing the system.
Regarding claim 20, it is directed to non-transitory computer readable medium comprising instructions of carrying out the system with similar limitations as set forth in claim 16. Since CHEN and KANG teach the claimed system, they teach the instructions for implementing the system.
Regarding claims 1 and 4-5, they are directed to a method of carrying out the system with similar limitations as set forth in claims 11 and 14-15, respectively. Since CHEN and KANG teach the claimed system, they teach the method steps for implementing the system.
Regarding claim 6, CHEN further teaches determining a substrate handoff position based on the recommended placement, wherein the substrate handoff position ([0034] the robotic arm is programmed with the coordinates of the chuck’s process center to facilitate centering of substates over the chuck’s process center); and KANG further teaches the substrate handoff position is an offset for a robot arm from a first robot handoff orientation to a second robot handoff orientation ([0097] [0098] output the movement change amount for FB and RT for next run).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN to incorporate the teachings of KANG, because they all directed to wafer process system, to make the method wherein the substrate handoff position is an offset for a robot arm from a first robot handoff orientation to a second robot handoff orientation. One of ordinary skill in the art would have been motivated to do this modification so as to optimize the substrate placement, as KANG teaches in [0099].
Regarding claim 7, KANG further teaches the first surface profile comprises a first thickness profile ([0079] film thickness of MP1 to MP24).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN to incorporate the teachings of KANG, because they all directed to wafer process system, to make the method wherein the first surface profile comprises a first thickness profile. One of ordinary skill in the art would have been motivated to do this modification so as to optimize the substrate placement based on film thickness profile, as KANG teaches in [0099].
Regarding claim 8, KANG further teaches determining a first etch rate profile of the first substrate for an etch rate profile proximate an edge of the first substrate based on the first profile map, wherein the model outputs the first estimated substrate placement value based on the first etch rate profile ([0096] [0097] the evaluation function J is based on the residual difference from an Edge average of a current run that is based on the edge profile MP1 to MP24).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN to incorporate the teachings of KANG, because they all directed to wafer process system, to make the method wherein determining a first etch rate profile of the first substrate for an etch rate profile proximate an edge of the first substrate based on the first profile map, wherein the model outputs the first estimated substrate placement value based on the first etch rate profile. One of ordinary skill in the art would have been motivated to do this modification so as to optimize the substrate placement based on film thickness profile, as KANG teaches in [0099].
Regarding claim 9, CHEN further teaches the model comprises at least one of a trained machine learning model ([0080] the learning function learns based on the inputs of processing results), a physics-based model ([0072] – [0074] a curve-fitting is applied to the etch profile to obtain parameters for the substrate offset), or a statistical model.
Regarding claim 10, it is directed to a method of carrying out the system with similar limitations as set forth in claim 16. Since CHEN and KANG teach the claimed system, they teach the method steps for implementing the system.
Claims 2, 12 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over CHEN in view of KANG as applied to claims 1, 4-11, 14-17 and 20 above, further in view of Yamaguchi US 20140087565 A12.
Regarding claims 2, 12 and 18, CHEN further teaches cause a second substrate to be placed in the process chamber according to the recommended placement ([0075] subsequent substrate is placed on the substrate chuck with offset).
Neither CHEN nor KANG explicitly further teaches the one or more components of the substrate support comprise a process kit ring, and wherein the second substrate is positioned within an inner diameter of the process kit ring in accordance with the recommended placement.
Yamaguchi explicitly teaches in an analogous art that the one or more components of the substrate support comprise a process kit ring, and wherein the second substrate is positioned within an inner diameter of the process kit ring in accordance with the recommended placement ([0141] ring holder internal diameter greater than the wafer diameter).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN and KANG to incorporate the teachings of Yamaguchi, because they all directed to wafer processing system, to make the system wherein the one or more components of the substrate support comprise a process kit ring, and wherein the second substrate is positioned within an inner diameter of the process kit ring in accordance with the recommended placement. One of ordinary skill in the art would have been motivated to do this modification so as to hold the wafer in processing chamber, as Yamaguchi teaches in [0141].
Claims 3, 13 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over CHEN in view of KANG as applied to claims 1, 4-11, 14-17 and 20 above, further in view of Sakamoto US 20040159284 A13.
Regarding claims 3, 13 and 19, neither CHEN nor KANG explicitly further teaches causing the second substrate to be processed in the process chamber according to the recipe, wherein the second substrate comprises a second surface profile after the processing;
generate a second profile map of the second surface profile using the substrate measurement tool;
process data from the second profile map using the model, wherein the model outputs a second estimated substrate placement value;
compare the second estimated substrate placement value with the first estimated substrate placement value; and update the recommended placement based on the comparing ([0087] – [0098] the placement optimization is repeated, the correction amount with respect to previous run are used for the next run placement).
Sakamoto explicitly teaches in an analogous art that causing the second substrate to be processed in the process chamber according to the recipe, wherein the second substrate comprises a second surface profile after the processing;
generate a second profile map of the second surface profile using the substrate measurement tool;
process data from the second profile map using the model, wherein the model outputs a second estimated substrate placement value;
compare the second estimated substrate placement value with the first estimated substrate placement value; and update the recommended placement based on the comparing ([0087] – [0098] the placement optimization is repeated, the correction amount with respect to previous run are used for the next run placement).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified CHEN and KANG to incorporate the teachings of Sakamoto, because they all directed to wafer processing system, to make the system wherein causing the second substrate to be processed in the process chamber according to the recipe, wherein the second substrate comprises a second surface profile after the processing; generate a second profile map of the second surface profile using the substrate measurement tool; process data from the second profile map using the model, wherein the model outputs a second estimated substrate placement value; compare the second estimated substrate placement value with the first estimated substrate placement value; and update the recommended placement based on the comparing. One of ordinary skill in the art would have been motivated to do this modification so as to wafers are held on optimum position, as Sakamoto teaches in [0099].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Tang whose telephone number is (571)272-7437. The examiner can normally be reached M-F 7:30-4 EST.
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/M.T./Examiner, Art Unit 2115
/KAMINI S SHAH/Supervisory Patent Examiner, Art Unit 2115
1 KANG is the prior art of record
2 Yamaguchi is the prior art of record
3 Sakamoto is the prior art of record
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