Prosecution Insights
Last updated: April 19, 2026
Application No. 17/822,421

MICROELECTRONIC DEVICES INCLUDING STADIUM STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS

Non-Final OA §103
Filed
Aug 25, 2022
Examiner
BERRY, PAUL ANTHONY
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology, Inc.
OA Round
3 (Non-Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
3y 4m
To Grant
91%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allow Rate
26 granted / 28 resolved
+24.9% vs TC avg
Minimal -2% lift
Without
With
+-2.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
51 currently pending
Career history
79
Total Applications
across all art units

Statute-Specific Performance

§103
51.5%
+11.5% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
21.9%
-18.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 28 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/20/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claims 1-27 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Allowable Subject Matter The indicated allowability of claims 17-22 is withdrawn in view of the newly discovered reference to Lee (US 2017/0256551 A1). Rejections based on the newly cited reference follow. Claim Rejections - 35 USC § 103 The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 9 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lee (US 2017/0256551 A1, hereinafter Lee ‘551) in view of Park et al. (US 2017/0062337 A1, hereinafter Park ‘337), in view of the following arguments. PNG media_image1.png 509 1044 media_image1.png Greyscale PNG media_image2.png 579 860 media_image2.png Greyscale With respect to Claim 1 Lee ‘551 discloses a microelectronic device (Fig 1A-2), comprising: a stack structure (102, Fig 1A, Para [0024]) comprising tiers (108, Fig 1A, Para [0024]) each including conductive material (126, Fig 1E, Para [0044] discloses replacing sacrificial layer 106 with conductive layer 126, conductive material is shown as 226 in Fig 2, Para [0063] discloses Fig 2 as having features of device 100 of Fig 1A-1G) vertically neighboring (disclosed in Fig 1E) insulative material (104, Fig 1E, Para [0024]), the stack structure (102) divided into blocks horizontally extending in parallel (blocks horizontally extending shown in annotated Fig 1G of Lee ‘551) in a first direction (X direction as shown in Fig 1G) and separated from one another (disclosed in annotated Fig 1G of Lee ‘551) in a second direction (Y direction as shown in Fig 1G) orthogonal to the first direction (directional axis of Fig 1G discloses Y as orthogonal to X) by insulative slot structures (128, Fig 1G, Para [0046]), at least one of the blocks (left block as shown in annotated Fig 1G of Lee ‘551) comprising: a lower stadium structure (218c, Fig 2, Para [0066]) having steps (216 of 218c, Fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of some of the tiers (conductive tier 226 in region of 218c, Fig 2, Para [0070]); and an upper stadium structure (218a, Fig 2, Para [0066]) vertically overlying (Para [0066] discloses 218a positioned higher in Z direction than 218c) the lower stadium structure (218c) and having additional steps (216 of 218a, fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of some other of the tiers (conductive tier 226 in region of 218a, Fig 2, Para [0070]) vertically overlying (Fig 2 and Para [0066] discloses 218a positioned higher in Z direction than 218c) the some of the tiers (conductive tier 226 in region of 218c), the additional steps (216 of 218a) of the upper stadium structure (218a) and; a group of conductive contact structures (multiple contact structures 134 on each step 116, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) within a horizontal area (tread of 116 in the x direction as shown in Fig 1F and disclosed in Para [0053]) of at least some of the additional steps (216 of 218a, Note that 216 is the stair feature in Fig 2 and Para [0063] discloses 200 has the features of device 100 of Fig 1A-1G) of the upper stadium structure (218a) of the at least one of the blocks (left block as shown in annotated Fig 1G of Lee ‘551). But Lee ‘551 fails to explicitly disclose having greater tread widths in the first direction than the steps of the lower stadium structure; Nevertheless in a related endeavor, (Fig 5 of Park ‘337), Park ‘337 teaches having greater tread widths (W4/W5, Fig 5 of Park ‘337, Para [0043]) in the first direction (horizontal as shown in annotated Fig 5 of Park’337) than the steps (112a/112b) of the lower stadium structure (110b/110a)(Para [0043] of Park ‘337 discloses “the widths (e.g., the first width W1 through the fifth width W5) of the steps 112 gradually increase from the first step 112a to the fifth step 112e, therefore the tread widths of 112e/112d are greater than 112b/112a); Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Park ‘337’s teaching of having greater tread widths in the first direction than the steps of the lower stadium structure into Lee ‘551’s device. Lee ‘551 teaches a memory structure with multiple stair step structures in stadium formations and is open to the widths of the treads of the stairs being different (Para [0036], “at least one of the steps 116 exhibits different dimensions (e.g., one or more of a different width, a different length, and a different height) than at least one other of the steps 116”. Lee ‘551 further discloses the stadium stair step regions are multiples of structure 218. (Para [0066]). Park ‘337 also teaches a memory structure with stair step region and teaches that tread widths of steps in the upper portion of that stair step region maybe be different than widths of treads in the lower portion of that stair step region as described above. The ordinary artisan would have been motivated to modify Lee ‘551 in the manner set forth above, at least, because Park ‘337 teaches details on the different tread widths disclosed by Lee’551 (Para [0036]) and also because, as Park ‘337 teaches in Para [0043] this spacing provides a gradual increase in the distances between contact structures. Creating space between the contacts can reduce the possibility of parasitic capacitance between contacts. As incorporated, the teaching of Park ‘337 of having stair tread widths of upper stairs with different widths than tread widths of lower stairs would be used as the stair tread widths in the stair steps (216) in the upper and lower stadium structures (218a and 218c respectively) of Lee ‘551. This incorporation would result in the treads of the upper stairs in upper stadium 218a having widths different (greater tread widths) than tread widths of the lower stairs in lower stadium 218c of Lee ‘551. With respect to Claim 9 Lee ‘551 as modified by Park ‘337 discloses all limitations of the microelectronic device of claim 1, and Lee ‘551 further discloses wherein at least some other of the additional steps (216 of 218a) of the upper stadium structure (218a) individually have only one of the conductive contact structures (134) within a horizontal area thereof (Para [0053] of Lee ‘551 discloses contacts on each step as one or more). Claims 3-6, 10-14, 16-17, and 24-27 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lee ‘551 in view of Park ‘337 in further view of Guo et al. (US 2022/0139950 A1, hereinafter Guo ‘950), in view of the following arguments. With respect to Claim 3 Lee ‘551 as modified by Park ‘337 discloses all limitations of the microelectronic device of claim 1, and Lee ‘551 as modified by Park ‘337 discloses further wherein the group of the conductive contact structures (multiple contact structures 134 on each step 116) within the horizontal area (tread of 116 in the x direction) of one additional step (one of step 216) of the at least some of the additional steps (216 of 218a) comprise at least three of the conductive contact structures (Para [0053] discloses one or more contact 134 on each step 134), But Lee ‘551 as modified by Park ‘337 fails to explicitly disclose at least one of the at least three of the conductive contact structures offset in the first direction from at least one other of the at least three of the conductive contact structures. Nevertheless, in a related endeavor (Fig 1-10B of Guo ‘950), Guo ‘950 teaches (in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”) and Guo ‘950 further teaches (Fig 5 of Guo ‘950) conductive structures (562/564, Fig 5 of Guo ‘950, Para [0115]) at least one (one of 564, Fig 5 of Guo ‘950) of the at least three (two of 562 and one 564) of the conductive contact structures (562/564) offset in the first direction (WL as shown in axis of Fig 5 of Guo ‘950) from at least one other (one of 564 to the left side of 500, Fig 5 of Guo ‘950) of the at least three of the conductive contact structures (two of 562 on right side of 500, Fig 5 of Guo ‘950 four 566)(any on 564 is offset in WL from 562 structures). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ’950’s teaching of at least one of the at least three of the conductive contact structures offset in the first direction from at least one other of the at least three of the conductive contact structures into Lee ‘551 as modified by Park ‘337’s device. Lee ‘551 as modified by Park ‘337 discloses multiple contacts on a stair step but is silent as to their physical arrangement on the step. Guo ‘950 teaches that contacts can be offset from each other. The ordinary artisan would have been motivated to modify conductive contact structures in the arrangement of Guo ‘950’s in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device and the spacing would reduce parasitic capacitance between the structures. As incorporated, the offset spacing arrangement of a plurality of contacts taught by Guo ‘950 would be used in the spacing arrangement of the plurality of contacts (multiple contact structures 134 on each step 116) of Lee ‘551 as modified by Park ‘337. With respect to Claim 4 Lee ‘551 as modified by Park ‘337 discloses all limitations of the microelectronic device of claim 1, and Lee ‘551 as modified by Park ‘337 further discloses wherein the group of the conductive contact structures (multiple contact structures 134 on each step 116) within the horizontal area (tread of 116 in the x direction as shown in Fig 1F and disclosed in Para [0053]) of one additional step (one additional step 216 of 218a) of the at least some of the additional steps (216 of 218a, Note that 216 is the stair feature in Fig 2 and Para [0063] discloses 200 has the features of device 100 of Fig 1A-1G) comprises: But Lee ‘551 as modified by Park ‘337 fails to explicitly disclose two of the conductive contact structures substantially aligned with one another in the first direction; and two other of the conductive contact structures substantially aligned with one another in the first direction and offset from the two of the conductive contact structures in the first direction. Nevertheless, in a related endeavor, (Fig 1-10B of Guo ‘950), Guo ‘950 teaches in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”) and Guo ‘950 further teaches two of the conductive contact structures (left two of 566, Fig 5 of Guo ‘950, Para [0116]) substantially aligned with one another in the first direction (WL as shown in Fig 5 of Guo ‘950); and two other of the conductive contact structures (right two of 566, Fig 5 of Guo ‘950, Para [0116]) substantially aligned with one another in the first direction (WL) and offset from the two of the conductive contact structures (left two of 566) in the first direction (WL). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s teaching of two of the conductive contact structures substantially aligned with one another in the first direction; and two other of the conductive contact structures substantially aligned with one another in the first direction and offset from the two of the conductive contact structures in the first direction in Lee ‘551 as modified by Park ‘337’s device. Lee ‘551 as modified by Park ‘337 discloses multiple contacts on a stair step but is silent as to their physical arrangement on the step. Guo ‘950 teaches that contacts can be aligned each other on steps. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device, provide additional conductive connections to increase the device functionality and the spacing would reduce parasitic capacitance between the structures. As incorporated, the two conductive contact structure arrangement of conductors (538) aligned with each other and two other conductive contact structures (566) as taught by Guo ’950 would be used as the arrangement of the conductive contacts (134) of Lee ‘551 as modified by Park ‘337 in the steps (216). With respect to Claim 5 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 4, and Guo ‘950 further discloses wherein both of the two of the conductive contact structures (538) are interposed in the second direction (BL) between the two other of the conductive contact structures. (Guo teaches in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”). Guo ‘950 further teaches an arrangement (Fig 5 of Guo ‘950) wherein both of the two of the conductive contact structures (564, Fig 5 of Guo ‘950, Para [0115]) are interposed in the second direction (BL) between the two other of the conductive contact structures (562, Fig 5 of Guo ‘950, Para [0115]). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the further teaching of Guo ‘950 of wherein both of the two of the conductive contact structures are interposed in the second direction between the two other of the conductive contact structures in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. The ordinary artisan would have been motivated to modify conductive contact structures in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device and the spacing would reduce parasitic capacitance between the structures. As incorporated, Guo ‘950’s additional teaching of the two other conductive contact structures (538 of Guo ‘950) interposed in the second direction between to other conductive contact structures (562 of Guo ‘950) would be used as the arrangement of conductive contacts (134) in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. With respect to Claim 6 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 5, and Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 further discloses wherein the two of the conductive contact structures are located relatively closer, in the first direction, to a vertically lower additional step of the at least some of the additional steps than the two other of the conductive contact structures. (as modified above, the right two conductive structures would be closer than the left two conductive structures to a vertically lower step as incorporated on a step on the left side of steps of 112e/112d of Park ‘337). With respect to Claim 10 Lee ‘551 as modified by Park ‘337 discloses all limitations of the microelectronic device of claim 1, but Lee ‘551 as modified by Park ‘337 fails to explicitly disclose further comprising additional insulative slot structures partially vertically extending through the at least one of the blocks and individually horizontally extending partially through the upper stadium structure in the first direction, the additional insulative slot structures individually interposed in the second direction between neighboring conductive contact structures of the group of the conductive contact structures. Nevertheless in a related endeavor (Fig 1-10B of Guo ‘950), Guo ‘950 teaches further comprising additional insulative slot structures (595/514, Fig 5 of Guo ‘950, Para [0109]) partially vertically extending (Fig 6 of Guo ‘950 discloses 595/514 partially vertically extending in structure) through the at least one of the blocks (203, Fig 2 of Guo ‘950, Para [0103]) Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s teaching of further comprising additional insulative slot structures partially vertically extending through the at least one of the blocks in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because, as Guo ‘950 teaches in Para [0110] these isolation slots help reduce parasitic capacitance between memory blocks. As incorporated, the teachings of Guo ‘950 to use additional insulative slot structure (595/514) would be used in the device of Lee ‘551 as modified by Park ‘337 so that they partially vertically extend through the at least one of the blocks (blocks of Lee ‘551 as modified by Park ‘337. In an additional embodiment of Guo ‘950 (Fig 8 of Guo ‘950), Guo ‘950 teaches insulative slot structures (895/814, Fig 8 of Guo ‘950, Para [120]) and individually horizontally extending partially through the upper stadium structure (880, Fig 8 of Guo ‘950) (Fig 8 of Guo ‘950 discloses a 895/814 horizontally extending partially through 880) in the first direction (WL), the additional insulative slot structures (895/814) individually interposed in the second direction (BL as shown in Fig 8 of Guo ‘950) (Fig 8 of Guo ‘950 discloses 895/814 individually interposed in BL direction) between neighboring conductive contact structures (538 on opposing sides of additional insulative slots) of the group of the conductive contact structures (895/814). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s further teaching of insulative slot structures and individually horizontally extending partially through the upper stadium structure in the first direction, the additional insulative slot structures individually interposed in the second direction between neighboring conductive contact structures of the group of the conductive contact structures in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides a design whereby a space is created to form conductive lines in to connect an upper structure as disclosed in Para (0120) of Guo ‘950 thereby adding additional functionality. As incorporated, the further teachings of Guo ‘950 to use the insulative slot structure (895/814) arrangement individually horizontally extending partially through the upper stadium structure between neighboring conductive contact structures (538 of Guo ‘950 as incorporated above) for the insulative structures (595/514 of Guo ‘950 as incorporated above) would be inserted between the conductive contacts (134) and would partially vertically extending through at least one block (blocks horizontally extending shown in annotated Fig 1G of Lee ‘551) in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. With respect to Claim 11 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 10, and Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 further discloses wherein the additional insulative slot structures comprise at least three of the additional insulative slot structures. (Para [0117] of Guo ‘950 discloses that additional structures 595/514 can be used, therefore an embodiment exits with three additional structure 595/514 and Lee ‘117 as modified by Guo ‘950 teaches one additional insulating slot structure horizontally extending partially through the upper stadium structure). MPEP § 2144.04 (VI)(B) cites In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) and further recites “…that mere duplication of parts has no patentable significance unless a new and unexpected result is produced”. With respect to Claim 12 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 10, and Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 further discloses wherein a path (Path of 595/514 as shown in Fig 5 of Guo ‘950 as incorporated above) in the first direction (WL as shown in Fig 5 of Guo ‘950) of at least one of the additional insulative slot structures (595/514 as incorporated above) is at least partially non-linear (Fig 5 of Guo ‘950 discloses structure 595/514 as non-linear). With respect to Claim 13 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 12, and Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 further discloses wherein the at least one of the additional insulative slot structures (595/514 as incorporated above) horizontally weaves between a row of the conductive contact structures (top row of structures 538 of 500, Fig 5 of Guo ‘950, Para 0117] as incorporated above) and an additional row of the conductive contact structures (second row from top of structures 538 of 500, Fig 5 of Guo ‘950, Para 0117] as incorporated above) (Fig 5 discloses 595/514 horizontally passing through contact structures) horizontally neighboring the row of the conductive contact structures (top row of structures 538 of 500) in the second direction (BL as shown in Fig 5 of Guo ‘950)(Fig 5 of Guo ‘950 discloses top row and second from top row horizontally neighboring in the BL direction by 595/514 as incorporated above), Guo ‘950 also teaches in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”) and Guo ‘950 further teaches (Fig 5 of Guo ‘950) conductive structures (562, Fig 5 of Guo ‘950, Para [0115]) conductive contact structures horizontally offset in the first direction (WL as shown in Fig 5 of Guo ‘950) from the conductive contact structures (564, Fig 5 of Guo ‘950, Para [0115]) of the additional row of the conductive contact structures (row of 564). (Guo ‘950 further discloses in Para [0117] “It is noted that the BSG cut structures and BSG segments can have any suitable number and have any suitable shapes, which are not limited in the present disclosure”). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to use the conductive contact structure arrangement of conductors (562/564) as further taught by Guo ’950 as the arrangement of the conductive contacts (538) of Guo ‘950 on the step (533) of Guo ‘950 and therefore, as incorporated, the insulative slot structures (595/514) would pass between offset contacts (538) as modified in the arrangement of (562/564). The ordinary artisan would have been motivated to modify conductive contact structures (538) in the arrangement of Guo ‘950’s (562/564) in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device and the insulative structures between the conductive contacts would provide protection for the contacts against parasitic capacitance or cross talk. With respect to Claim 14 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 10, and Guo ‘950 further teaches wherein a path in the first direction (WL) of at least one of the additional insulative slot structures (895/814 as incorporated above) is substantially linear (Fig 8 of Guo ‘950 discloses a structure 895/814 as linear). With respect to Claim 16 Lee ‘551 as modified by Park ‘337 discloses all limitations of the microelectronic device of claim 1, and Lee ‘551 discloses further comprising additional contact structures (additional structures 134, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) vertically extending completely through the at least one of the blocks (Fig 2 of Lee ‘551 discloses a contact 234 (feature 134 in Fig 2 as disclosed above) that vertically extends though the memory block in which structure 214e is contained), some of the additional contact structures (additional structures 134) positioned within a horizontal area (step of 216 as shown in Fig 2) of the upper stadium structure (218a) But Lee ‘551 as modified by Park ‘337 fails to explicitly disclose the additional contact structures and horizontally offset from the conductive contact structures. Nevertheless, in a related endeavor (Fig 1-10B of Guo ‘950), Guo ‘950 teaches the additional contact structures (632, Fig 6 of Guo ‘950, Para [0103]) and horizontally offset (Fig 6 of Guo ‘950 discloses 632 horizontally offset from 538) from the conductive contact structures (538). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s teaching the additional contact structures and horizontally offset from the conductive contact structures into Lee ‘551 as modified by Park ‘337’s device. Lee ‘551 as modified by Park ‘337 discloses multiple contacts on a stair step but is silent as to their physical arrangement on the step. Guo ‘950 teaches that contacts can be offset from each other. The ordinary artisan would have been motivated to modify conductive contact structures in the arrangement of Guo ‘950’s in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device and the spacing would reduce parasitic capacitance between the structures. As incorporated, the offset spacing arrangement of a plurality of contacts taught by Guo ‘950 would be used in the spacing arrangement of the plurality of contacts (multiple contact structures 134 on each step 116) of Lee ‘551 as modified by Park ‘337 of the upper stadium structure (218a of Lee ‘551 as disclosed above) in the device of Lee ‘551 as modified by Park ‘337. PNG media_image1.png 509 1044 media_image1.png Greyscale PNG media_image3.png 578 972 media_image3.png Greyscale PNG media_image2.png 579 860 media_image2.png Greyscale With respect to Claim 17 Lee ‘551 discloses a memory device (Fig 1A-2), comprising: a stack structure (102, Fig 1A, Para [0024]) comprising blocks (blocks horizontally extending shown in annotated Fig 1G of Lee ‘551, hereinafter block) separated from one another by dielectric slot structures (128, Fig 1G, Para [0046]) and each including a vertically alternating sequence (disclosed in Fig 1E) of conductive structures (126, Fig 1E, Para [0044] discloses replacing sacrificial layer 106 with conductive layer 126, conductive material is shown as 226 in Fig 2, Para [0063] discloses Fig 2 as having features of device 100 of Fig 1A-1G) and insulative structures (104, Fig 1E, Para [0024]) arranged in tiers (108, Fig 1A, Para [0024]), at least one of the blocks (left block as shown in annotated Fig 1G of Lee ‘551) comprising: stadium structures (218a/218c, Fig 2, Para [0066]) comprising: an upper stadium structure (218a, Fig 2, Para [0066]) comprising staircase structures (214a/214b, Fig 2, Para [0066]) having steps (216 of 218a, Fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of an upper group of the tiers (conductive tier 226 in region of 218a, Fig 2, Para [0070]) of the stack structure (102 of Fig 1A, 224 of Fig 2, Para [0070]); and lower stadium structures (218c, Fig 2, Para [0066]) vertically below (disclosed in Fig 2) the upper stadium structure (218a) and each comprising additional staircase structures (214e/214f, Fig 2, Para [0066]) having additional steps (216 of 218c, Fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of a lower group of the tiers (conductive tier 226 in region of 218c, Fig 2, Para [0070]) of the stack structure (102 of Fig 1A, 224 of Fig 2, Para [0070]), the additional steps (216 of 218c) of the lower stadium structures (218c); crest regions (crest region as shown in annotated Fig 2 of Lee ‘551, hereinafter crest) interposed between the stadium structures (218a/218c) in the first direction (X direction as shown in Fig 2) (crest interposed between 218a and 218c is shown in annotated Fig 2 of Lee ‘551); and bridge regions (bridge region as shown in annotated Fig 2 of Lee ‘551, hereinafter bridge) integral with the crest regions (crest)(annotated Fig 2 of Lee ‘551 discloses bridge and crest are integral (connected to each other)) and interposed between the dielectric slot structures (128, Fig 1G, Para [0046], feature shown as 228 in Fig 2, Para [0063] discloses 200 has the features of device 100 of Fig 1A-1G) and the stadium structures (218a/218c) (annotated Fig 2 of Lee ‘551 discloses crest is interposed between dielectric structures and stadium structures) in a second direction (y direction as shown in annotated Fig 2 of Lee ‘551) orthogonal to the first direction (x direction)(y direction orthogonal to x direction as shown in axis of Fig 2); groups of contact structures (group of 134, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) in contact with and substantially confined within (shown in Fig 2) horizontal areas (tread of 116 in the x direction as shown in Fig 1F and disclosed in Para [0053]) of the steps (216 of 218a, Note that 216 is the stair feature in Fig 2 and Para [0063] discloses 200 has the features of device 100 of Fig 1A-1G) of the upper stadium structure (218a) of the at least one of the blocks (left block as shown in annotated Fig 2 of Lee ‘551), each of the groups of contact structures (group of 134) individually comprising: But Lee ‘551 fails to explicitly disclose lower stadium structures having smaller tread dimensions in a first direction than the steps of the upper stadium structure Nevertheless in a related endeavor, (Fig 5 of Park ‘337), Park ‘337 teaches having lower tread widths (W1/W2, Fig 5 of Park ‘337, Para [0043]) in the first direction (horizontal as shown in annotated Fig 5 of Park’337) than the steps (112c/112d) of the upper stadium structure (110e/110d)(Para [0043] of Park ‘337 discloses “the widths (e.g., the first width W1 through the fifth width W5) of the steps 112 gradually increase from the first step 112a to the fifth step 112e, therefore the tread widths of 112e/112d are greater than 112b/112a); Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Park ‘337’s teaching of having lower tread widths in the first direction than the steps of the upper stadium structure into Lee ‘551’s device. Lee ‘551 teaches a memory structure with multiple stair step structures in stadium formations and is open to the widths of the treads of the stairs being different (Para [0036], “at least one of the steps 116 exhibits different dimensions (e.g., one or more of a different width, a different length, and a different height) than at least one other of the steps 116”. Lee ‘551 further discloses the stadium stair step regions are multiples of structure 218. (Para [0066]). Park ‘337 also teaches a memory structure with stair step region and teaches that tread widths of steps in the upper portion of that stair step region maybe be different than widths of treads in the lower portion of that stair step region as described above. The ordinary artisan would have been motivated to modify Lee ‘551 in the manner set forth above, at least, because Park ‘337 teaches details on the different tread widths disclosed by Lee’551 (Para [0036]) and also because, as Park ‘337 teaches in Para [0043] this spacing provides a gradual increase in the distances between contact structures. Creating space between the contacts can reduce the possibility of parasitic capacitance between contacts. As incorporated, the teaching of Park ‘337 of having stair tread widths of upper stairs with different widths than tread widths of lower stairs would be used as the stair tread widths in the stair steps (216) in the upper and lower stadium structures (218a and 218c respectively) of Lee ‘551. This incorporation would result in treads of the upper stairs in lower stadium 218c having widths of steps that are smaller than tread widths of the upper stairs in lower stadium 218a of Lee ‘551. Lee ‘551 as modified by Park ‘337 fails to explicitly disclose two of the contact structures substantially aligned with one another in the first direction; and two other of the contact structures substantially aligned with one another in the first direction and offset from the two of the contact structures in the first direction; and strings of memory cells vertically extending through a portion of the at least one of the blocks neighboring the upper stadium structure in the first direction. Nevertheless, in a related endeavor, (Fig 1-10B of Guo ‘950), Guo ‘950 teaches in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”) and Guo ‘950 further teaches two of the contact structures (left two of 566, Fig 5 of Guo ‘950, Para [0116]) substantially aligned with one another in the first direction (WL as shown in Fig 5 of Guo ‘950); and two other of the contact structures (right two of 566, Fig 5 of Guo ‘950, Para [0116]) substantially aligned with one another in the first direction (WL) and offset from the two of the conductive contact structures (left two of 566) in the first direction (WL). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s teaching of two of the contact structures substantially aligned with one another in the first direction; and two other of the contact structures substantially aligned with one another in the first direction and offset from the two of the conductive contact structures in the first direction in Lee ‘551 as modified by Park ‘337’s device. Lee ‘551 as modified by Park ‘337 discloses multiple contacts on a stair step but is silent as to their physical arrangement on the step. Guo ‘950 teaches that contacts can be aligned each other on steps. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device, provide additional conductive connections to increase the device functionality and the spacing would reduce parasitic capacitance between the structures. As incorporated, the two conductive contact structure arrangement of conductors (538) aligned with each other and two other conductive contact structures (566) as taught by Guo ’950 would be used as the arrangement of the conductive contacts (134) of Lee ‘551 as modified by Park ‘337 in the steps (216). And Guo ‘950 further teaches and strings of memory cells (512, Fig 5 of Guo ‘950, Para [0103]) vertically extending (disclosed in Para [0103]) through a portion (520, Fig 5 of Guo ‘950, Para [0103]) of the at least one of the blocks (203, Fig 2 of Guo ‘950, Para [0071]) Therefore It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo 950’s further teaching of and strings of memory cells vertically extending through a portion of the at least one of the blocks contact structures in contact with the additional steps of the uppermost stadium structure of the at least one of the blocks, into Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950’s device. Lee ‘551 discloses in Para [0045] that vertical memory cell arrays can be coupled to the memory device 200 disclosed above. Guo ‘950 provides details for that memory string coupled to the memory device. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides additional conductive connections increasing the functionality of the device to achieve the 3D memory structure disclosed in Para [0045] of Lee ‘551. As incorporated the teachings of Guo ‘950 of strings of memory cells (512 of Guo ‘950) vertically extending through a portion (520 of Guo ‘950) of the at least one of the blocks, and would be attached to the end of the blocks of Lee ‘551, as disclosed in Para [0045] of Lee ‘551, so that they would be neighboring the upper stadium structure (218a) in the first direction (X-direction) of Lee ‘551 as modified by Park ‘337 as further modified by Guo ‘950. With respect to Claim 24 Lee ‘551 discloses an electronic system (Fig 1A-2 and 6), comprising: an input device (606, Fig 6, Para [0123]); an output device (608, Fig 6, Para [0123]); a processor device (604, Fig 6, Para [0123]) operably coupled to the input device (606) and the output device (608)(Fig 6 and Para [0123] discloses devices 606, 608 and 604 operably coupled); and a memory device (602, fig 6, Para [0123]) operably coupled (Fig 6 and Para [0123] discloses devices 602 and 604 operably coupled) to the processor device (604) and comprising: a stack structure (102, Fig 1A, Para [0024]) having tiers (108, Fig 1A, Para [0024]) each including conductive material (126, Fig 1E, Para [0044] discloses replacing sacrificial layer 106 with conductive layer 126, conductive material is shown as 226 in Fig 2, Para [0063] discloses Fig 2 as having features of device 100 of Fig 1A-1G) vertically neighboring (disclosed in Fig 1E) insulative material (104, Fig 1E, Para [0024]), the stack (102) structure divided into blocks (blocks horizontally extending shown in annotated Fig 1G of Lee ‘551) separated from one another (disclosed in annotated Fig 1G of Lee ‘551) by dielectric slot structures (128, Fig 1G, Para [0046]), at least one of the blocks (left block as shown in annotated Fig 1G of Lee ‘551) comprising: a lower stadium structure (218c, Fig 2, Para [0066]) having steps (216 of 218c, Fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of a vertically lower group of the tiers (conductive tiers 226 in region of 218c, Fig 2, Para [0070]); and an uppermost stadium structure (218a, Fig 2, Para [0066]) having additional steps (216 of 218c, Fig 2, Para [0072]) comprising edges (Fig 2 discloses 216 comprises edges of conductive layers 226) of a vertically upper group of the tiers (conductive tier 226 in region 218c, Fig 2 and Para [0066] discloses 218a positioned higher in tiers in Z direction than 218c), the additional steps (216 of 218c) of the uppermost stadium structure (218a); contact structures (134, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) in contact with the additional steps (216 of 218a, Note that 216 is the stair feature in Fig 2 and Para [0063] discloses 200 has the features of device 100 of Fig 1A-1G) of the uppermost stadium structure (218a) of the at least one of the blocks (left block as shown in annotated Fig 1G of Lee ‘551), a group of the contact structures (group of 134, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) substantially confined within a horizontal area (tread of 116 in the x direction as shown in Fig 1F and disclosed in Para [0053]) of the one of the additional steps (step 216 of 218a) But Lee ‘551 fails to explicitly disclose having greater horizontal dimensions than the steps of the lower stadium structure Nevertheless in a related endeavor, (Fig 5 of Park ‘337), Park ‘337 teaches having greater horizontal dimension (W4/W5, Fig 5 of Park ‘337, Para [0043])(horizontal as shown in annotated Fig 5 of Park’337) than the steps (112a/112b) of the lower stadium structure (110b/110a)(Para [0043] of Park ‘337 discloses “the widths (e.g., the first width W1 through the fifth width W5) of the steps 112 gradually increase from the first step 112a to the fifth step 112e, therefore the tread widths of 112e/112d are greater than 112b/112a); Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Park ‘337’s teaching of having greater horizontal dimensions than the steps of the lower stadium structure into Lee ‘551’s device. Lee ‘551 teaches a memory structure with multiple stair step structures in stadium formations and is open to the widths of the treads of the stairs being different (Para [0036], “at least one of the steps 116 exhibits different dimensions (e.g., one or more of a different width, a different length, and a different height) than at least one other of the steps 116”. Lee ‘551 further discloses the stadium stair step regions are multiples of structure 218. (Para [0066]). Park ‘337 also teaches a memory structure with stair step region and teaches that tread widths of steps in the upper portion of that stair step region maybe be different than widths of treads in the lower portion of that stair step region as described above. The ordinary artisan would have been motivated to modify Lee ‘551 in the manner set forth above, at least, because Park ‘337 teaches details on the different tread widths disclosed by Lee’551 (Para [0036]) and also because, as Park ‘337 teaches in Para [0043] this spacing provides a gradual increase in the distances between contact structures. Creating space between the contacts can reduce the possibility of parasitic capacitance between contacts. As incorporated, the teaching of Park ‘337 of having stair tread widths of upper stairs with different widths than tread widths of lower stairs would be used as the stair tread widths in the stair steps (216) in the upper and lower stadium structures (218a and 218c respectively) of Lee ‘551. This incorporation would result in the treads of the upper stairs in upper stadium 218a having widths different (greater tread widths) than tread widths of the lower stairs in lower stadium 218c of Lee ‘551. Lee ‘551 as modified by Park ‘337 fails to explicitly disclose and comprising at least one contact structure diagonally horizontally positioned relative to at least one other contact structure; additional dielectric slot structures vertically extending through the vertically upper group of the tiers of the at least one of the blocks and partially horizontally overlapping the uppermost stadium structure, the additional dielectric slot structures horizontally alternating with rows of the contact structures; and strings of memory cells vertically extending through the at least one of the blocks. Nevertheless, in a related endeavor (Fig 1-10B of Guo ‘950), Guo ‘950 teaches (in Para [0104] discloses “the arrangement of the plurality of staircase contacts 538 can be design in arbitrary suitable way to achieve electric connection of the plurality of word lines”) and Guo ‘950 further teaches (Fig 5 of Guo ‘950) contact structures (562/564, Fig 5 of Guo ‘950, Para [0115]) and at least one (one of 564, Fig 5 of Guo ‘950) contact structure (562/564) diagonally horizontally positioned relative (one contact 564 diagonally horizontally positioned relative to another one of 564 shown in Fig 5 of Guo ‘950) from at least one other contact structure (one of 564 to the left side of 500, Fig 5 of Guo ‘950). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ’950’s teaching of comprising at least one contact structure diagonally horizontally positioned relative to at least one other contact structure; into Lee ‘551 as modified by Park ‘337’s device. Lee ‘551 as modified by Park ‘337 discloses multiple contacts on a stair step but is silent as to their physical arrangement on the step. Guo ‘950 teaches that contacts can be offset from each other. The ordinary artisan would have been motivated to modify conductive contact structures in the arrangement of Guo ‘950’s in the manner set forth above, at least, because this inclusion provides a spacing arrangement between conductive contacts that would save space in the device and the spacing would reduce parasitic capacitance between the structures. As incorporated, the offset spacing arrangement of a plurality of contacts taught by Guo ‘950 would be used in the spacing arrangement of the plurality of contacts (multiple contact structures 134 on each step 116) of Lee ‘551 as modified by Park ‘337. Guo ‘950 further teaches additional dielectric slot structures (595/514, Fig 5 of Guo ‘950, Para [0112]) vertically extending through the vertically upper group of the tiers (Fig 6 of Guo ‘950 discloses 595/514 vertically extending through tiers) of the at least one of the blocks (203, Fig 2 of Guo ‘950, Para [0110]) and partially horizontally overlapping (Fig 5 of Guo ‘950 discloses 595/514 partially horizontally overlaps the stair structure) the uppermost stadium structure (530, Fig 5 of Guo ‘950, Para [0094]), the additional dielectric slot structures (595/514) horizontally alternating with rows (top row of 538 as shown in Fig 5 of Guo ‘950) of the contact structures (538, Fig 5 of Guo ‘950, Para [0104]) Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo 950’s teaching of additional dielectric slot structures vertically extending through the vertically upper group of the tiers of the at least one of the blocks and partially horizontally overlapping the uppermost stadium structure, the additional dielectric slot structures horizontally alternating with rows of the contact structures into Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950’s device. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides additional conductive connections increasing the functionality of the device, and the insulative structures between the conductive contacts would provide protection for the contacts against parasitic capacitance or cross talk and the proven method of inserting memory strings provides additional functionality and device performance. As incorporated the further teachings of Guo ‘950 of the structure of additional dielectric structures (595/514 of Guo ‘950) would be used in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 so that they would vertically extend through the vertically upper group of the tiers (tiers where 218a of Lee ‘551 is positioned) of the at least one of the blocks (left block) and partially horizontally overlapping the uppermost stadium structure (218a of Lee ‘551), and the additional dielectric slot structures (595/514 of Guo ‘950) would horizontally alternate with rows of the contact structures (134 of Lee ‘551). And Guo ‘950 further teaches and strings of memory cells (512, Fig 5 of Guo ‘950, Para [0103]) vertically extending (disclosed in Para [0103]) through the at least one of the blocks (203, Fig 2 of Guo ‘950, Para [0071]). Therefore It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo 950’s further teaching of strings of memory cells vertically extending through the at least one of the blocks, into Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950’s device. Lee ‘551 discloses in Para [0045] that vertical memory cell arrays can be coupled to the memory device 200 disclosed above. Guo ‘950 provides details for that memory string coupled to the memory device. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides additional conductive connections increasing the functionality of the device to achieve the 3D memory structure disclosed in Para [0045] of Lee ‘551. As incorporated the teachings of Guo ‘950 of strings of memory cells (512 of Guo ‘950) vertically extending through a portion (520 of Guo ‘950) of the at least one of the blocks, and would be attached to the end of the blocks of Lee ‘551 as disclosed in Para [0045]. With respect to Claim 25 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the electronic system of claim 24, and Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 further discloses wherein at least some of the additional dielectric slot structures (595/514 of Guo ‘950 as incorporated above) horizontally extend in non-linear paths (shown in Fig 5 of Guo ‘950) through a portion of a horizontal area (580, Fig 5 of Guo ‘950, Para [0094] as incorporated above) of the uppermost stadium structure (218a of Lee ‘551) of the at least one of the blocks (left block as shown in annotated Fig 2 of Lee ‘551). With respect to Claim 26 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the electronic system of claim 24, and Guo ‘950 further discloses wherein some of the contact structures (538) within at least one of the rows of the contact structures (a row of 538 on step 533) are electrically ganged together by way of conductive routing structures vertically overlying the at least one of the blocks (Para [0115] of Guo ‘950 discloses 538 electrically connected together and to structure 500). With respect to Claim 27 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the electronic system of claim 24, and Lee ‘551 discloses further wherein the memory device comprises a 3D NAND Flash memory device (Para [0123] discloses memory device as 3D NAND). Claims 15 and 19-23 are rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘551 in view of Park ‘337, in view of Guo ‘950 and in further view of Eom (US 2021/0020658 A1, hereinafter Eom ‘658) in view of the following arguments. PNG media_image3.png 578 972 media_image3.png Greyscale With respect to Claim 15 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the microelectronic device of claim 10, but Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 fails to explicitly disclose further comprising an other insulative slot structure partially vertically extending through the at least one of the blocks and horizontally extending completely across the at least one of the blocks in the second direction, a portion of the other insulative slot structure located with a horizontal area of the upper stadium structure. Nevertheless, in a related endeavor (Fig 1A-2A of Eom ‘658), Eom ‘658 teaches further comprising an other insulative slot structure (BP, Fig 2A of Eom ‘658, Para [0048]) partially vertically extending (Fig 1A of Eom ‘658 discloses BP partially vertically extending) through the at least one of the blocks (upper block SWS shown in Fig 2A of Eom ‘658, Para [0046]) and horizontally extending completely across the at least one of the blocks (SWS) in the second direction (vertical)(Fig 2A of Eom ‘658 discloses BP extending completely across SWS), a portion of the other insulative slot structure (BP) located with a horizontal area of the upper stadium structure (Fig 2A discloses BP located in a horizontal area of the upper stadium structure). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to use an other insulative slot structure partially vertically extending through the at least one of the blocks and horizontally extending completely across the at least one of the blocks in the second direction, a portion of the other insulative slot structure located with a horizontal area of the upper stadium structure taught by Eom ‘658 in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. As incorporated as incorporated the further dielectric structure would be inserted horizontally offset from the dielectric structures (895/814 of Guo ‘950 as incorporated above) partially extending into area 880. The ordinary artisan would have been motivated to add the further dielectric slot structures (BP of Eom ‘658) in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides a design whereby the further dielectric slots provide additional protection against cross talk or parasitic capacitance between closely spaced contacts and Eom ‘658 also teaches (Para [0035]) that the slots (BP) can provide etch stops for planarization processes. With respect to Claim 19 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the memory device of claim 17, and in a further embodiment (Fig 8 of Guo ‘950) Guo ‘950 discloses further comprising: Three additional (Para [0117] of Guo ‘950 discloses that additional dielectric structures 895/814 can be used, therefore an embodiment exits with three additional structure 895/814 that horizontally extend through one of the staircase structures. Further MPEP § 2144.04 (VI)(B) cites In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) and further recites “…that mere duplication of parts has no patentable significance unless a new and unexpected result is produced”, dielectric slot structures (895/814, Fig 8 of Guo ‘950, Para [120]) vertically extending through the upper group of the tiers (880, Fig 8 of Guo ‘950) (Fig 8 of Guo ‘950 discloses a 895/814 horizontally extending partially through 880) of the at least one of the blocks (203) and horizontally extending in the first direction (WL)(Fig 8 discloses 895/814 extending horizontally) partially through (Fig 8 of Guo ‘950 discloses 895/814 partially through 530) one of the staircase structure (530, Fig 8 of Guo ‘950, Para [0116]) and; Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ’950’s further teaching of three additional dielectric slot structures vertically extending through the upper group of the tiers of the at least one of the blocks and horizontally extending in the first direction partially through one of the staircase structures into Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950’s device. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because as Guo ‘950 teaches in Para [0110] these isolation slots help reduce parasitic capacitance between memory blocks. As incorporated, further teaching of Guo ‘950 of three additional dielectric slot structures (895/814 of Guo ‘950) would vertically extend through the upper group of the tiers (conductive tier 226 in region of 218a of Lee ‘551) of the at least one of the blocks (blocks disclosed by Lee ‘551) and horizontally extending in the first direction (X) partially through one of the staircase structures (214a of Lee ‘551) of the upper stadium structure (218a of Lee ‘551) in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. 9But Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 fails to explicitly disclose a further dielectric slot structure vertically extending through the upper group of the tiers of the at least one of the blocks and horizontally extending in the second direction completely across the at least one of the blocks, the further dielectric slot structure horizontally overlapping the upper stadium structure and horizontally offset from each of the three additional dielectric slot structures in the first direction. Nevertheless, in a related endeavor (Fig 1A-2A of Eom ‘658), Eom ‘658 teaches a further dielectric slot structure (BP, Fig 2A of Eom ‘658, Para [0048]) vertically extending through (Fig 2A discloses BP extending vertically through the tier structure) the upper group of the tiers (CP/ILD, Fig 1A of Eom ‘658, Para [0028]) of the at least one of the blocks (upper block SWS shown in Fig 2A of Eom ‘658, Para [0046]) and horizontally extending in the second direction (vertical as shown in Fig 2A of Eom ‘658) completely across the at least one of the blocks (SWS)(Fig 2A and Para [0048] across the block), the further dielectric slot structure (BP) horizontally overlapping the upper stadium structure (Fig 2A discloses BP horizontally overlapping the stair structure) and horizontally offset from each of the three additional dielectric slot structures (structures described above) in the first direction (horizontal)(as incorporated the further dielectric structure would be inserted horizontally offset from the dielectric structures (895/814) partially extending into area 880). Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to use Eom ‘658’s teaching of a further dielectric slot structure vertically extending through the upper group of the tiers of the at least one of the blocks and horizontally extending in the second direction completely across the at least one of the blocks, the further dielectric slot structure horizontally overlapping the upper stadium structure and horizontally offset from each of the three additional dielectric slot structures into the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. The ordinary artisan would have been motivated to add the further dielectric slot structures in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 in the manner set forth above, at least, because this inclusion provides a design whereby the further dielectric slots provide additional protection against cross talk or parasitic capacitance between closely spaced contacts and Eom ‘658 also teaches (Para [0035]) that the slots (BP) can provide etch stops for planarization processes. As incorporated as incorporated the further dielectric structure (BP of Eom ‘658) would be inserted horizontally offset from the dielectric structures (895/814 of Guo ‘950 as incorporated above) partially extending into area (880 Guo ‘950 as incorporated above) in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. With respect to Claim 20 Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658 discloses all limitations of the memory device of claim 19, and Guo ‘950 discloses in an additional embodiment (Fig 5 of Guo ‘950) wherein two of the three additional dielectric slot structures (595/514, Fig 5 of Guo ‘950, Para [0109]) horizontally extend in non-linear paths (Fig 5 of Guo ‘950 discloses structure 595/514 horizontally extends as non-linear) through a horizontal area (center region of 500 as shown in Fig 5 of Guo ‘950) of the one of the staircase structures (500 of Guo ‘950) Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Guo ‘950’s further teaching of wherein two of the three additional dielectric slot structures horizontally extend in non-linear paths through a horizontal area of the one of the staircase structures into Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658’s device. The ordinary artisan would have been motivated to modify Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658 in the manner set forth above, at least, because as Guo ‘950 teaches in Para [0110] this arrangement enables the erasing of specific sub blocks instead of having to erase the entire memory block. As incorporated, the teaching of non-linear dielectric structures (595/514 of Guo ‘950) would extend through the center region between staircase structures (214a and 214b of Lee ‘551) in the upper stadium structure (218a of Lee ‘551) in the device of Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658. With respect to Claim 21 Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658 discloses all limitations of the memory device of claim 20, and Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658 further discloses wherein additional dielectric slot structures interposed (BP of Eom ‘658 as incorporated above), in the second direction (y direction), between the two of the three additional dielectric slot structures (three slot structures 595/514 of Guo ‘950 as described in claim 19)(as described above the structures BP would be inserted horizontally spaced from the three dielectric structures and would run the vertical direction across the block structure so it would be horizontally offset but between the dielectric structures) horizontally extends in a substantially linear path (Fig 2A of Eom ‘658 discloses BP horizontally extending in a linear path) through the horizontal area of the one of the staircase structures (center region between staircase structures 214a and 214b of Lee ‘551) of the upper stadium structure ((218a of Lee ‘551)). With respect to Claim 22 Lee ‘551 as modified by Park ‘337 and modified by Guo ‘950 and further modified by Eom ‘658 discloses all limitations of the memory device of claim 19, and Lee ‘551 further comprising additional contact structures (134, Fig 1F, Para [0053], discloses multiple contact structures 134 on each step 116) vertically extending completely through the at least one of the blocks (left block as shown in annotated Fig 2 of Lee ‘551)(Fig of Lee ‘551 discloses contact 134 (234 as shown in Fig 2) extending completely through) and positioned within a horizontal area (tread of 116 in the x direction as shown in Fig 1F and disclosed in Para [0053])of the one of the staircase structures (214a) of the upper stadium structure (218a). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘551 in view Park ‘337 and in view of Guo ‘950 and in further view of Williamson et al. (US 2019/0206726 A1, hereinafter Williamson ‘726) in view of the following arguments. With respect to Claim 18 Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 discloses all limitations of the memory device of claim 17, and Lee ‘551 further discloses the upper stadium structure (218a) But Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950 fails to explicitly disclose wherein each of the steps has a tread width in the first direction within a range of from about 1200 nm to about 1800 nm. Nevertheless, in a related endeavor (Fig 4 of Williamson ‘726), Williamson ‘726 teaches wherein each of the steps (116, Fig 7 of Williamson ‘726, Para [0039]) has a tread width in the first direction within a range of from about 1200 nm to about 1800 nm. (Para 0034 of Williamson ‘726 discloses that “The thickness of the first liner material 118 corresponds to a tread width W2 of the stair 116b to be formed. The first liner material 118 may be formed at a thickness of from about 10 nm to about 1,000 nm…”. (Therefore the tread width is between 10nm and 1000 nm) Therefore it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to use tread width in the first direction as taught by Williamson ‘726 in the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. The ordinary artisan would have been motivated to modify, using the tread widths taught by Williamson ‘726 in the device of Lee ‘551 as modified by Guo ‘950 in the manner set forth above, at least, because the process of Williamson ‘726 provides a proven method to creating a step tread width large enough to make conductive connections. This information would reduce R&D time to determine tread width and improve manufacturing processes leading to a lower cost for the device of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. As incorporated the tread widths of Williamson ‘726 would be used for the tread widths of Lee ‘551 as modified by Park ‘337 and further modified by Guo ‘950. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL A. BERRY whose telephone number is (703)756-5637. The examiner can normally be reached M-F 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAUL A BERRY/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Aug 25, 2022
Application Filed
May 14, 2025
Non-Final Rejection — §103
Aug 04, 2025
Response Filed
Oct 09, 2025
Final Rejection — §103
Dec 31, 2025
Response after Non-Final Action
Jan 20, 2026
Request for Continued Examination
Jan 28, 2026
Response after Non-Final Action
Mar 16, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604537
HIGH MOBILITY TRANSISTOR ELEMENT RESULTING FROM IGTO OXIDE SEMICONDUCTOR CRYSTALLIZATION, AND PRODUCTION METHOD FOR SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12604724
VERTICAL SEMICONDUCTOR DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12598780
GATE-ALL-AROUND TRANSISTORS WITH HYBRID ORIENTATION
2y 5m to grant Granted Apr 07, 2026
Patent 12568856
METHOD OF MANUFACTURING THREE-DIMENSIONAL SYSTEM-ON-CHIP AND THREE-DIMENSIONAL SYSTEM-ON-CHIP
2y 5m to grant Granted Mar 03, 2026
Patent 12568636
MPS DIODE DEVICE AND PREPARATION METHOD THEREFOR
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
91%
With Interview (-2.1%)
3y 4m
Median Time to Grant
High
PTA Risk
Based on 28 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month