DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendments filed November 7, 2025 have been entered. Applicant’s amendments have overcome each and every claim objection and 112(b) rejection previously set forth in the Non-Final Action mailed August 12, 2025. Claims 1-20 were canceled. Claims 21-40 are new and pending, but stand rejected for the reasons detailed below.
Response to Arguments
Applicant’s arguments with respect to previous claims 1-20 and new claims 21-40 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
As compared to the original set of claims, Applicant’s new claims are directed at clarifying where a first plate 160 of a micro-assembly comprises slot(s) that expose memory socket(s) 132 and also includes an extension portion 166 that extends over a die on a substrate adjacent to the memory socket(s) (see Figures 4-5 of the instant application below).
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Examiner agrees these amendments overcome the previously cited prior art of record. However, Examiner submits the new primary reference Fang (US Publication No. 2021/0219414) in view of other references (see rejections below) render the new claims obvious. At a high level, Fang discloses wherein a first plate (3) comprises a slot (30) that exposes a memory socket (12) on a substrate (1) and also includes an extension portion (portion of 3 over 13) that extends over a die (13) on the substrate (1) adjacent to the memory socket (12).
For these reasons, and the reasons detailed below, claims 21-40 stand rejected.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “the memory socket comprises an opening, wherein the alignment member extends through the opening” from claim 30; and “underfill material” in claim 35 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21-23, 26, 31, and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414) in view of Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), and Matsumoto (US Publication No. 2016/0278198).
Regarding claim 21, Fang discloses a microelectronic assembly (see Figures 1-4), comprising: a package (circuit board 1) comprising a first side and a second side opposite the first side; a die (chip 13) coupled with the second side of the package (top side of 1); a memory socket (memory socket 12) coupled with the second side of the package (top side of 1), wherein the memory socket (12) is adjacent to and in a first plane with the die (top surface of 1), wherein the first plane (top surface of 1) is substantially parallel with the package (1); a first plate (heat dissipation shell 3) aligned with the memory socket (12) and coupled with the second side of the package (top side of 1), wherein: the memory socket (12) is exposed through a slot (window 30) in the first plate (3), and the first plate (3) is in the first plane (top surface of 1) with the die (13; where 3 is connected to top surface of 1); a second plate (cover board 31) over and coupled with the first plate (13).
Fang does not disclose wherein the first side of the package is to couple with a circuit board.
However, Iyengar teaches wherein a first side of a package (bottom surface of substrate 204) is coupled with a circuit board (motherboard 202).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the package of Fang to the motherboard of Iyengar. Doing so would have provided a support substrate for which to mount the package and would have allowed the package to interconnect with other electronic devices (see Paragraphs [0006], [0060]-[0063] in Iyengar).
Fang in view of Iyengar does not teach wherein the die comprises a processor, and a heat spreader over the die, wherein: a portion of the first plate is between the heat spreader and the package, and the second plate is adjacent to and in a second plane with the heat spreader, wherein the second plane is substantially parallel with the package.
However, Setele teaches a package (Figures 3B, processor board 221); a die (Figure 4A, processor 360) on a second side of the substrate (top side of 221); wherein the die (360) comprises a processor (see Paragraph [0045]), and a heat spreader (Figure 3B, heat sink 216) over the die (360), wherein: a portion of the first plate (Figures 2-3B, receptacle 228 of base frame 224) is between the heat spreader (216) and the package (221), and a second plate (memory window 222) is adjacent to and in a second plane (along top surface of 224) with the heat spreader (216), wherein the second plane (top surface of 221) is substantially parallel with the package (221; see Figures 2-4 and 10).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the chips of Fang as modified by Iyengar to be processors as taught in Setele, and to have combined the cooling fan and heat spreaders of Setele to the first plate of Fang as modified by Iyengar. Doing so would have provided the system with processors to perform various processes including video decoding, audio processing, and/or graphic generations (see Paragraph [0045] in Setele), and would have increased heat dissipation from the processors (see Paragraph [0058] in Setele).
While Fang in view of Iyengar and Setele suggests wherein the second plate is in a second plane with the heat spreader, Matsumoto explicitly teaches a top surface of a first plate (Figures 1-3, top plate of 150) in a second plane with the heat spreader (heat sink 140).
Because the second plate (30 in Fang) is co-planar with the top surface of the first plate (3 in Fang), and because Setele suggests the base of heat sinks 216, 217 are recessed/co-planar within the top surface of frame 224 (see Paragraphs [0058]), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the heat spreader of Fang as modified by Iyengar and Setele to be co-planar with the top surface of the first plate, as taught in Matsumoto, such that the second plate was in a second plane with the heat spreader. Doing so would have allowed more air to smoothly pass through the heat sinks, increasing cooling efficiency (see Paragraphs [0048], [0081] in Matsumoto).
Regarding claim 22, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, and further teaches (in Fang) wherein: the portion of the first plate (portion of 3 corresponding to processors 13) comprises a metal (see Paragraph [0026]).
Regarding claim 23, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, and further teaches (in Fang) wherein: the second plate (31) has a third side (bottom side of 31) facing the memory socket (12) and a fourth side (top side of 31) opposite the third side (bottom side of 31), and the third side (bottom side of 31) comprises a heat sink (heat dissipation pads 2).
Regarding claim 26, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, and further teaches (in Setele) wherein: the portion of the first plate (224 in Setele, corresponding to 3 in Fang) is bonded (via adhesive; see Paragraph [0055]) with the heat spreader (216).
Regarding claim 31, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, and further teaches (in Fang) wherein the memory socket (12) is a first memory socket (first slot of 12), and wherein the microelectronic assembly further comprises: a second memory socket (second socket of 12) adjacent to the first memory socket (first socket of 12) and coupled with the second side of the package (top side of 1; see Paragraph [0020]).
Regarding claim 34, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, and further teaches (in Fang) further comprising: a memory component (memory module 11) coupled with the memory socket (12).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), Matsumoto (US Publication No. 2016/0278198), and in further view of Chen (US Publication No. 2020/0375064).
Regarding claim 24, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 23, but does not teach wherein: the fourth side comprises fins.
However, Chen teaches a second plate (plate of fin plate 232) has a third side (bottom side of 232) facing a memory socket (212) and a fourth side (top side of 232) opposite the third side (bottom side of 232), and the third side (bottom side of 232) comprises a heat sink (heat dissipation sheet 231), wherein: the fourth side (top side of 232) comprises fins (fins of 232).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the fins of Chen to the second plate of Fang as modified by Iyengar, Setele, and Matsumoto. Doing so would have increased the heat dissipation area, resulting in increased heat dissipation effect (see Paragraph [0033] in Chen).
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), Matsumoto (US Publication No. 2016/0278198), and in further view of Dibene (US Publication No. 2002/0021556).
Regarding claim 25, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, but does not teach wherein: the heat spreader comprises a vapor chamber.
However, Dibene teaches wherein a heat spreader (heat transfer device 300) comprises a vapor chamber (vapor chamber 306; see Paragraphs [0046]-[0051] and Figures 3-5).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the heat sinks of Fang as modified by Iyengar, Setele, and Matsumoto to include the hollow structure taught in Dibene. Doing so would have increased heat dissipation and cooling efficiency (see Paragraphs [0031]-[0032] in Dibene).
Claims 27-30 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), Matsumoto (US Publication No. 2016/0278198), and in further view of Nobel (US Publication No. 2006/0139884).
Regarding claim 27, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, but does not teach an alignment member adjacent to the package.
However, Nobel teaches an alignment member adjacent to the package (Figures 5-9, fasteners 112).
Because Fang suggests a similar connection between the first plate and the package (see Figures 1-4), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the fasteners of Nobel to the first plate and package of Fang as modified by Iyengar, Setele, and Matsumoto. Doing so would have releasably secured the first plate to the package (see Paragraphs [0028]-[0034] in Nobel).
Regarding claim 28, Fang in view of Iyengar, Setele, Matsumoto, and Nobel teaches the microelectronic assembly of claim 27, and further teaches (in Nobel) wherein: the first plate (frame of socket 102, corresponding to 3 in Fang) comprises an opening (holes in frame of 102 accommodating 112) adjacent to the slot (31 in Fang; see Figure 4), wherein the alignment member (112) extends through the opening (holes in frame of 102 accommodating 112).
Regarding claim 29, Fang in view of Iyengar, Setele, Matsumoto, and Nobel teaches the microelectronic assembly of claim 28, and further teaches (in Nobel) wherein the alignment member (112) is a first alignment member (first 112), the opening is a first opening (first opening corresponding to first 112), and wherein the microelectronic assembly further comprises: a second alignment member (second 112), wherein: the first alignment member (first 112) is adjacent to a first edge of the package (first edge of 112 in Nobel, corresponding to first edge of 1 in Fang), the second alignment member (second 112) is adjacent to a second edge of the package (second edge of 112 in Nobel, corresponding to first edge of 1 in Fang) opposite the first edge (first edge of 112 in Nobel, corresponding to first edge of 1 in Fang), the first plate (31 in Fang) comprises a second opening (first opening corresponding to 112), and the second alignment member (second 112) extends through the second opening (second opening corresponding to 112).
Regarding claim 30, Fang in view of Iyengar, Setele, Matsumoto, and Nobel teaches the microelectronic assembly of claim 27, and further teaches (in Nobel) wherein: the memory socket (LGA socket 102) comprises an opening (holes in connector receptacles 108), wherein the alignment member (112) extends through the opening (holes in connector receptacles 108).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the socket of Fang as previously modified by Iyengar, Setele, Matsumoto, and Nobel to include the connector receptacles and holes of Nobel. Doing so would have further secured the socket to the assembly by sandwiching the socket and memory modules between the first plate and package via a mechanical fastener (see Paragraphs [0026]-[0032] in Nobel).
Regarding claim 32, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 31, but does not teach wherein the slot is a first slot, and wherein: the first plate comprises a second slot adjacent to the first slot, and the second memory socket is exposed through the second slot.
However, Nobel teaches a package (card 122) comprising a first side (bottom) and a second side (top) opposite the first side (bottom); a memory socket (floor of socket 102, including contact fingers; see Paragraph [0026]) coupled with the second side of the package (top side of 122); a first plate (frame of socket 102) aligned with the memory socket (floor of socket 102, including contact fingers) and coupled with the second side of the package (top side of 122), wherein: the memory socket (floor of socket 102, including contact fingers) is exposed through a slot (slots 104) in the first plate (frame of 102), and a second plate (sink 110) over and coupled with the first plate (frame of 102);
wherein the memory socket (floor of socket 102, including contact fingers) is a first memory socket (floor corresponding to slot 104-1), and wherein the microelectronic assembly further comprises: a second memory socket (floor corresponding to slot 104-2) adjacent to the first memory socket (floor corresponding to slot 104-1) and coupled with the second side of the package (top side of 122).
wherein the slot (104) is a first slot (104-1), and wherein: the first plate (frame of 102) comprises a second slot (104-2) adjacent to the first slot (104-1), and the second memory socket (floor corresponding to 104-2) is exposed through the second slot (104-2).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the first plate and sockets of Fang as modified by Iyengar, Setele, and Matsumoto including the a plurality of slots in the first plate to accommodate a respective memory socket/memory device, as taught in Nobel, according to known methods to yield the predictable results of attaching a plurality of memory modules to a side of a package substrate (see Figure 7 in Nobel; see Figure 2 in Fang).
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), Matsumoto (US Publication No. 2016/0278198), and in further view of Yang (US Publication No. 2023/0205284).
Regarding claim 33, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 21, but does not teach wherein: the second plate comprises copper, steel, or aluminum.
However, Yang teaches a first plate (top plate of bracket 230) and second plate (base of heat dissipation element 220) wherein: the second plate (220) comprises copper, steel, or aluminum (see Paragraph [0018]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have made the selection of a known thermally conductive material, such as copper, for the first plate based on its suitability for its intended use, here being a thermally conductive material used to dissipate heat from an electronic component (see Paragraph [0018] in Yang). MPEP § 2144.07 and Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945); In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960) (selection of a known plastic to make a container of a type made of plastics prior to the invention was held to be obvious).
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Setele (US Publication No. 2023/0371197), Matsumoto (US Publication No. 2016/0278198), and in further view of Albers (US Publication No. 2017/0062306).
Regarding claim 35, Fang in view of Iyengar, Setele, and Matsumoto teaches the microelectronic assembly of claim 34, further comprising (in Fang): wherein the underfill material is absent from between the memory component (12) and the package (1), but does not teach an underfill material between the die and the package.
However, Albers teaches an underfill material (see Paragraphs [0041]) between a die (die 702) and a package (package 721).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the underfill material of Albers between the die and package of Fang in view of Iyengar, Setele, and Matsumoto. Doing so would have insulated the die by encapsulating the die and its electrical connectors (see Paragraph [0041] and Figure 7 in Albers).
Claims 36-37 are rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414) in view of Iyengar (US Publication No. 2020/0100396), Kumagai (US Publication No. 2017/0220063), Nobel (US Publication No. 2006/0139884), and Setele (US Publication No. 2023/0371197).
Regarding claim 36, Fang discloses a microelectronic assembly comprising: a package (circuit board 1) comprising a first side (bottom side) and a second side (top side) opposite the first side (bottom side); a die (chip 13) coupled with the second side of the package (top side of 1); a plurality of memory sockets (memory sockets 12) coupled with the second side of the package (top side of 2), wherein a memory socket (bottom 12) of the plurality of memory socket (12) is adjacent to and in a first plane (top plane of 1) with the die (13), wherein the first plane (top plane of 1) is substantially parallel with the package (1); a first plate (heat dissipation plate 3) aligned with the plurality of memory sockets (12; where window 30 is aligned with 12) and coupled with the second side of the package (top side of 1), wherein: the plurality of memory sockets (12) is exposed through a slot (window 30) in the first plate (3), and the first plate (3) is in the first plane (top plane of 1) with the die (13; where 3 is connected to top surface of 1).
Fang does not disclose wherein the first side of the substrate is coupled with a circuit board.
However, Iyengar teaches a package (substrate 204) and a circuit board (motherboard 202), wherein a first side of the package (bottom surface of substrate 204) is coupled with the circuit board (202).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the package of Fang to the motherboard of Iyengar. Doing so would have provided a support substrate for which to mount the package and would have allowed the package to interconnect with other electronic devices (see Paragraphs [0006], [0060]-[0063] in Iyengar).
Fang in view of Iyengar does not teach wherein the die comprises a system on a chip (SoC).
However, Kumagai teaches a system (see Figure 3) comprising: a package (substrate 21), a die (controller 12) coupled with the second side of the package (top side of 21), wherein the die (12) comprises a system on a chip (SoC) (controller 12; see Paragraph [0025]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the chips of Fang as modified by Iyengar for the SoC of Kumagai. Doing so would have provided the system with a controller configured to control the memory on the package (see Paragraph [0025] in Kumagai).
Fang in view of Iyengar and Kumagai does not teach a plurality of memory sockets coupled with the second side of the package, wherein the plurality of memory sockets is adjacent to and in a first plane with the die.
However, Nobel teaches a package (card 122) comprising a first side (bottom) and a second side (top) opposite the first side (bottom); a plurality of memory sockets (floor of socket 102, including contact fingers; see Paragraphs [0026]) coupled with the second side of the package (top side of 122), wherein the plurality of memory sockets in a first plane (top surface of 122, corresponding to top surface of 1 in Fang); a first plate (frame of socket 102) aligned with the plurality of memory sockets (floors of socket 102 aligned with each 104, including contact fingers) and coupled with the second side of the package (top side of 122), wherein: the plurality of memory socket (floors of socket 102, including contact fingers) is exposed through slots (slots 104) in the first plate (frame of 102).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the first plate and sockets of Fang as modified by Iyengar and Kumagai to include the plurality of slots in the first plate and in the first plane to accommodate a respective memory socket/memory device, as taught in Nobel, according to known methods to yield the predictable results of attaching a plurality of memory modules to a side of a package substrate (see Figure 7 in Nobel; see Figure 2 in Fang).
Fang in view of Iyengar, Kumagai, and Nobel does not teach a heat spreader, wherein a portion of the first plate is between the heat spreader and the package.
However, Setele teaches a package (Figure 3B, processor board 221) comprising a die (processor 360); a first plate (base frame 224); and a heat spreader (heat sink 216), wherein: a portion of the first plate (receptacle 228 of 224) is between the heat spreader (216) and the package (221; see Figures 2-3B).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the cooling fan and heat spreaders of Setele to the first plate of Fang as modified by Iyengar, Kumagai, and Nobel. Doing so would have increased heat dissipation from the processors (see Paragraph [0058] in Setele).
Regarding claim 37, Fang in view of Iyengar, Kumagai, Nobel, and Setele teaches the microelectronic assembly of claim 36, and further teaches (in Setele) wherein: the portion of the first plate (228 of 224 in Setele, corresponding to 3 in Fang) is bonded (via adhesive; see Paragraph [0055] in Setele) with the heat spreader (216).
Claims 38 and 40 are rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414) in view of Iyengar (US Publication No. 2020/0100396), Kumagai (US Publication No. 2017/0220063), and Setele (US Publication No. 2023/0371197).
Regarding claim 38, Fang discloses a system comprising: a package (circuit board 1) comprising a first side (bottom side) and a second side (top side) opposite the first side (bottom side); a die (chip 13) coupled with the second side of the package (top side of 1); a memory socket (memory socket 12) coupled with the second side of the package (top side of 2), wherein the memory socket (12) is adjacent to and in a first plane (top plane of 1) with the die (13), wherein the first plane (top plane of 1) is substantially parallel with the package (1); a first plate (3) aligned with the memory socket (12; where window 30 is aligned with 12) and coupled with the second side of the package (top side of 1), wherein: the memory socket (12) is exposed through a slot (30) in the first plate (3), and the first plate (3) is in the first plane (top plane of 1) with the die (13; where 3 is connected to top surface of 1).
Fang does not disclose a circuit board, wherein the first side of the package is coupled with the circuit board.
However, Iyengar teaches a circuit board (motherboard 202), wherein a first side of a package (bottom surface of substrate 204) is coupled with the circuit board (202).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the package of Fang to the motherboard of Iyengar. Doing so would have provided a support substrate for which to mount the package and would have allowed the package to interconnect with other electronic devices (see Paragraphs [0006], [0060]-[0063] in Iyengar).
Fang in view of Iyengar does not teach wherein the die comprises a system on a chip (SoC).
However, Kumagai teaches a system (see Figure 3) comprising: a package (substrate 21), a die (controller 12) coupled with the second side of the package (top side of 21) wherein the die (12) comprises a system on a chip (SoC) (controller 12; see Paragraph [0025]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the chips of Fang as modified by Iyengar for the SoC of Kumagai. Doing so would have provided the system with a controller configured to control the memory on the substrate (see Paragraph [0025] in Kumagai).
Fang in view of Iyengar and Kumagai does not teach a heat spreader, wherein a portion of the first plate is between the heat spreader and the package.
However, Setele teaches a package (Figure 3B, processor board 221) comprising a die (processor 360); a first plate (base frame 224); and a heat spreader (heat sink 216), wherein: a portion of the first plate (receptacle 228 of 224) is between the heat spreader (216) and the package (221).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the cooling fan and heat spreaders of Setele to the first plate of Fang as modified by Iyengar and Kumagai. Doing so would have increased heat dissipation from the dies (see Paragraph [0058] in Setele).
Regarding claim 40, Fang in view of Iyengar, Kumagai, and Setele teaches the system of claim 38, further comprising (in Fang): a memory component (memory module 11) coupled with the memory socket (12); and a cover (cover 31) over the circuit board (202 in Iyengar; where bottom of 1 in Fan is coupled to 202 in Iyengar), wherein the cover (31) comprises a smaller removable cover (top plate of 31, being removable by virtue of fasteners 313) over and aligned with the memory component (11).
Claim 39 is rejected under 35 U.S.C. 103 as being unpatentable over Fang (US Publication No. 2021/0219414), Iyengar (US Publication No. 2020/0100396), Kumagai (US Publication No. 2017/0220063), Setele (US Publication No. 2023/0371197), and in further view of Chen (US Publication No. 2020/0375064).
Regarding claim 39, Fang in view of Iyengar, Kumagai, and Setele teaches the system of claim 38, further comprising: a first fan (fan 214 in Setele, previously combined to Fang) coupled (thermally and indirectly coupled via connection with package) with the circuit board (motherboard 202 in Iyengar) and proximate to the heat spreader (216 in Setele combined to 3 in Fang).
Fang in view of Iyengar, Kumagai, and Setele does not teach a second fan proximate to the heat spreader, wherein the heat spreader is between the first fan and the second fan.
However, Chen teaches a first fan (memory fan 56, corresponding to fan 214 in Setele combined to Fang) proximate to a heat spreader (fins 52), and a second fan (chip fan 55) proximate to the heat spreader (52), wherein the heat spreader (52) is between the first fan (56) and the second fan (55).
It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the second fan of Chen to the heat spreader of Fang as modified by Iyengar, Kumagai, and Setele. Doing so would have increased heat dissipation of the dies by providing a dedicated fan to cool the heat spreader (see col. 6 in Chen).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lai (US Publication No. 2017/0367175) and Matsumoto (US Publication No. 2019/0230780) also teach first plates similar to the claimed device.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAGE STEPHEN CRUM whose telephone number is (571)272-3373. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm.
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/GAGE CRUM/ Examiner, Art Unit 2841
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