Prosecution Insights
Last updated: April 19, 2026
Application No. 17/826,872

SELECTIVE EPITAXY TO CREATE A DOUBLE-DIFFUSED CHANNEL OVER PLANAR OR UNDERLYING TOPOGRAPHY

Final Rejection §103
Filed
May 27, 2022
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
4 (Final)
91%
Grant Probability
Favorable
5-6
OA Rounds
2y 1m
To Grant
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
866 granted / 955 resolved
+22.7% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
45 currently pending
Career history
1000
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
50.9%
+10.9% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
19.8%
-20.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 955 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/20/2025 has been entered. Response to Argument Applicant’s argument with respect to claims 12-17, 21-29 have been considered but is unpersuasive to overcome current prior art. Applicant argues that neither Malinowski nor Su discloses “a semiconductor layer having a plurality of fins and trenches”. The examiner would like to note that Su discloses the above limitation as shown in the annotated figure below: PNG media_image1.png 670 890 media_image1.png Greyscale DETAILED ACTION This action is responsive to application No. 17826872 filed on 05/27/2022. Election/Restrictions Applicant’s election without traverse of claims 12-17 in the reply filed on 12/10/2024 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 12, 15, 21-24, 26-27 are ejected under 35 U.S.C. 103 as being unpatentable over Malinowski et al. (US 2017/0330970) in view of Su et al. (US 2023/0369328). Regarding independent claim 12, Malinowski et al. teach an integrated circuit comprising: a semiconductor device (Fig. 5, element 100) comprising: a semiconductor layer (Fig. 5, element 101); a gate (Fig. 5, element 105) disposed over the semiconductor layer, the semiconductor layer having a recess (Fig. 4, element 202/203) adjacent and partially under the gate; a first region (Fig. 5, element 501/502) disposed in the recess, the first region of a first semiconductor material (paragraph 0053); and a second region (Fig. 5, element 504/505, paragraph 0055) disposed in the recess over the first region, the second region of a second semiconductor doped with a second dopant (paragraph 0055). Malinowski et al. do not explicitly disclose a semiconductor layer having a plurality of fins and trenches, a first region doped with a first dopant. PNG media_image1.png 670 890 media_image1.png Greyscale Su et al. teach a semiconductor device comprising a semiconductor layer (Fig.2, element 100) having a plurality of fins and trenches (see annotated figure); a first stressed layer doped with a first dopant (paragraph 0045, 0049). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Malinowski et al. according to the teachings of Su et al. with the motivation to improve carrier mobility (paragraph 0045). Regarding claim 15, Malinowski et al. modified by Su et al. teach wherein the first and second semiconductor materials of the first and second regions comprise silicon (paragraph 0053, 0055 of Malinowski), the first dopant comprises boron, and the second dopant comprises arsenic (paragraph 0055 of Malinowski and paragraph 0045, 0049 disclose the capability of adding dopants of p or n type, accordingly before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select known dopants, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416). Regarding claim 21, Malinowski et al. modified by Su et al. teach wherein the first dopant comprises gallium or indium (paragraph 0055 of Malinowski and paragraph 0045, 0049 disclose the capability of adding dopants of p or n type, accordingly before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select known dopants, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416). Regarding claim 22, Malinowski et al. modified by Su et al. teach wherein the second dopant comprises phosphorus or antimony indium (paragraph 0055 of Malinowski and paragraph 0045, 0049 disclose the capability of adding dopants of p or n type, accordingly before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select known dopants, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416). Regarding claim 23, Malinowski et al. modified by Su et al. teach wherein the first dopant comprises germanium or carbon (paragraph 0055 of Malinowski and paragraph 0045, 0049 disclose the capability of adding dopants of p or n type, accordingly before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select known dopants, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416). Regarding claim 24, Malinowski et al. teach wherein the gate comprises polysilicon (paragraph 0027). Regarding claim 26, Malinowski et al. teach further comprising a gate dielectric layer (paragraph 0027) between the gate and the semiconductor layer. Regarding claim 27, Malinowski et al. teach wherein the gate dielectric layer comprises silicon dioxide (paragraph 0027). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Malinowski et al. (US 2017/0330970) in view of Su et al. (US 2023/0369328) and further in view of Cheng et al. (US 2025/0344475). Regarding claim 14, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein the semiconductor device is a lateral double-diffused metal-oxide-semiconductor (LDMOS) field effect transistor. Cheng et al. teach a semiconductor device that has fins and epitaxial source/drains regions comprising SiGe doped with boron (paragraph 0058) that can part of an IC chip comprising LDMOS (paragraph 0019). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Malinowski et al. and Su et al. according to the teachings of Cheng et al. with the motivation to provide high breakdown voltage capability. Claims 14, 28-29 are ejected under 35 U.S.C. 103 as being unpatentable over Malinowski et al. (US 2017/0330970) in view of Su et al. (US 2023/0369328) and further in view of Girdhar et al. (US 2011/0156679). Regarding claim 14, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein a combined thickness of the first and second regions is between about 20 nanometers and about 200 nanometers. Girdhar et al. teach a semiconductor device comprising a range of thickness for a p-type and n-type region (paragraph 0031-0032) to allow for a desired dosage implant to effect the conductivity of the channel. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness of the source/body region as Girdhar et al. has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the claimed thickness range, in order to achieve desired dosage implant to effect the conductivity of the channel, as taught by Girdhar et al., MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed thickness is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions. Regarding claim 28, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein a thickness of the first region is between about 30 nanometers and about 70 nanometers. Girdhar et al. teach a semiconductor device comprising a range of thickness for a p-type (paragraph 0031) to allow for a desired dosage implant to effect the conductivity of the channel. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness of the body region as Girdhar et al. has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the claimed thickness range, in order to achieve desired dosage implant to effect the conductivity of the channel, as taught by Girdhar et al., MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed thickness is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions. Regarding claim 29, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein a thickness of the second region is between about 30 nanometers and about 70 nanometers. Girdhar et al. teach a semiconductor device comprising a range of thickness for a n-type (paragraph 0032) to allow for a desired dosage implant to effect the conductivity of the source/channel. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness of the source region as Girdhar et al. has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the claimed thickness range, in order to achieve desired dosage implant to effect the conductivity of the cource/channel as taught by Girdhar et al., MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed thickness is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed dimensions. Claims 16-17 are ejected under 35 U.S.C. 103 as being unpatentable over Malinowski et al. (US 2017/0330970) in view of Su et al. (US 2023/0369328) and further in view of Yang et al. (US 2018/0342527) Regarding claim 16, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein a concentration of the boron is between about 1 x 1017 ions/cm2 and about 1 x 1019 ions/cm2. Yang et al. teach a source/drain region doped with boron concentration of 1×10.sup.14/cm.sup.3 to 2.5×10.sup.16/cm.sup.3 (paragraph 0028) with motivation to optimize device threshold voltage. Therefore, the concentration is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the concentration as Yang et al. has identified the concentration as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the claimed concentration range, in order to achieve desired dosage implant to effect the threshold voltage, MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed concentration is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed concentration). Regarding claim 17, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein a concentration of the arsenic is between about 1 x 1019 ions/cm2 and about 1 x 1021 ions/cm2 Yang et al. teach a source/drain region doped with asrenic concentration of 1×10.sup.12/cm.sup.3 to 1×10.sup.15/cm.sup.3 (paragraph 0028) with motivation to optimize device threshold voltage. Therefore, the concentration is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the concentration as Yang et al. has identified the concentration as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the claimed concentration range, in order to achieve desired dosage implant to effect the threshold voltage, MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed concentration is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed concentration). Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over by Malinowski et al. (US 2017/0330970) in view of Su et al. (US 2023/0369328) and further in view of Liaw (US 2021/0313333). Regarding claim 25, Malinowski et al. modified by Su et al. teach all of the limitations as discussed above. Malinowski et al. modified by Su et al. do not explicitly disclose wherein the gate comprises titanium nitride or titanium silicide. Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select titanium nitride as a gate material as shown by Liaw (paragraph 0070), since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Conclusion THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/Primary Examiner, Art Unit 2813
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Prosecution Timeline

May 27, 2022
Application Filed
Feb 06, 2025
Non-Final Rejection — §103
May 09, 2025
Response Filed
Jun 18, 2025
Final Rejection — §103
Aug 20, 2025
Request for Continued Examination
Aug 25, 2025
Response after Non-Final Action
Sep 11, 2025
Non-Final Rejection — §103
Dec 16, 2025
Response Filed
Feb 05, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
91%
Grant Probability
91%
With Interview (+0.0%)
2y 1m
Median Time to Grant
High
PTA Risk
Based on 955 resolved cases by this examiner. Grant probability derived from career allow rate.

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