DETAILED ACTION
Election/Restrictions
Applicant's election with traverse of Group I, claims 1-19, in the reply filed on 10/21/25 is acknowledged. The traversal is on the ground(s) that there are no claims to the different species. This is found persuasive and the species restriction is removed, but can be reinstated pending future claim amendments.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-19, and 26-31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al., US 10,903,170, in view of Mori et al., US 7,091,589.
Regarding claim 1, Lee (figure 6) teaches an apparatus comprising:
a glass core layer 111a defining a plurality of holes 113a between a first side of the glass core layer 111a and a second side of the glass core layer 111a opposite the first side;
a conductive metal 113a inside the holes of the glass core layer 111a, the conductive metal 113a electrically coupling the first side of the glass core layer 111a and the second side of the glass core layer 111a.
Lee fails to teach a dielectric material on a surface of the first side of the glass core layer, a surface of the second side glass core layer, and between the conductive metal and inside surfaces of the holes of the glass core layer, wherein the dielectric material includes nitrogen or carbon.
Mori (figure 2) teaches teach a dielectric material 6 on a surface of the first side of the glass core layer 111a, a surface of the second side glass core layer 111a, and between the conductive metal 5 and inside surfaces of the holes 4 of the glass core layer 2’, wherein the dielectric material 6 includes nitrogen or carbon (column 7, lines 26-28 teaches SiN).
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the dielectric material of Mori in the invention of Lee because Mori teaches it is an insulating materials that insulates the TSV 5 from the glass core layer.
With respect to claim 2, Mori (figure 2) teaches the dielectric material includes one or more of silicon nitride (column 7, lines 26-28 teaches SiN), silicon oxynitride, and silicon carbide.
As to claim 3, Mori (figure 2) teaches the dielectric material 6 completely covers a surface of the first side of the glass core layer 2’ and a surface of the second side of the glass core layer 2’.
In re claim 4, though Mori fails to teach the dielectric material has a thickness between 25 – 250 nm, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Concerning claim 5, Mori (figure 2) teaches metal traces 5a/5b on the first side of the glass core layer 2’ or metal traces 5a/5b on the second side of the glass core layer 2’, wherein the dielectric layer 6 is between the metal traces 5a/5b and the glass core layer 2’.
Pertaining to claim 6, though Mori fails to teach the dielectric layer comprises more nitrogen or carbon than the glass core layer, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the amount of nitrogen or carbon through routine experimentation (MPEP 2144.05).
In claim 7, Mori (figure 2) teaches the dielectric material 6 on the first surface of the glass core layer 2’ is coupled to the dielectric material 6 on the second surface of the glass core layer 2’ by the dielectric material 6 on the inside surfaces of the holes 4.
Regarding claim 8, Mori (figure 2) teaches a buildup layer 10a/8a/7a having a plurality of metallization layers 7a connected by metal pillars 8a, at least one metallization layer 7a of the buildup layer 10a/8a coupled to the conductive metal 5 inside the holes 4 of the glass core layer 2’ on the first side of the glass core layer 2’.
With respect to claim 9, Mori (figure 4) teaches the buildup layer 10a/8a is a first buildup layer 10a/8a and the apparatus further comprises a second buildup layer 118/114 having a plurality of metallization layers 114 connected by metal pillars 118, at least one metallization layer 114 of the second buildup layer 118/114 coupled to the conductive metal 5 inside the holes 4 of the glass core layer 2’ on the second side of the glass core layer 2’.
As to claim 10, Lee (figure 2) teaches a capacitor 126 coupled to a metallization layer 127 of the second buildup layer 113a.
In re claim 11, Mori (figure 2) teaches there is no metal 5 in contact with the glass core layer 2’.
Concerning claim 12, Lee (figure 6) teaches an integrated circuit package comprising the apparatus of claim 1 and an integrated circuit die 140 coupled to the apparatus.
Pertaining to claim 13, Lee (figure 6) teaches a system comprising:
an integrated circuit package comprising:
an integrated circuit die 140; and
a package substrate 111a comprising circuitry 113b/112b to interconnect the integrated circuit die 140 with a main circuit board, the package substrate comprising:
a glass core layer 111a;
a plurality of through-glass vias (TGVs) 113a in the glass core layer 111a, the TGVs 113a comprising conductive metal 113a.
Lee fails to teach a dielectric material between the TGVs and the glass core layer, wherein the dielectric material includes nitrogen or carbon.
Mori (figure 2) teaches a dielectric material 6 between the TGVs 5 and the glass core layer 2’, wherein the dielectric material 6 includes nitrogen or carbon (column 7, lines 26-28 teaches SiN).
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the dielectric material of Mori in the invention of Lee because Mori teaches it is an insulating materials that insulates the TSV 5 from the glass core layer.
In claim 14, Lee (figure 6) teaches the TGVs 113a comprise: first metal pads 112a on a first side of the glass core layer 111a; second metal pads 112a on a second side of the glass core layer 111a; and metal 113a coupling the first and second metal pads 112a inside holes 113a of the glass core layer 111a.
Regarding claim 15, Lee (figure 6) teaches the package substrate further comprises: a first buildup layer 111a/113c on a first side of the glass core layer 111a; a second buildup layer 111b/113b on a second side of the glass core layer 111a, the first buildup layer 111a/113c connected to the second buildup layer 111b/113b by the TGVs 113a.
With respect to claim 16, Mori (figure 2) teaches the dielectric material 6 includes one or more of silicon nitride (column 7, lines 26-28 teaches SiN), silicon oxynitride, and silicon carbide.
As to claim 17, Lee (column 11, lines 8-11) the conductive metal 113a is copper or a copper alloy.
In re claim 18, though Mori fails to teach the dielectric layer 6 comprises more nitrogen or carbon than the glass core layer, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the nitrogen or carbon through routine experimentation (MPEP 2144.05).
Concerning claim 19, though Lee fails to teach a main circuit board coupled to the integrated circuit package, it would have been obvious to one of ordinary skill in the art at the time of the invention to use a main circuit board in the invention of Lee because a main circuit board is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Pertaining to claim 26. (New) An integrated circuit device comprising:
a package substrate comprising:
first buildup layers 111c/113c comprising a plurality of metallization layers 113c;
second buildup layers 111b/113b comprising a plurality of metallization layers 113b;
a glass core layer 111a between the first buildup layers 111c/113c and the second buildup layers 111b/113b;
a plurality of through-glass vias (TGVs) 113a in the glass core layer 111a electrically conductively coupling the first buildup layers 111c/113c and the second buildup layers 111b/113b.
Lee fails to teach a dielectric material between the TGVs and the glass core layer.
Mori (figure 2) teaches a dielectric material 6 between the TGVs 5 and the glass core layer 2’.
It would have been obvious to one of ordinary skill in the art at the time of the invention to use the dielectric material of Mori in the invention of Lee because Mori teaches it is an insulating materials that insulates the TSV 5 from the glass core layer.
In claim 27, Mori (column 7, lines 26-28 teaches SiN) teaches the dielectric material 6 includes nitrogen or carbon.
Regarding claim 28, Mori (column 7, lines 26-28 teaches SiN) teaches the dielectric material 6 includes one or more of silicon nitride, silicon oxynitride, and silicon carbide.
With respect to claim 29, wherein the dielectric material 6 completely covers a surface of the glass core layer 2’ between the glass core layer 2’ and the first buildup layers 3 and a surface of the glass core layer 2’ between the glass core layer 2’ and the second buildup layers 9a/5a.
As to claim 30, though Mori fails to teach the dielectric material 6 has a thickness between 25 – 250 nm, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
In re claim 31, Lee (figure 6) teaches an integrated circuit die 140 coupled to the package substrate.
Conclusion
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/DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 1/7/26