DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 12, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Bao et al (US Publication No. 2017/0200720) in view of Saha et al (US Publication No. 2023/0042167) and Disney et al (US Publication No. 2008/0210980).
Regarding claim 1, Whereas Bao discloses an apparatus comprising: a first transistor Fig 2A, 250, of a first conductivity type ¶0041 having a first gate insulating film Fig 2A, 201 and a first gate structure on the first gate insulating film Fig 2A, 201, the first gate structure including a first conductive film Fig 2A, 206 on the first gate insulating film Fig 2A, 201, a second conductive film Fig 2A, 202 on the first conductive film Fig 2A, 206 and a third conductive film Fig 2A, 203 on the second conductive film Fig 2A, 202; and a second transistor Fig 2A, 200 of the first conductivity type¶0040 having a second gate insulating film Fig 2A, 201 and a second gate structure on the second gate insulating film Fig 2A, 201, the second gate structure including a fourth conductive film Fig 9, 202 disposed directly on the second gate insulating film Fig 2A, 201 and a fifth conductive film Fig 2A, 203 on the fourth conductive film Fig 2A, 202; wherein the first gate insulating film and the second gate insulating film are the same as each other Fig 2A, 201 ¶0041-0043; wherein the second conductive film and the fourth conductive film are the same as each other ¶0034-0035; and wherein the third conductive film and the fifth conductive film Fig 2A, 203 are the same as each other ¶0034-0035. Bao discloses all the limitations except for the arrangement of the isolation region and having two P channel MOSFET.
Whereas Saha discloses a semiconductor substrate; a first transistor of a first conductivity type ¶0037 disposed in a first active region of the semiconductor substrate, the first transistor having a first impurity of a first type disposed in a first well Fig 2, 118 of the semiconductor substrate, a first channel doping impurity disposed on the first impurity of the first type ¶0037-0038, a first gate insulating film and a first gate structure on the first gate insulating film Fig 2, and a second transistor of the first conductivity type disposed in a second active region of the semiconductor substrate Fig 2, the second transistor having a second impurity of a first type disposed in a second well of the semiconductor substrate¶0037-0038 (can be any combination of P type and N type transistor), a second channel doping impurity disposed on the second impurity of the second type¶0037-0038, a second gate insulating film and a second gate structure on the second gate insulating film¶0037-0038, and an isolation insulating film Fig 2, 202 disposed between the first active region and the second active region of the semiconductor substrate Fig 2.
While Disney discloses an apparatus comprising: a semiconductor substrate; a first P-channel metal oxide semiconductor field effect transistor (MOSFET) Fig 1A, 100A disposed in a first active region of the semiconductor substrate Fig 1A, 101, the first P-channel MOSFET having a first impurity of a first type disposed in a first well Fig 1A, NW1A/NW1B of the semiconductor substrate, a first gate insulating film Fig 1A, 115A and a first gate structure Fig 1A, 109A on the first gate insulating film Fig 1A, 115A, a second P-channel MOSFET Fig 1A, 100B disposed in a second active region of the semiconductor substrate Fig 1A, 101, the second transistor disposed in a second well Fig 1A, NW1A/NW1B of the semiconductor substrate Fig 1A, 101, a second gate insulating film Fig 1A, 115A and a second gate structure Fig 1A, 109A on the second gate insulating film Fig 1A, 115A, an isolation insulating film Fig 1A, 135A disposed between the first active region and the second active region of the semiconductor substrate Fig 1A;wherein the first gate insulating film and the second gate insulating film are the same as each other ¶0045.
Bao, Saha and Disney are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Bao because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the arrangement of the isolation structure to improve device separation and it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the doping requirements to achieve the type of device desired.
Regarding claim 2, Disney discloses, wherein each of the first P channel MOSFET and the P channel MOSFET has a planar-type structure Fig 1A.
Regarding claim 6, Bao discloses wherein each of the first gate insulating film and the second gate insulating film includes a High-K insulating material ¶0031.
Regarding claim 7, Bao discloses wherein each of the first gate insulating film and the second gate insulating film includes hafnium oxide¶0031.
Claims 3-5, 8-13 are rejected under 35 U.S.C. 103 as being unpatentable over Bao et al (US Publication No. 2017/0200720), Saha et al (US Publication No. 2023/0042167) and Disney et al (US Publication No. 2008/0210980) in further view of Lee et al (US Publication No. 2021/0091077).
Regarding claim 3, Bao discloses all the limitations but silent on the properties of the layers. Whereas Lee in view of Disney discloses wherein the first transistor has a first threshold voltage, and the second transistor has a second threshold voltage different from the first threshold voltage ¶0040. Bao and Lee are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Bao because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the properties of the device by modifying material/ dimensions used for the conductive film to improve device performance and since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of design choice. In re Leshin, 125 USPQ 416 (1960).
Regarding claim 4, Lee discloses wherein the third conductive film includes a material that adjusts the effective work function of the first gate structure, and the fifth conductive film includes a material that adjusts the effective work function of the second gate structure ¶0036-0037.
Regarding claim 5, Lee discloses wherein each of the third conductive film and the fifth conductive film includes aluminum ¶0036.
Regarding claim 8, Bao discloses an apparatus comprising: a first transistor Fig 2A, 500 of a first conductivity type ¶0059 having a first gate insulating film ¶0063, a second gate insulating film Fig 5A,501 on the first gate insulating film ¶0063 and a first gate structure on the second gate insulating film Fig 5A, 501 the first gate structure including a first conductive film Fig 5A, 502 disposed directly on the second gate insulating film Fig 5A,501, a second conductive film Fig 5A, 503 on the first conductive film Fig 5A, 502, a third conductive film Fig 5A, 504 on the second conductive film Fig 5A, 503 and a fourth conductive film Fig 5A, 505 on the third conductive film Fig 5A, 504; and a second transistor Fig 5A, 550 of the first conductivity type ¶0059 having a third gate insulating film ¶0063, a fourth gate insulating film Fig 5A, 501 on the third gate insulating film ¶0063 and a second gate structure on the fourth gate insulating film Fig 5A, 501, the second gate structure including a fifth conductive film Fig 5A, 502 on the Fig 5A, 501, a sixth conductive film Fig 5A, 503 on the fifth conductive film Fig 5A, 502, a seventh conductive film Fig 5A, 504 on the sixth conductive film Fig 5A, 503 and an eighth conductive film Fig 5A, 505 on the seventh conductive film Fig 5A, 504; wherein the first gate insulating film ¶0063 and the third gate insulating film ¶ 0063 are the same as each other ¶ 0063; wherein the second gate insulating film Fig 5A, 501 and the fourth gate insulating film Fig 5A, 501 are the same as each other ¶0063; wherein the first conductive film and the fifth conductive film Fig 5A, 502 include a same material as each other ¶0034; wherein the second conductive film and the sixth conductive film Fig 5A, 503 are the same as each other¶0036; wherein the third conductive film and the seventh conductive film Fig 5A, 504 are the same as each other¶0034; wherein the fourth conductive film and the eighth conductive film Fig 5A, 505 are the same as each other¶0034-0035. Bao discloses all the limitations but silent on the thickness of the layer. Whereas Lee discloses wherein the fifth conductive film is thinner than the first conductive film¶0040.Bao and Lee are analogous art because they are directed to semiconductor devices having metal gates and one of ordinary skill in the art would have had a reasonable expectation of success to modify Bao because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the properties of the device by modifying the dimensions used for the conductive film to improve device performance and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F. 2d 272, 205 USPQ (CCPA 1980). Bao discloses all the limitations except for the arrangement of the isolation region.
Saha discloses a semiconductor substrate; a first transistor of a first conductivity type ¶0037 disposed in a first active region of the semiconductor substrate, the first transistor having a first impurity of a first type disposed in a first well Fig 2, 118 of the semiconductor substrate, a first channel doping impurity disposed on the first impurity of the first type ¶0037-0038, a first gate insulating film and a first gate structure on the first gate insulating film Fig 2, and a second transistor of the first conductivity type disposed in a second active region of the semiconductor substrate Fig 2, the second transistor having a second impurity of a first type disposed in a second well of the semiconductor substrate¶0037-0038(can be any combination of P type and N type transistor), a second channel doping impurity disposed on the second impurity of the second type¶0037-0038, a second gate insulating film and a second gate structure on the second gate insulating film¶0037-0038, and an isolation insulating film Fig 2, 202 disposed between the first active region and the second active region of the semiconductor substrate Fig 2. While Disney discloses an apparatus comprising: a semiconductor substrate; a first P-channel metal oxide semiconductor field effect transistor (MOSFET) Fig 1A, 100A disposed in a first active region of the semiconductor substrate Fig 1A, 101, the first P-channel MOSFET having a first impurity of a first type disposed in a first well Fig 1A, NW1A/NW1B of the semiconductor substrate, a first gate insulating film Fig 1A, 115A and a first gate structure Fig 1A, 109A on the first gate insulating film Fig 1A, 115A, a second P-channel MOSFET Fig 1A, 100B disposed in a second active region of the semiconductor substrate Fig 1A, 101, the second transistor disposed in a second well Fig 1A, NW1A/NW1B of the semiconductor substrate Fig 1A, 101, a second gate insulating film Fig 1A, 115A and a second gate structure Fig 1A, 109A on the second gate insulating film Fig 1A, 115A, an isolation insulating film Fig 1A, 135A disposed between the first active region and the second active region of the semiconductor substrate Fig 1A;wherein the first gate insulating film and the second gate insulating film are the same as each other ¶0045.
Bao, Saha and Disney are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Bao because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the arrangement of the isolation structure to improve device separation and it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the doping requirements to achieve the type of device desired.
Regarding claim 9, Disney discloses, wherein each of the first P channel MOSFET and the P channel MOSFET has a planar-type structure Fig 1A.
Regarding claim 10, Lee in view of Disney discloses wherein the first transistor has a first threshold voltage, and the second transistor has a second threshold voltage different from the first threshold voltage¶0040.
Regarding claim 11, Lee discloses wherein the third conductive film includes a material that adjusts the effective work function of the first gate structure, and the seventh conductive film includes a material that adjusts the effective work function of the second gate structure¶0036-0037.
Regarding claim 12, Bao discloses wherein each of the third conductive film and the seventh conductive film includes aluminum ¶0034 and 0057.
Regarding claim 13, Lee discloses wherein the second gate insulating film and the fourth gate insulating film includes hafnium oxide¶0022.
Response to Arguments
Applicant’s arguments with respect to claims 1-13 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
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