DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 6-35 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 05/22/2025.
Response to Arguments
Applicant’s arguments, see pages 14-20, filed 10/15/2025, with respect to the rejection(s) of claims 1-5 and 36-47 under 102 and 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Pioro-Ladriere et al. (US 20190130298 A1) and Andreev et al. (US 20170288076 A1).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) and further in view of Hanafi (US 20090134444 A1).
Regarding claim 1, Pioro-Ladriere discloses a quantum device, comprising:
a substrate (592) with an insulation surface (interface of 591); ([0060], Fig. 5B) and
at least one quantum component (QD) disposed on (from below) the insulation surface (interface of 591) of the substrate (592) comprising:
a first plateau member (743); ([0070], Fig. 7A)
a second plateau member (752) separated from the first plateau member (743) and disposed at an angle (see Fig. 7A) against the first plateau member (743); ([0070], Fig. 7A)
a first quantum dot (QD1) disposed at an included-angle (See Fig. 7A) location of the first plateau member (743) and the second plateau member (752), the first quantum dot (QD1) comprising semiconductor materials (per [0064]);
Pioro-Ladriere does not disclose:
a first quantum dot formed within a first insulation body and
wherein a largest distance between any two points of the first quantum dot in the quantum component is less than or equal to two times of an exciton Bohr radius of the material of the first quantum dot.
However, Hanafi discloses:
a first quantum dot (30) formed within a first insulation body (34), ([0031], Fig. 1) and
“Quantum confinement describes how the electronic properties--the organization of energy levels into which electrons can climb or fall--change when a nanoparticle is sufficiently small in size. This size is typically 10 nanometers (nm) or less. Specifically, the phenomenon results from electrons and holes being squeezed into a dimension that approaches a critical quantum measurement, called the "exciton Bohr radius." The larger the particle size, the lower the ground state and, therefore, the longer the charge can be retained. The smaller the particle size, the more easily the electron stays in a shallow energy level so that it can come out more readily.” In [0055].
Therefore, it would have been obvious to one skilled in the aft before the effective filing date to combine the teachings of Pioro-Ladriere and Hanafi for a first quantum dot formed within a first insulation body because “an advantage of some embodiments may be that high-temperature annealing of dopant occurs prior to formation of the control gate. In such embodiments, the control gate may comprise materials that would otherwise be negatively affected by the high-temperature annealing, such as various metals and metal-containing compositions.” (Hannafi, [0032])
Furthermore, it would have been obvious to one skilled in the aft before the effective filing date to combine the teachings of Pioro-Ladriere and Hanafi for a largest distance between any two points of the first quantum dot in the quantum component is less than or equal to two times of an exciton Bohr radius of the material of the first quantum dot because “the smaller the particle size, the more easily the electron stays in a shallow energy level so that it can come out more readily” (Hanafi, [0055]) so as to improve device scaling (Hanafi, [0006])
Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) as applied to claim 1, and further in view of Lampert et al. (US 20190043968 A1).
Regarding claim 2, Pioro-Ladriere discloses the quantum device of claim 1, wherein the at least one quantum component is a single electron transistor (SET) (per [0078]) or a single hole transistor (SHT) and further comprises:
a first plunger gate (711) disposed, in a self-aligned process, adjacent to the first quantum dot (QD1) and between the first plateau member (743) and the second plateau member (752), ([00070], Fig. 7A)
wherein the first quantum dot (QD1) is formed in approximately a spherical shape (dashed lines); (Fig. 7A)
wherein the first plateau member (743), the second plateau member (752), and the first plunger gate (711) are electrically conductive. ([0070], Fig. 7A)
Pioro-Ladriere does not disclose:
a first insulating layer formed on the first plateau member and the second plateau member;
However, Lampert discloses:
and further comprises: a first insulating layer (208) formed on the first plateau member (206 left) and the second plateau member (206 right); ([0055], Fig. 2A)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Cain, Pioro-Ladriere, and Lampert for the SET to further comprise a first insulating layer formed on the first plateau member and the second plateau member because “, if sample uniformity is poor, e.g. as a result of manufacturing variations or lack of adequate control, there may be one or more additional dopant atoms present in locations where they are not supposed to be present,” (Lampert, [0033]) and therefore its necessary “ to prevent or minimize such interaction” (Lampert, [0033])
Regarding claim 3, Pioro-Ladriere discloses the quantum device of claim 2, wherein
the first plateau member (743) and the second plateau member (752) comprise semiconductor materials (polycrystalline silicon per [0070]).
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) as applied to claim 3 above, and further in view of Chan et al. (US 20150236284 A1).
Regarding claim 4, Pioro-Ladriere disclose the quantum device of claim 3, wherein
the first plateau member (743) and the second plateau member (752) comprise silicon (per [0070])
the first quantum dot (QD1) comprises germanium (per [0063]).
Pioro-Ladriere does not disclose:
the first insulation body comprises silicon dioxide.
However, Chan discloses:
the first insulation body (52) comprises silicon dioxide (per [0039]). (Fig. 9)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Chan for the first insulation body comprises silicon dioxide in order to improve “charge retention in the core material” (Chan, [0039])
Regarding claim 5, Chan discloses the quantum device of claim 4, wherein a diameter of the first quantum dot (38) is less than approximately 25 nm (per Chan, [0041]).
Claim 36-38, 40, 43-45, and 47 are rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) and further in view of Andreev et al. (US 20170288076 A1).
Regarding claim 36, Pioro-Ladriere discloses a quantum device, comprising:
a substrate (592) with an insulation surface (interface of 591); ([0060], Fig. 5B) and
at least one quantum component (QD) disposed on (from below) the insulation surface (interface of 591) of the substrate (592) comprising:
multiple plateau members (743, 752), each of which is disposed at an angle (See Fig. 7A) against an adjacent plateau member; (Fig. 7A)
at least one quantum dot (QD1) disposed at an included-angle location (See Fig. 7A) of two adjacent plateau members (743, 752) of the multiple plateau members (743,752) ([0070]), each of the quantum dot comprising semiconductor materials (per [0063]);
Pioro-Ladriere does not disclose:
each of which is formed within an insulation body and
the at least one quantum component is operable at a temperature above 4 K.
However, Andreev discloses:
each of which is formed within an insulation body (4), ([0036],Fig. 5)
the at least one quantum component is operable at a temperature above 4 K. ([0017], Fig. 5)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Pioro-Ladriere and Andreev for at least one quantum dot to be formed within an insulation body in order to “help to isolate quantum dot states” (Andreev, [0006])
Furthermore, it would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Pioro-Ladriere and Andreev for the at least one quantum component is operable at a temperature above 4 K in order “to increase intervalley splitting in a silicon-based quantum dot device” (Andreev, [0004])
Regarding claim 37, Andreev discloses the quantum device of claim 36 wherein the at least one quantum component is operable at a temperature above 77 K (per [0003])
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Pioro-Ladriere and Andreev for reasons similar as stated above.
Regarding claim 38, Pioro-Ladriere discloses the quantum device of claim 36, wherein the at least one quantum dot (QD1) has approximately a spherical shape (dashed lines of Fig. 7A).
Regarding claim 40, Pioro-Ladriere discloses the quantum device of claim 38, wherein the at least one quantum dot (QD1) comprises germanium (per [0063]).
Regarding claim 43, Andreev discloses the quantum device of claim 36, wherein the at least one quantum dot is formed by thermal oxidation of semiconductor-alloyed material. ([0037], [0039], Fig.5-6)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Pioro-Ladriere and Andreev for at least one quantum dot is formed by thermal oxidation of semiconductor-alloyed material in order to “ form a uniform silicon dioxide layer with small thickness variability.” (Andreev, [0039])
Regarding claim 44, Pioro-Ladriere discloses the quantum device of claim 36, wherein the at least one quantum component (QD) further comprises a plunger gate (651) formed by a self-aligned process for each quantum dot (QD). ([0064], Fig. 6A-6E)
Regarding claim 45, Pioro-Ladriere discloses the quantum device of claim 36, wherein each quantum component (QD) is independently addressable. ([0080])
Regarding claim 47, Pioro-Ladriere discloses the quantum device of claim 36, wherein
the at least one quantum component (QD1) comprises at least one of a single electron transistor (SET) (per [0078]), a single hole transistor (SHT), a single electron transistor invertor (SETI), a single hole transistor inverter (SHTI), a qubit and a double qubit.
Claims 39 and 41 are rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) view of Andreev et al. (US 20170288076 A1) as applied to claim 38 above and further in view of Hanafi (US 20090134444 A1).
Regarding claim 39, Pioro-Ladriere discloses the quantum device of claim 38. Pioro-Ladriere does not disclose wherein the at least one quantum dot has a diameter less than an exciton Bohr radius of the material of the quantum dot.
However, Hanafi discloses:
“Quantum confinement describes how the electronic properties--the organization of energy levels into which electrons can climb or fall--change when a nanoparticle is sufficiently small in size. This size is typically 10 nanometers (nm) or less. Specifically, the phenomenon results from electrons and holes being squeezed into a dimension that approaches a critical quantum measurement, called the "exciton Bohr radius." The larger the particle size, the lower the ground state and, therefore, the longer the charge can be retained. The smaller the particle size, the more easily the electron stays in a shallow energy level so that it can come out more readily.” In [0055]
Therefore, it would have been obvious to one skilled in the aft before the effective filing date to combine the teachings of Pioro-Ladriere and Hanafi for the at least one quantum dot has a diameter less than an exciton Bohr radius of the material of the quantum dot because “the smaller the particle size, the more easily the electron stays in a shallow energy level so that it can come out more readily” (Hanafi, [0055]) so as to “improve device scaling.” (Hanafi, [0006])
Regarding claim 41, Hanafi disclose the quantum device of claim 39, wherein the at least one quantum dot (30) has a diameter less than 25 nm (per [0029]).
Claims 42 is rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) view of Andreev et al. (US 20170288076 A1) as applied to claim 40 above and further in view of Chan et al. (US 20150236284 A1).
Regarding claim 42, Pioro-Ladriere discloses the quantum device of claim 40. Pioro-Ladriere does not disclose wherein the at least one quantum dot comprises approximately 100% germanium.
However, Chan discloses:
the at least one quantum dot (38) comprises approximately 100% germanium (per [0039]).
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Pioro-Ladriere and Chan for the at least one quantum dot comprises approximately 100% germanium in order to “improve charge retention in the core material” (Chan, [0039]).
Claims 46 is rejected under 35 U.S.C. 103 as being unpatentable over Pioro-Ladriere et al. (US 20190130298 A1) view of Andreev et al. (US 20170288076 A1) as applied to claim 40 above and further in view of Cain et al. (US 20030040168 A1).
Regarding claim 46, Pioro-Ladriere discloses the quantum device of claim 40. Pioro-Ladriere does not disclose wherein a distance between two adjacent quantum dots of the multiple quantum dots is less than 20 nm.
However, Cain discloses:
a distance between two adjacent quantum dots (in 2 and 3) of the multiple quantum dots (2 and 3) is less than 20 nm. (per Cain, [0064])
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Chan and Cain for a distance between two adjacent quantum dots of the multiple quantum dots is less than 20 nm in order to “provide an improved quantum computer” (Cain, [0016])
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600.
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/ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897