DETAILED ACTION
This Office action is in response to the amendment filed 8 January 2026. By this amendment, claims 1-5 are amended; claim 6 is cancelled. Claims 1-17 are currently pending; claims 10-17 stand withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-5 and 7-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, and 7-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2017/0352727 A1 to Cheng et al. (hereinafter “Cheng”).
Regarding independent claim 1, Cheng (Figs. 11A-C) discloses a semiconductor device, comprising:
a plurality of fins 302 (¶ 0054; Fig. 11A) grouped in a fin array, wherein:
a first symmetrical cross-sectional profile of an upper portion (Figs. 11B, 11C - “top portion of fins”) of each of the plurality of fins 302 located above a top surface of a shallow trench isolation layer 802 (¶ 0055) is substantially similar (Figs. 11B-11C);
a second symmetrical cross-sectional profile of a bottom portion (portion of 302 below the top surface of 802) of one or more inner fins 302 (Fig. 11B) in the fin array located below the top surface of the shallow trench isolation layer 802 is different than a third profile of the bottom portion (Fig. 11C - portion of 302 below top surface of 802) of edge fins 302 (Fig. 11C) in the fin array located below the top surface of the shallow trench isolation layer 802; and
a smallest lateral width of the bottom portion of the edge fins 302 (Fig. 11C) in the fin array located below the top surface of the shallow trench isolation layer 802 is greater than a largest lateral width of the bottom portion of the one or more inner fins 302 (Fig. 11B) in the fin array located below the top surface of the shallow trench isolation layer 802.
Regarding claim 2, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the first symmetrical cross-sectional profile of the upper portion (Figs. 11B, 11C - “top portion of fins”) of each of the plurality of fins 302 located above the top surface of the shallow trench isolation layer 802 comprise a symmetrical cross-sectional profile selected from the group consisting of a linear tapered profile, a parabolic tapered profile, an exponential tapered profile, and a non-tapered profile having a constant width (Figs. 11B, 11C - non-tapered profile having a constant width).
Regarding claim 3, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the one or more inner fins 302 (Fig. 11B) in the fin array comprise a symmetrical cross-sectional profile selected from the group consisting of a linear tapered profile, a parabolic tapered profile, an exponential tapered profile, and a non-tapered profile having a constant width (Fig. 11 - non-tapered profile having a constant width).
Regarding claim 5, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein: a smallest lateral width of the upper portion (Fig. 11C - “top portion of fins”) of the edge fins 302 (Fig. 11C) in the fin array located above the top surface of the shallow trench isolation layer 802 is substantially similar to a smallest lateral width of the upper portion (Fig. 11B - “top portion of fins”) of the one or more inner fins 302 (Fig. 11B) in the fin array located above the top surface of the shallow trench isolation layer 802; and a largest lateral width of the upper portion (Fig. 11C - “top portion of fins”) of the edge fins 302 (Fig. 11C) in the fin array located above the top surface of the shallow trench isolation layer 802 is substantially similar to a largest lateral width of the upper portion (Fig. 11B - “top portion of fins”) of the one or more inner fins 302 (Fig. 11B) in the fin array located above the top surface of the shallow trench isolation layer 802.
Regarding claim 7, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the shallow trench isolation layer 802 is formed from at least one material selected from the group consisting of silicon dioxide (SiO.sub.2), silicon oxide (SiO), a nitride, an undoped polysilicon, and combinations thereof (¶ 0050 - silicon dioxide).
Regarding claim 8, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the plurality of fins in the fin array are formed from at least one of silicon, gallium arsenide, germanium, or a nano sheet stack (¶ 0040).
Regarding claim 9, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the fin array is formed as part of a FinFET or a Nanoshefet FET (¶ 0038).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Cheng as applied to claim 1 above, and further in view of US 2021/0366776 A1 to Sung et al. (hereinafter “Sung”).
Regarding claim 4, Cheng (Figs. 11A-C) discloses the semiconductor device of claim 1, wherein the one or more inner fins 302 (Fig. 11B) in the fin array have a symmetrical cross-sectional profile.
Cheng fails to expressly disclose: the edge fins in the fin array have an asymmetrical cross-sectional profile. In the same field of endeavor, Sung (Fig. 10) discloses a semiconductor device including fins 204 having an asymmetrical cross-sectional profile (¶ 0057). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the edge fins of Cheng to include an asymmetrical cross-sectional profile as disclosed by Sung for the purpose of providing enhanced electrical properties while decreasing drain induced barrier lowering (DIBL) (¶ 0057).
Conclusion
The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2015/0279971 A1 to Xie et al. disclosing FinFETs having fins with a stepped transition between upper fin portions and lower fin portions; US 2015/0145065 A1 to Kanakasabathy et al. disclosing an etching process for FinFETs including fins with asymmetrical cross-sectional profiles.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Candice Y. Chan whose telephone number is (571)272-9013. The examiner can normally be reached 8:30 am - 5 pm ET.
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CANDICE Y. CHAN
Examiner
Art Unit 2813
7 March 2026
/STEVEN B GAUTHIER/ Supervisory Patent Examiner, Art Unit 2813