DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see remarks, filed 4/2/2026, with respect to claim 1 have been fully considered and are persuasive. The rejection of claims of 1-5 & 7-13 has been withdrawn.
Applicant's arguments filed 4/2/2026 concerning independent claims 15 and 21 have been fully considered but they are not persuasive. In considering the interview held with Applicant on 3/27/2026 and the Applicant’s arguments submitted 4/1/2026, the Examiner’s position is partially maintained. However, without acquiescing to the Applicant’s arguments concerning claims 15 and 21, and in the interest of furthering prosecution, the scope of the rejection is changed. This subsequent action, therefore, is non-final.
Regarding doping, the issue is whether germanium can be considered as a dopant in the context of the claims. A dopant is considered to be a substance added to a semiconductor which modifies its electrical behavior. It is not required that the prospective dopant be of a certain material category e.g., a metal, a group IV metal, etc. In this context, Zhang uses germanium as a dopant for silicon e.g., through the first and second germanium contents, see ¶ [0006]. The first and second germanium contents modifying the electrical behavior of silicon as evidenced by Haddara, Yaser M., Peter Ashburn, and Darren M. Bagnall. "Silicon-germanium: properties, growth and applications." Springer handbook of electronic and photonic materials (2017): see the abstract: 1-1. Additionally, it is not required that a dopant be added to a material in a certain process i.e., the broadest reasonable interpretation of a dopant allows for the additive material to be added to the host semiconductor during the formation process. Because of this, it is believed that in the context of claims 15 and 21, as currently presented, and under the current scope thereof, that the interpretation concerning doping is reasonable.
The above interpretation is further supported by the language of claims 15 and 21. In specific, the concentration of germanium (i.e., the dopant) varies throughout the structure, as it would in many cases (depending on doping method) where a dopant is added to a host material.
To summarize, the claim language of claims 15 and 21 is broad enough to accommodate the interpretation taken concerning doping. The scope of the rejection is changed to further persecution, but the above arguments show that the interpretation concerning doping is still available.
New claims 24 and 25 are acknowledged and examined on the merits.
Specification
The title of the invention is amended in a curative manner. The objection is withdrawn.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 7 is amended in a curative manner. The rejection is withdrawn.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 15-17, & 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. US 20190131396 A1 to Zhang et al. (hereinafter “Zhang”) in view of U.S. Pat. Pub. No. US 20220059414 A1 to Yang et al. (hereinafter “Yang”).
Regarding claim 15, Zhang teaches an integrated circuit structure comprising:
a first device (nFET; fig. 14) [0027] stacked above a second device (pFET; fig. 14) [0027],
wherein the first device (nFET) comprises a first source region (S/C region 26s; fig. 14) [0060] that includes:
a first region (vertically middle to bottom of 26s; fig. 14), and
a second region (vertically near top of 26s; fig. 14) above the first region (middle 26s),
wherein the second device (pFET) comprises a second source region (S/D region 22s; fig. 14) [0055] that includes:
a third region (22s; fig. 14), and
a fourth region (SiGe region 25; fig. 14) [0059] above the third region (22s), wherein each of the third (22s) and fourth (25) source regions comprise silicon and germanium [0055] & [0059], with a concentration of germanium (second germanium content, taught as being between 55 and 75 atomic %) [0059] within the fourth region (25) being higher than a concentration of germanium (first germanium content, taught as being between 50 and 60 atomic %) [0053] within the third region (22s) by at least 10% [0053] & [0059].
A dopant (germanium) in the second region (near top of 26s) and in the first region (middle to bottom of 26s).
Zhang does not teach wherein a doping concentration level of a dopant within the second region is at least 20% more than a doping concentration level of the dopant within the first region,
Yang, however, teaches a stacked nanosheet structure (figs. 6B-10A) comprising second S/D regions (stop layer 352a and 352b; fig. 6B) [0062] positioned above the first S/D region (110A and 110B; fig. 5B) [0037] wherein the second S/D region is doped [0062].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the second S/D region of Zhang with a dopant which modifies etch selectivity resulting in improved manufacturing as taught by Yang [0062].
Zhang in view of Yang do not explicitly teach the dopant concentration difference recited in claim 15. However, Yang establishes that dopants modify etch selectivity and further establishes that the dopant concentration matters for the effectiveness of the layer. It is considered, therefore, that the prior art conditions are established under M.P.E.P. 2144.05 II (A). Indeed, a person of ordinary skill in the art, in light of Yang, would be able to reach the concentration recited by claim 15 through routine optimization/experimentation.
It is noted that a dopant is considered to be a substance added to a semiconductor which modifies its electrical behavior. It is not required that the prospective dopant be of a certain material category e.g., a metal, a group IV metal, etc. In this context, Zhang uses germanium as a dopant for silicon e.g., through the first and second germanium contents, see ¶ [0006]. The first and second germanium contents modifying the electrical behavior of silicon. Haddara, Yaser M., Peter Ashburn, and Darren M. Bagnall. "Silicon-germanium: properties, growth and applications." Springer handbook of electronic and photonic materials (2017): see the abstract: 1-1. Additionally, it is not required that a dopant be added to a material in a certain process i.e., the broadest reasonable interpretation of a dopant allows for the additive material to be added to the host semiconductor during the formation process. Because of this, it is believed that in the context of claims 15 and 21, as currently presented, and under the current scope thereof, that the taken interpretation is reasonable and applies in subsequent rejections.
Regarding claim 16, Zhang in view of Yang teaches the integrated circuit of claim 15, wherein the first device is a n-type MOS (NMOS) device (CMOS device being the field of design [0002] with nFET and pFET accomplishing the “complimentary” requirement of a CMOS device, the nFET device accomplishing the NMOS portion of the complimentary MOS device) [0002], and the second device is a p-type MOS (PMOS) device (CMOS device being the field of design [0002] with nFET and pFET accomplishing the “complimentary” requirement of a CMOS device; the pFET device accomplishing the PMOS portion of the complimentary MOS device) [0002].
Regarding claim 17, Zhang in view of Yang does not explicitly teach the integrated circuit of claim 15, wherein the doping concentration level of the dopant within the second region is at least twice the doping concentration level of the dopant within the first region.
Zhang, however, teaches that portions of S/D regions (25 formed into region 22s; figs. 7 & 14) [0055] & [0059] positioned near the top of the S/D region 22s, the S/D region 22s having a first germanium content (fig. 4) [0011] may be doped with a second concentration of germanium (forming 25; fig. 7), the second concentration being greater than the first [0014] & [0059].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the S/D region 26s of Zhang with a germanium content greater than the first germanium concentration (of region 26s) near the top of 26s to isolate the S/D region 26s as taught by Zhang [0036].
The above establishes the prior art conditions necessary for a person of ordinary skill in the art to arrive at the specific concentration values/relationships established in claim 17 through routine experimentation. M.P.E.P. 2144.05 II (A).
Regarding claim 21, Zhang teaches an integrated circuit structure comprising:
a first semiconductor device (nFET; fig. 14) [0027] in a stacked arrangement (vertically stacked) above or below a second semiconductor device (pFET; fig. 14) [0027],
wherein the first semiconductor device (nFET) comprises:
a first source or drain region (S/D region 26s; fig. 14) that includes a first epitaxial region (middle to bottom 26s), and a second epitaxial region (middle to top 26s) on a top surface (vertically top) of the first epitaxial region (middle 26s), and
wherein the second device (pFET) comprises a second source or drain region (S/D region 22s and 25; fig. 14) [0059] that includes:
a third epitaxial region (22s), and a fourth epitaxial region (25; fig. 14) [0059] on a top surface (vertically top) of the third epitaxial region (22s), wherein each of the third (22s) and fourth (25) epitaxial regions comprises silicon and germanium [0053] & [0059], with a concentration of germanium (second germanium content) [0059] within the fourth epitaxial region (25) being higher than a concentration of germanium (first germanium content) [0053] within the third epitaxial region (22s).
A dopant (germanium) in the second epitaxial region (near top of 26s) and in the first epitaxial region (middle to bottom of 26s).
Zhang does not teach wherein a doping concentration level of a dopant within the second epitaxial region is higher than a doping concentration level of the dopant within the first epitaxial region.
Yang, however, teaches a stacked nanosheet structure (figs. 6B-10A) comprising second S/D regions (stop layer 352a and 352b; fig. 6B) [0062] positioned above the first S/D region (110A and 110B; fig. 5B) [0037] wherein the second S/D region is doped [0062].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the second S/D region of Zhang with a dopant which modifies etch selectivity resulting in improved manufacturing as taught by Yang [0062].
Zhang in view of Yang do not explicitly teach the dopant concentration difference recited in claim 15. However, Yang establishes that dopants modify etch selectivity and further establishes that the dopant concentration matters for the effectiveness of the layer. It is considered, therefore, that the prior art conditions are established under M.P.E.P. 2144.05 II (A). Indeed, a person of ordinary skill in the art, in light of Yang, would be able to reach the concentration recited by claim 21 through routine optimization/experimentation.
It is noted that a dopant is considered to be a substance added to a semiconductor which modifies its electrical behavior. It is not required that the prospective dopant be of a certain material category e.g., a metal, a group IV metal, etc. In this context, Zhang uses germanium as a dopant for silicon e.g., through the first and second germanium contents, see ¶ [0006]. The first and second germanium contents modifying the electrical behavior of silicon. Haddara, Yaser M., Peter Ashburn, and Darren M. Bagnall. "Silicon-germanium: properties, growth and applications." Springer handbook of electronic and photonic materials (2017): see the abstract: 1-1. Additionally, it is not required that a dopant be added to a material in a certain process i.e., the broadest reasonable interpretation of a dopant allows for the additive material to be added to the host semiconductor during the formation process. Because of this, it is believed that in the context of claims 15 and 21, as currently presented, and under the current scope thereof, that the taken interpretation is reasonable and applies in subsequent rejections.
Regarding claim 22, Zhang in view of Yang teaches the integrated circuit of claim 21, wherein the first semiconductor device is a n-type MOS (NMOS) device (CMOS device being the field of design [0002] with nFET and pFET accomplishing the “complimentary” requirement of a CMOS device, the nFET device accomplishing the NMOS portion of the complimentary MOS device) [0002], and the second semiconductor device is a p-type MOS (PMOS) device (CMOS device being the field of design [0002] with nFET and pFET accomplishing the “complimentary” requirement of a CMOS device; the pFET device accomplishing the PMOS portion of the complimentary MOS device) [0002].
Regarding claim 23, Zhang in view of Yang teaches the integrated circuit of claim 21, further comprising: an isolation region (silicon dioxide layer 24; fig. 14) [0060] comprising non-conductive material between the first source or drain region (26s) and the second source or drain region (22s), wherein the first semiconductor device (nFET) is arranged above the second semiconductor device (pFET) and the fourth epitaxial region (25) is between a bottom surface (vertically bottom) of the isolation region (24) and the top surface (vertically top) of the third epitaxial region (22s).
Regarding claim 24, Zhang in view of Yang do not explicitly teach, as presently modified, the integrated circuit of claim 15, wherein the dopant is a n-type dopant.
Zhang, however, teaches that the dopant may be used to modify the electrical behavior of the S/D regions [0068].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the dopant of Zhang to comprise an n-type dopant to form an NFET structure as taught by Zhang [0068].
Regarding claim 25, Zhang in view of Yang do not explicitly teach, as presently modified, the integrated circuit of claim 21, wherein the dopant is a n-type dopant.
Zhang, however, teaches that the dopant may be used to modify the electrical behavior of the S/D regions [0068].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the dopant of Zhang to comprise an n-type dopant to form an NFET structure as taught by Zhang [0068].
Allowable Subject Matter
Claims 1-13 are allowed as claim 1 integrates allowable subject matter through amendment. Claims 2-13 are allowable by virtue of their dependence on an allowable claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ETHAN EDWARD CUTLER whose telephone number is (703)756-5415. The examiner can normally be reached Monday-Friday 7:30 am - 5:00 pm Eastern Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached on (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ETHAN EDWARD CUTLER/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
Prosecution Insights