Prosecution Insights
Last updated: July 17, 2026
Application No. 17/840,019

DISPLAY MODULE AND ELECTRONIC DEVICE INCLUDING THE SAME

Non-Final OA §102§103
Filed
Jun 14, 2022
Priority
May 17, 2021 — RE 10-2021-0063224 +1 more
Examiner
ESIABA, NKECHINYERE OTUOMASIRICH
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
3 (Non-Final)
71%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
10 granted / 14 resolved
+3.4% vs TC avg
Strong +33% interview lift
Without
With
+33.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
31 currently pending
Career history
49
Total Applications
across all art units

Statute-Specific Performance

§103
85.8%
+45.8% vs TC avg
§102
10.2%
-29.8% vs TC avg
§112
3.2%
-36.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 14 resolved cases

Office Action

§102 §103
DETAILED ACTION This Notice is responsive to communication filed on 03/10/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed on 03/10/2026 under 37 CFR 1.111 has been entered. Claims 1, 2, 6, 13, 14, 17, and 19 remain pending in the application. Claim Objections Claim 14 is objected to because of the following informalities: C. Claim will be examined using the latter interpretation. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 6, 13, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuo et al. (US 20170133357). Regarding claim 1, Kuo discloses a display module comprising: a display panel Fig. 4: 100d comprising a substrate Fig. 4: 110, a plurality of light emitting elements Fig. 4: 130a mounted on the substrate Fig. 4: 110, a bank portion Fig. 4: 140a1 disposed on the substrate Fig. 4: 110 to space the plurality of light emitting elements Fig. 4: 130a apart from each other, color conversion layers Fig. 4: 160 disposed in cells defined by the bank portion Fig. 4: 140a1 to cover the light emitting elements Fig. 4: 130a, and an encapsulation layer Fig. 4: 120 covering the bank portion Fig. 4: 140a1 and the color conversion layers Fig. 4: 160; and a driving circuit (para. 0035: TFTs, source, drain, common electrode, conductive structure) disposed on the substrate Fig. 4: 110 and configured to generate a driving signal of the plurality of light emitting elements Fig. 4: 130a, wherein the bank portion Fig. 4: 140a1 comprises: a first layer Fig. 4: 142a1 having a thickness less than a height of an active layer of the light emitting element Fig. 4: 130a (shown in Fig. 4 and Fig. 1D; para. 0035-36 teaches a same height between the LED and the whole bank layer); and a second layer Fig. 4: 144a1 disposed on the first layer Fig. 4: 142a1, spaced apart from a side surface of the light emitting element Fig. 4: 130a, and configured to reflect light emitted from the side surface of the light emitting element Fig. 4: 130a (para. 0039), and wherein at least one of the color conversion layers Fig. 4: 160 is disposed in a space between the bank portion Fig. 4: 140a1 and a side surface of the light emitting element Fig. 4: 130a, and in a space between an upper surface of the substrate Fig. 4: 110 and a bottom surface of the light emitting element Fig. 4: 130a (shown in Fig. 4). Regarding claim 2, Kuo discloses the display module according to claim 1, wherein the first layer Fig. 4: 142a1 has a blackish color (para. 0039, black photoresist). Regarding claim 6, Kuo discloses the display module according to claim 1, wherein an upper end of the second layer Fig. 4: 144a1 is at a location higher than a light emitting surface of the light emitting element Fig. 4: 130a (shown in Fig. 4). Regarding claim 13, Kuo discloses the display module according to claim 1, wherein the light emitting element Fig. 4: 130a comprises a blue micro light emitting diode (LED) configured to emit blue light (para. 0035), and wherein the color conversion layer Fig. 4: 160 is configured to convert the blue light emitted from the blue micro LED into red light or green light (para. 0039 teaches converting blue to red). Regarding claim 17, Kuo discloses the display module according to claim 1, wherein the light emitting element Fig. 4: 130a comprises a blue micro light emitting diode (LED) configured to emit blue light and a green micro LED configured to emit green light (para. 0035), and wherein the color conversion layer Fig. 4: 160 corresponding to the red light is configured to convert the blue light emitted from the blue micro LED into red light (para. 0044 teaches conversion layer 160 with red phosphors covering the blue light LED). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kuo et al. (US 20170133357) as applied to claim 1 above, and further in view of Lee et al. (US 20200373359). Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s). Regarding claim 14, Lee discloses the following claim limitations not disclosed by Kuo: the display module according to claim 1: wherein the first layer Fig. 4A: SP has a light reflectivity of approximately 9% or less. Lee discloses a transmittance of the first layer (i.e. spacer layer SP) greater or equal to 95% in (para. 0113) having a low reflective index (para. 0115). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kuo with Lee in order to effectively increase the luminous efficiency and brightness of the display panel (para. 0115). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Bibl et al. (US 20140339495) and further in view of Lee et al. (US 20200373359). Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s). Regarding claim 19, Bibl discloses an electronic device Fig. 12: 1200 comprising: a display module comprising a display panel Fig. 4D comprising a substrate Fig. 4D: 201, a plurality of light emitting elements Fig. 4D: 100 mounted on the substrate Fig. 4D: 201, a bank portion Fig. 4D: 202+324 disposed on the substrate Fig. 4D: 201 to space the plurality of light emitting elements Fig. 4D: 100 apart from each other, color conversion layers Fig. 4D: 110 disposed in cells defined by the bank portion Fig. 4D: 202+324 to cover the light emitting elements Fig. 4D: 100, an encapsulation layer Fig. 5: 500 (para. 0077) covering the bank portion Fig. 4D: 202+324 and the color conversion layers Fig. 4D: 110, and a driving circuit Fig. 12: 1240 disposed on the substrate Fig. 4D: 201 and configured to generate a driving signal of the plurality of light emitting elements Fig. 4D: 100 (para. 0083); and a processor Fig. 12: 1210 configured to control the driving circuit Fig. 12: 1240 to generate a driving signal for controlling light emission of the plurality of light emitting elements Fig. 4D: 100 (para. 0083), wherein the bank portion Fig. 4D: 202+324 comprises at least two layers including: a first layer Fig. 4D: 324 having a thickness less than a height of an active layer of the light emitting element Fig. 4D: 100 (shown in Fig. 4D); and a second layer Fig. 4D: 202 disposed on the first layer Fig. 4D: 324, spaced apart from a side surface of the light emitting element Fig. 4D: 100, and configured to reflect light emitted from the side surface of the light emitting element Fig. 4D: 100 (para. 0043 teaches a white matrix material to reflect), and wherein the first layer has a reflectivity less than a reflectivity of the second layer, and wherein the color conversion layer Fig. 4D: 110 is disposed in a space between the bank portion Fig. 4D: 202+324 and a side surface of the light emitting element Fig. 4D: 100, and in a space between an upper surface of the substrate Fig. 4D: 201 and a bottom surface of the light emitting element Fig. 4D: 100 (shown in Fig. 4D). Lee discloses the following claim limitations not disclosed by Bibl: where the first layer Fig. 4: SP has a reflectivity less than a reflectivity of the second layer Fig. 4: MT. Lee discloses a reflective layer MT (i.e. second layer) with a reflectance of about 70% to 80%, and a spacer layer (i.e. first layer) with a transmittance greater or equal to 95% in (para. 0113) having a low reflective index (para. 0115). This would equate to a second layer with a higher reflectivity than a first layer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kuo with Lee in order to effectively increase the luminous efficiency and brightness of the display panel (para. 0115). Response to Arguments Applicant’s arguments with respect to claim(s) 1 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NKECHINYERE ESIABA whose telephone number is (571)272-0720. The examiner can normally be reached Monday - Friday 10am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nkechinyere Esiaba/Examiner, Art Unit 2817 /Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Jun 14, 2022
Application Filed
Jun 04, 2025
Non-Final Rejection mailed — §102, §103
Sep 04, 2025
Response Filed
Dec 10, 2025
Non-Final Rejection mailed — §102, §103
Mar 10, 2026
Response Filed
Jun 08, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12550491
DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME AND TILED DISPLAY DEVICE INCLUDING THE SAME
3y 2m to grant Granted Feb 10, 2026
Patent 12506102
FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH FACE MOUNTED PASSIVES AND METHOD OF MAKING THE SAME
3y 5m to grant Granted Dec 23, 2025
Patent 12489076
POWER MODULE FOR HIGH-FREQUENCY USE AND METHOD FOR MANUFACTURING THE SAME
3y 4m to grant Granted Dec 02, 2025
Patent 12457832
LIGHT EMITTING DEVICE AND DIFFUSION MEMBER USED THEREIN
2y 12m to grant Granted Oct 28, 2025
Patent 12309994
METHOD OF MANUFACTURING MEMORY DEVICE HAVING DOUBLE SIDED CAPACITOR
3y 2m to grant Granted May 20, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
71%
Grant Probability
99%
With Interview (+33.3%)
3y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 14 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month