Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
The amendments and new drawings filed on 06/28/2026 has been considered. However, the amendments and drawings introduce new matter not disclosed in specification. Further the amended claim 1 is incorrect as currently written. Hence, claims 1-20 are rejected under 35 U.S.C. 112(a) and 35 U.S.C. 112(b), as explained below. Further, the newly filed drawings have been objected to.
Drawings
The new drawings were received on 06/08/2026. These drawings are unacceptable.
The new drawings, Figs. 2 and 3, show second CMOS substrate 12’ bonded to first CMOS substrate 12. This is not consistent with the specification. Moreover, it shows second CMOS substrate 12’ having dimensions smaller than the first CMOS substrate 12. This is not disclosed in the specification either.
Examiner’s Note: The office notes that originally filed drawings (dated 08/18/2025) correctly support the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-20 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites, “…a plurality of first pixels organized in an array and supported by a first CMOS substrate; wherein at least one first pixel of said plurality of first pixels comprises, formed together on a second CMOS substrate and transferred to a surface of the first CMOS substrate…”. The claim as currently written requires the pixel and the second CMOS substrate to be transferred to the first CMOS substrate, which is not supported by Applicant’s originally filed specification. The specification expressly discloses the assembly of the three light emitters 14, 16 and 18 and the sensing element 20 is transferred from the first CMOS substrate (the claimed second CMOS substrate) to the substrate 12 by a pick and place process.
Claim 20 arises the same new matter issues as claim 1 above, hence rejected under 35 U.S.C. 112(a).
Dependent claims 2-19 are rejected under 35 U.S.C. 112(a) since they inherit the lack of support as of claim 1.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites, “…a plurality of first pixels organized in an array and supported by a first CMOS substrate; wherein at least one first pixel of said plurality of first pixels comprises, formed together on a second CMOS substrate and transferred to a surface of the first CMOS substrate…”. Claim 1 incorrectly states that the second CMOS substrate is transferred along with the pixels to the first CMOS substrate. For the purpose of examination, this part of limitation is interpretated a plurality of first pixels organized in an array and supported by a first CMOS substrate; wherein at least one first pixel of said plurality of first pixels has been transferred to a surface of the first CMOS substrate (substrate 12 in the specification), in light of the specification.
Claim 20 arises the same indefiniteness issues as claim 1 above, hence rejected under 35 U.S.C. 112(b).
Dependent claims 2-19 are rejected under 35 U.S.C. 112(b) since they inherit the indefiniteness of the claim 1.
Allowable Subject Matter
Claims 1-20 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(a) and 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is Examiner’s statement of reason for allowance:
The closest prior art to the present invention is Percival (US 10319266 B1). Percival discloses a similar invention of display panel with visible LEDs, light detectors and non-visible LEDs arranged in matric.
Regarding Independent claim 1, there is no teaching or suggestion in the prior art of record to provide: the specific limitation recited in the claims of the instant invention, e.g., display device comprising first pixels supported by a CMOS substrate; wherein at least one first pixel of said plurality of first pixels comprising a quantum dot photodetector; and red, green and blue light emitters made of GaN; wherein the quantum dot photodetector and red, green and blue light emitters are arranged in a matrix; and wherein a number of light emitters of each green, red and blue color in said at least one first pixel of said plurality of first pixels is equal.
Regarding Independent claim 20, there is no teaching or suggestion in the prior art of record to provide: the specific limitation recited in the claims of the instant invention, e.g., display device comprising first pixels supported by a CMOS substrate; wherein at least one first pixel of said plurality of first pixels comprising a silicon photodetector; and red, green and blue light emitters made of GaN; wherein the silicon photodetector and red, green and blue light emitters are arranged in a matrix; and wherein a number of light emitters of each green, red and blue color in said at least one first pixel of said plurality of first pixels is equal.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BIPANA ADHIKARI DAWADI whose telephone number is (571)272-4149. The examiner can normally be reached Monday-Friday 11:30am-7:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at (571) 272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/BIPANA ADHIKARI DAWADI/Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
Prosecution Insights