DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments in “Remarks – 02/13/2026- Applicant Arguments/Remarks Made in an Amendment”, with the “Amendment/Req. Reconsideration-After Non-Final Reject -10/21/2025", have been fully considered, but they are not persuasive, because of the following:
Applicant’s amendment of claims 1-5, 7-10, 21-24, 26-28, 30 and newly added claims 31-33 necessitated the shift in new grounds of rejection detailed above in section below. The shift in grounds of rejection renders Applicant’s arguments moot.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 4 and 32 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 4 and 32 recite “wherein the source/drain regions has a width that decreases continuously from a bottommost portion adjacent the (110)-orientated substrate to a topmost portion of the one of the source/drain regions from the cross sectional view” which contains new matter because nowhere in the original disclosure it was disclosed that the S/D regions decreases continuously from a bottommost portion to the a topmost portion of the one of the source/drain regions. ([0047], [0066], [0082], an [0084] disclose “in some embodiments, the source/drain patterns each has a width decreasing as a distance from the (110)-orientated substrate increases”, but nowhere it discloses that it is continues from bottom most to top most surface and none of the figures show that feature and it is actually in a different pattern).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 7-10, 21-24, 26-28, and 30-33 are rejected under 35 U.S.C. 103 as being unpatentable over Chiang et al. (US 2020/0227534 A1; hereinafter Chiang) in view of Kotlyar et al. (US 2020/0105753 A1 hereinafter Kotlyar).
Regarding Claim 1, Chiang (Fig.1-37) discloses a method, comprising: forming a channel region (25; Fig.1A) above a substrate (10; Fig.1A) and having a length; epitaxial growing a plurality of source/drain regions (50; Fig.1A-2A) on either side the channel region (25); forming a gate structure (84/82; Fig.1A-2A; [0053]) surrounding the channel region (25);
forming a metal silicide layer (72;Fig.37) over a top surface of one of the source/drain regions (50), wherein an interface between the metal silicide layer (72; [0054]) and the one of the source/drain region is (72) substantially planar from a cross sectional view taken along a direction perpendicular to a lengthwise direction of the channel region (25); and
forming a plurality of source/drain contacts (75) on the source/drain regions (50).
Chiang does not particularly disclose the orientation of the substrate.
Kotlyar ([0039]-[0040]; [0059]) discloses a method of making a semiconductor device comprising forming a channel above a (110)-oriented substrate having a length extending in <100> direction.
Therefore, it would have been obvious in the art before the effective filling date of the claimed invention to use 110-oriented substrate and extend the channel in <100> direction since using this orientation results in an enhanced nanowire performance (see [0059]).
Regarding Claim 2. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.1-37) discloses wherein the source/drain regions (50) each has a quadrilateral profile from the cross sectional view (see Fig.2A).
Regarding Claim 3. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.1-37) discloses wherein a bottom portion of one of the source/drain regions is wider than a middle portion of the one of the source/drain regions (Fig.2A shows that the lowest 50 has a shape where the bottom portion is wider since it has slanted sides than the portion above it) from the cross-sectional view.
Regarding Claim 4. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.8A-16, and 35-36) discloses wherein the source/drain regions (50) has a width that decreases continuously from a bottommost portion adjacent the (110)-orientated substrate (See [0059] Kotlyar) to a topmost portion of the one of the source/drain regions from the cross sectional view (Fig.8A-16 and 35-36 discloses that 50 in a specific part has wider width closer to the substrate than further away).
Regarding Claim 5. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.1-37) discloses wherein the top surface of one of the source/drain regions (top surface of 50) is in parallel with a bottom surface of the one of the source/drain regions (bottom surface of 50).
Regarding Claim 7. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.1-37) discloses wherein a sidewall of one of the source/drain regions (50; Fig.8A-9A) is steeper than a sidewall of one of the source/drain contacts (75) from the cross sectional view.
Regarding Claim 8. Chiang in view of Kotlyar as applied in claim 1, Chiang (Fig.1-37) discloses wherein epitaxial growing the source/drain regions exhibits a growth behavior on a (100)-orientation (see [0059] of Kotlyar).
Regarding Claim 9. Chiang in view of Kotlyar as applied in claim 1, Kotlyar (Fig.1-15; [0078]-[0079]) discloses wherein the one of the source/drain regions (904/905) comprise a first epitaxial layer formed on a sidewall of the channel region and a second epitaxial layer formed on a sidewall the first epitaxial layer, the first epitaxial layer comprises a first conductive type dopant, and the second epitaxial layer comprises a second conductive type dopant different than the first conductive type dopant ([0078]-[0079]).
Regarding Claim 10. Chiang in view of Kotlyar as applied in claim 9, Kotlyar ([0078]-[0079]) discloses wherein the first conductive type dopant is arsenic, and the second conductive type dopant is phosphorus.
Regarding Claim 21. A method, comprising: Chiang (Fig.1-37) discloses forming a channel region (25) above a fin structure on a substrate (10); epitaxial growing a plurality of source/drain regions (50; Fig.1A-2A) on either side the channel region (25), wherein the source/drain regions (50) each has a quadrilateral profile from a cross-sectional view taken along a direction perpendicular to a lengthwise direction of the fin structure (Fig.2A-2D);
forming a gate structure (82/84) surrounding the channel region (25); and forming a plurality of source/drain contacts (75) on the source/drain regions (50), a footprint of one of the source/drain contacts (75) encompasses a footprint of the one of the source/drain regions (50).
Chiang does not particularly disclose the orientation of the substrate.
Kotlyar ([0039]-[0040]; [0059]) discloses a method of making a semiconductor device comprising forming a channel above a (110)-oriented
Therefore, it would have been obvious in the art before the effective filling date of the claimed invention to use 110-oriented substrate since using this orientation results in an enhanced nanowire performance (see [0059]).
Regarding Claim 22. Chiang in view of Kotlyar as applied in claim 21, Kotlyar ([0059]) discloses wherein the channel region has a length extending along a <100> direction on the (110) surface orientation.
Regarding Claim 23. Chiang in view of Kotlyar as applied in claim 21, Chiang (Fig.1-37) discloses wherein the one of the source/drain regions (50) has a flat top surface (top surface of 50 is flat see Fig.2A-2D).
Regarding Claim 24. Chiang in view of Kotlyar as applied in claim 21, Chiang (Fig.1-37) discloses wherein the one of the source/drain regions extends above the channel region by less than about 10 nm ([0052]).
Regarding Claim 26. A method, comprising: Chiang (Fig.1-37) discloses forming a channel region (25; Fig.1A-2A) above a substrate (10); forming an epitaxial source/drain structure (50) on the channel region (25), the epitaxial source/drain structure (50) interfacing a sidewall of the channel region (25), wherein the epitaxial source/drain structure (50) has a bottom surface and a top surface that are parallel to each other (top and bottom surface of 50), and a width of the epitaxial source/drain structure (50) decreases from the bottom surface to the top surface as a distance from the substrate increases (Fig.2A discloses that 50 has wider width closer to the substrate than further away);
forming a gate structure (82/84) surrounding the channel region (25);
forming a metal silicide layer (72; Fig.37) over a top surface of the epitaxial source/drain structure (50), wherein an interface between the metal silicide layer (72; [0054]) and the epitaxial source/drain structure is (72) substantially planar from a cross sectional view taken along a direction perpendicular to a lengthwise direction of the channel region (25); and
forming a metal contact (75) on the epitaxial source/drain structure (50).
Chiang does not particularly disclose the orientation of the substrate.
Kotlyar ([0039]-[0040]; [0059]) discloses a method of making a semiconductor device comprising forming a channel above a (110)-oriented
Therefore, it would have been obvious in the art before the effective filling date of the claimed invention to use 110-oriented substrate since using this orientation results in an enhanced nanowire performance (see [0059]).
Regarding Claim 27. Chiang in view of Kotlyar as applied in claim 26, Kotlyar ([0059]) discloses wherein the channel region has a length extending along a <100> direction on the (110) surface orientation.
Regarding Claim 28. Chiang in view of Kotlyar as applied in claim 26, Chiang (Fig.1-37) discloses wherein a bottom portion of the epitaxial source/drain structure (bottom portion of 50; Fig.2A) is wider than a middle portion of the epitaxial source/drain structure (portion of 50 above the wide part in fig.2A).
Regarding Claim 30. Chiang in view of Kotlyar as applied in claim 26, Chiang (Fig.1-37) discloses wherein, in a cross-sectional view, a sidewall of the epitaxial source/drain structure (50; Fig.8A-9A) is steeper than a sidewall of the metal contact (75; Fig.8A-9A).
Regarding Claim 31. Chiang in view of Kotlyar as applied in claim 1, Kotlyar (Fig.12A-12C) wherein in a top view (12A is a 3D view), the one of the source/drain regions (1210/1212) has a diamond-shaped outer perimeter (Fig.12A), and, in the cross sectional view (Fig.12B), the one of the source/drain regions has a bar-shaped profile having a pair of substantially straight sidewalls.
Regarding Claim 32. Chiang in view of Kotlyar as applied in claim 21, Chiang (Fig.8A-16, and 35-36) discloses wherein the source/drain regions (50) has a width that decreases continuously from a bottommost portion adjacent the (110)-orientated substrate (See [0059] Kotlyar) to a topmost portion of the one of the source/drain regions from the cross sectional view (Fig.8A-16 and 35-36 discloses that 50 in a specific part has wider width closer to the substrate than further away).
Regarding Claim 33. Chiang in view of Kotlyar as applied in claim 26, Kotlyar ([0078]-[0079]) discloses wherein the epitaxial source/drain structure comprises an arsenic-containing epitaxial layer formed on the sidewall of the channel region and a phosphorus-containing epitaxial layer formed on a sidewall the arsenic-containing epitaxial layer ([0078]-[0079]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAJAR KOLAHDOUZAN whose telephone number is (571)270-5842.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached on (571)270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HAJAR KOLAHDOUZAN/ Examiner, Art Unit 2898
/Leonard Chang/ Supervisory Patent Examiner, Art Unit 2898
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