DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of claims 1-16 in the reply filed on October 27, 2025 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 7-9 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dhakal et al. (Dhakal, US 2021/0028123 A1)
Regarding claim 1, Dhakal shows a microelectronic assembly, comprising: a package substrate (substrate 130 in FIG. 1A) comprising a conductive trace (conductive line 118 in FIG. 1A and [0014]) in a dielectric material ( dielectric material 132), the conductive trace (conductive line 118 and [0014]) surrounded by a conductive structure ( conductive structure 108/113 in FIG. 1A and [0017]) coupled to a ground connection (ground connection VSS in FIG. 1A), the package substrate further comprising metallization layers ( metallization layers between dielectric layer 132 in FGI. 1A) alternating with dielectric layers of the dielectric material (dielectric layer 132); and an integrated circuit (IC) die ( chip 102) coupled to a surface of the package substrate (substrate 130), the IC die coupled to the conductive trace by a conductive pathway ([0014]) ,wherein: the dielectric layers and the metallization layers are parallel to the surface of the package substrate (substrate 130),the conductive trace comprises a trench via (via 118) in at least one dielectric layer (dielectric layer 132), and the conductive structure comprises grounded plates ( conductive plate 110/111) extending across a length and width of the package substrate in the metallization layers on either side of the conductive trace (conductive line 118).
Regarding claim 2, Dhakal shows a microelectronic assembly, comprising: a package substrate (substrate 130 in FIG. 1A) comprising, wherein the conductive structure (conductive structure 108/113 in FIG. 1A) further comprises grounded traces (conductive line 118) in the metallization layers between the grounded plates ( VSS/ 111 in FIG. 1A).
Regarding claim 7, Dhakal shows a microelectronic assembly, comprising: a package substrate (substrate 130 in FIG. 1A) comprising, wherein the conductive trace ( conductive line 118 in FIG. 1A) comprises a plurality of parallel metal plates ( plates 111/VSS) in adjacent metallization layers (metal layer 118) and trench vias in the dielectric layers between the adjacent metallization layers ( metal layer 118), the trench vias in continuous contact with adjacent metal plates along a length of the conductive trace (conductive line 118).
Regarding claim 8, Dhakal shows a microelectronic assembly, comprising: a package substrate (substrate 130 in FIG. 1A) comprising, wherein conductive trace (conductive line 118) is a first conductive trace, and the microelectronic assembly further comprises a second conductive trace ( conductive line 118 i.e. plurality of conductive line 118) parallel to and coplanar with the first conductive trace ( conductive line 118).
Regarding claim 9, Dhakal shows a package substrate, comprising: a first ground plate ( plate 111/VSS/110 in FIG. 1A) and a second ground plate (plates 11/VSS/110) coupled to a ground connection ( connection 113);a dielectric layer ( dielectric layer 132) between the first ground plate (plates 111/VSS/110) and the second ground plate (plates VSS/111/110); and a conductive trace comprising a trench via ( via 118) in the dielectric layer (dielectric layer 132), the trench via not in contact with the first ground plate (VSS/111/110) or the second ground plate (VSS/110/111),wherein: the dielectric layer comprises a dielectric material ( dielectric layer 132), and the trench via is parallel to the first ground plate and the second ground plate (VSS/110/111).
Regarding claim 16, Dhakal shows a package substrate, further comprising another conductive trace ( conductive line 118) parallel to and coplanar with the conductive trace (conductive line 118), wherein the another conductive trace is separated from the conductive trace by a trace spacing filled with the dielectric material (dielectric layer 132).
Allowable Subject Matter
Claims 3-6, 10-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS M ULLAH whose telephone number is (571)272-1415. The examiner can normally be reached M-F at 8AM-5PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ELIAS ULLAH/Primary Examiner, Art Unit 2893
Prosecution Insights