DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on October 20 2025 has been entered.
Claim Objections
Claim 5 is objected to because of the following informalities: “the the interlocking portion” in line 2 should read as “the interlocking portion”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 13-14, and 16-17 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Sato (US 2019/0067214).
Regarding claim 1, Sato discloses a semiconductor device (10g, Figure 15), comprising:
a semiconductor unit (21/22a/22b) including a semiconductor chip (chips 22a/22b);
a cooling plate (31b/33b) having a cooling front surface (upper surface in Figure 15), the cooling front surface (upper surface of cooling plate 31b/33b) including an area on which the semiconductor unit (21/22a/22b) is disposed via a bonding member (solder 24a, para. [0055]);
a case (26) disposed on another area of the cooling front surface (upper surface of cooling plate 31b/33b) along an outer edge of the cooling front surface (see Figure 15, the case 26 is disposed along the perimeter of the cooling plate 31b/33b) via an adhesive (bonding material, epoxy based, para. [0109]) so as to surround the semiconductor unit (21/22a/22b, see Figure 15 and plan view Figure 14); and
a sealing member (25) entirely sealing the semiconductor unit (21/22a/22b, see Figure 15) disposed on the cooling plate (31b/33b) inside the case (26, see Figure 15), wherein
the cooling plate (31b/33b) has an interlocking portion (see recess 33b2), the interlocking portion including a recess (33b2) and an engagement surface (inclined edges of the recess are the engagement surfaces) disposed inside the recess (33b2) and being inclined at an acute angle with respect to the cooling front surface (upper surface of cooling plate 31b/33b, the engagement surface is at an acute angle with respect to the cooling front surface, see annotated Figure 15 below), the interlocking portion (33b2) being disposed in an area of the cooling front surface (upper surface of cooling plate 31b/33b) excluding areas of the cooling front surface where the semiconductor unit (21/22a/22b) and the case (26) are disposed in a plan view of the semiconductor device (see Figure 15, which shows the interlocking portions 33b2 between the portions of the cooling front surface on which the semiconductor unit and the case are disposed, see also plan view of Figure 14 which is the plan view of Figure 13, and recesses 33b2 have the same or corresponding arrangement of protrusions 33b1, see para. [0224]).
Regarding claim 13, Sato discloses wherein the recess (33b2) has a recess bottom surface (bottom, horizontally-extending surface of the recess 33b2) that is parallel to the cooling front surface (upper surface of cooling plate 31b/33b, which is also horizontally extending in Figure 15) and farther from the semiconductor unit (21/22a/22b) in a thickness direction of the cooling plate (31b/33b) than is the cooling front surface (upper surface of cooling plate 31b/33b is closer to the semiconductor unit in the thickness, vertical direction of Figure 15 than the bottom surface of the recess of 33b2 is).
Regarding claim 14, Sato discloses wherein the semiconductor unit (21/22a/22b) further includes an insulating circuit substrate (21, ceramic circuit substrate, see para. [0042]) having a front surface (top surface) on which the semiconductor chip (22a/22b) is disposed and a back surface (lower surface) on which the cooling front surface of the cooling plate (31b/33b) is disposed (Figure 15 shows the lower surface of the substrate 21 is in contact with the upper surface of the cooling plate through the bonding agent 24a).
Regarding claim 16, Sato discloses wherein the sealing member (25) is made of a material different from a material of the case (26, para. [0053] discloses that the sealing member 25 is made of an epoxy resin with a filler, and para. [0108] discloses the case 26 is made of a thermoplastic resin).
Regarding claim 17, Sato discloses wherein the sealing member (25) seals the cooling front surface of the cooling plate (upper surface of the cooling plate 31b/33b is sealed by the sealing member 25, see Figure 15) and does not seal a cooling back surface of the cooling plate (Figure 15 shows the lower surface of the cooling plate 31b/33b is not in direct physical contact with the sealing material 25).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Sato as applied to claim 1 above, and further in view of Oshima (US 2006/0220196).
Regarding claim 2, Sato discloses wherein the semiconductor unit (21/22a/22b) is laminated on the cooling plate (31b/33b.
Sato does not disclose that the interlocking portion further includes a projection projecting from a recess bottom surface of the recess in a lamination direction in which the semiconductor unit is laminated on the cooling plate (vertical direction), the projection having the engagement surface, the recess bottom surface being positioned below the cooling front surface in the lamination direction.
However, Oshima discloses in Figures 6A-6C an interlocking portion (patterned surface of the cooling plate 30 in Figure 6C) of a cooling plate (heat dissipating unit 30), the interlocking portion further includes a projection (36) projecting from a recess bottom surface of the recess (recess 32, the projection projects from the bottom surface of the recess 32) in a lamination direction (vertical direction, the projections 36 extend diagonally, which has a component of the direction in the lamination/vertical direction, see Figure 6C) in which the semiconductor unit (semiconductor chip 78) is laminated on the cooling plate (the cooling plate 30 is analogous to the heat radiating plate 72 of Figure 4A, which shows the semiconductor chip 78 bring laminated thereon, where Figure 6A-6C are an alternate method of forming the protruding portions), the projection (36) having the engagement surface (inclined surface, inclined at an acute angle with respect to the cooling front surface, or the upper top surface of the cooling plate 30), the recess bottom surface (bottom surface of recess 32) being positioned below the cooling front surface (top surface of cooling plate 30) in the lamination direction (vertical direction in Figure 6C, see Figure 6C which shows the recessed surface being below or lower than the cooling front surface).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Oshima above regarding the structure of the interlocking portions into the teachings of Sato, specifically the protruding portions extending in different directions serve the purpose of further improving adhesion between the cooling plate and the sealing material, see para. [0049] of Oshima. Further, all of the claimed elements were known in the prior art before the effective filing date of the instant application, and the results of the combination of the teachings of Sato and Oshima above would result in no change of their respective functions and the results would be predictable to one having ordinary skill in the art. The predictable result being the structure of the interlocking portions of Oshima would further improve adhesion between the sealing material and the cooling plate. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 3, Oshima discloses wherein the projection (36) projects from the recess bottom surface (32, see Figure 6C) to a position above the cooling front surface (upper surface of the cooling plate 30 outside of the recess 32) in the lamination direction (vertical direction, see Figure 6C).
Regarding claim 4, Oshima discloses wherein the projection (36) has an inner surface (inner surface of the V shape between projections 36, parallel to the engagement surface which is the outer surfaces of the V shape of the projections 36) opposite to the engagement surface (inner surface of the projections is opposite the outer surface of the projections), and the inner surface and the engagement surface are both inclined with respect to the cooling front surface (upper surface of the cooling plate 30 outside of the recess 32, see both surfaces of the projection inclined with respect to the cooling front surface, the surfaces also being parallel with each other).
Regarding claim 5, Oshima discloses wherein the the interlocking portion (Figure 6C) includes a plurality of projections (36, see plurality of projection 36 in Figure 6C) projecting from the recess bottom surface (bottom surface of recess 32, from which the projection extends) and each having an engagement surface (outer surfaces of the projections 36).
Regarding claim 6, Oshima discloses wherein the plurality of projections (36) is formed in a loop shape at equal intervals with gaps therebetween (see plan view of projections 76 in Figure 4A, which are analogous to the interlocking structure of Figures 6A-6C, the projections being in a loop shape), with the engagement surfaces (outer surface of the projections 36, see Figure 6C) facing an inner surface of the recess (32, see Figure 6C which shows outer surface of the projections 36, or the outer surfaces of the V shaped formed by the projections, face the recesses 32).
Regarding claim 15, Oshima discloses wherein the interlocking portion (Figure 6C) further includes a plurality of projections (36, see plurality in Figure 6C) projecting from the recess bottom surface (bottom surfaces of recesses 32) in a direction away from the recess bottom surface (the projections extend diagonally outward from the recesses 32) toward the semiconductor unit (the diagonal direction in which the projections extend are upwards which is towards the semiconductor unit 78, see Figure 4B also), the engagement surface of each projection (outer surfaces of the V shape of the projections, see Figure 6C) having inner and outer side engagement surfaces (inner and outer faces of the projections 36) facing each other (see Figure 6C, they face each other through the projection itself 36), and
wherein the inner and outer side engagement surfaces (inner and outer surfaces of the projections 36) respectively include ends connected to the recess bottom surface (32, the projection inner and outer surfaces are connected to the bottom surface of the recess 32), the ends being positioned at the same level in the thickness direction (see Figure 6C, see also annotated Figure 6C below).
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Response to Arguments
Applicant’s arguments with respect to claims 1-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm.
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/Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899