Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Currently, claims 2-211 are pending and examined below.
Information Disclosure Statement (IDS)
Three information disclosure statements submitted on 05/23/2023 ("05-23-23 IDS"), 12/21/2023 (“12-21-23 IDS”) and 05/20/2024 (“05-20-24 IDS”) are in compliance with the provisions of 37 CFR 1.97. Accordingly, the 05-23-23 IDS, 12-21-23 IDS and 05-20-24 IDS are being considered by the examiner.
A. Prior-art rejections based on Sundaram
Claim Rejections - 35 USC § 1022
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 2-8, 18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pub. No. US 2017/0060202 A1 to Sundaram (“Sundaram”) (cited in the 05-23-23 IDS).
Figs. 1 and 2 of Sundaram has been provided to support the rejection below:
PNG
media_image1.png
520
387
media_image1.png
Greyscale
PNG
media_image2.png
340
481
media_image2.png
Greyscale
Regarding independent claim 2, Sundaram teaches an apparatus 200 or 214 (para [0045] - “FIG. 2 and the following discussion provide a brief, general description of the components forming an illustrative system 200 that includes an embodiment of the illustrative memory resource thermal monitoring and management system described in detail above with regard to FIG. 1…”; para [0020] - “The system 100 includes any number of memory resources 110A-110n (collectively “memory resources 110”) that are each communicably coupled to a memory resource thermal management controller 150, in accordance with at least one embodiment of the present disclosure.”; see also Fig. 1 for further description of the system memory 214.) comprising:
a memory storage device 110A-110n comprising:
a memory cell 126A-126n (para [0024] - “Each of the memory resources 110A-110n includes a respective register (e.g., “STATUS REGISTER”) 126A-126n (collectively “registers 126”). The register provides a data storage area in the memory resource where data indicative or representative of a thermal state of the memory resource 110 may be stored or written. In some embodiments, the register 126 may include a single bit that is set by the comparator 120. In some embodiments, the register 126 may include a number of bits. In some embodiments, the register 126 may include one or more bytes sufficient to store a limited quantity of information, such as a message or a temperature as sensed by the sensor 122. Although depicted in FIG. 1 as included in the respective memory register 110, in some embodiments, the register 126 may be resident in a storage device external to the respective memory register 110.”);
a temperature sensor 122A-122n (para [0020] - “Each of the memory resources 110A-110n includes at least one respective comparator 120A-120n (collectively “comparators 120”) that are communicably coupled to at least one respective thermal sensor 122A-122n (collectively “thermal sensors 122”).”) configured to detect a temperature of at least a portion of the memory storage device 110A-110n; and
an artificial intelligence system (para [0106] - “As used in any embodiment herein, the terms “system” or “module” may refer to, for example, software, firmware and/or circuitry configured to perform any of the aforementioned operations…’Circuitry’, as used in any embodiment herein, may comprise…hardware embodiments of accelerators such as neural net processors {underlined for emphasis}...”; para [0049] - “Machine-readable instruction sets 238 and other instruction sets 240 may be stored in whole or in part in the system memory 214. Such instruction sets 238, 240 may be transferred from the storage device 202 and stored in the system memory 214 in whole or in part when executed by the thermal management controller 150. The machine-readable instruction sets 238 may include logic capable of providing the storage device thermal management capabilities described herein. For example, one or more machine-readable instruction sets 238 may cause the thermal management controller 150 to identify one or more memory resources 110 that are approaching or exceeding a first (e.g., first) temperature. One or more machine-readable instruction sets 238 may cause the thermal management controller 150 to restrict, throttle, control or otherwise limit data traffic to and/or from a memory resource 110 as the temperature of the resource increases.”) configured to perform, based on temperature sensor 122A-122n, an operation of the memory storage device 110A-110n.
Regarding claim 3, Sundaram teaches the operation that comprises determining an operational parameter (flow of data to and/or from memory resources 110) for the memory storage device 110A-110n (para [0039] - “The thermal management controller 150 may include any number of combination of systems and devices capable of controlling, restricting, or otherwise adjusting the flow of data to and/or from each one of some or all of the plurality of memory resources 110. The thermal management controller 150 may adjust the flow of data to and/or from a particular memory resource 110 upon receipt of a high temperature alert from the respective memory resource 110. In some implementations, the thermal management controller 150 may simply halt the flow of data to/from the memory resource 110 upon receipt of the alert from the memory resource 110. In some implementations, the thermal management controller 150 may stepwise adjust the flow of data to/from the memory resource 110 upon receipt of a defined number of alerts from the respective memory resource 110, each of the defined number of alerts indicative of a particular temperature being detected within the memory resource 110.”; para [0040] - “[0040] The thermal management controller 150 may also permit the resumption of data flow to/from a memory resource 110 that previously experienced a high temperature thermal event.”).
Regarding claim 4, Sundaram teaches the operation that comprises determining thermal-related data (para [0040] - “…when the measured temperature (measured by temperature sensor 122) of the respective memory resource 110 is at or below the second threshold temperature 114, the comparator 120 may place the first output pin 124 in a second logic state.”) for the memory storage device 110A-110n.
Regarding claim 5, Sundaram teaches the apparatus 214 that is a first apparatus and the memory storage device 110A-110n that is configured to send the thermal-related data to a second apparatus 212 (see Fig. 2).
Regarding claim 6, Sundaram teaches the thermal-related data that comprises a thermal setting (para [0021] - “Each of the memory resources 110A-110n includes data indicative of a respective first, (e.g., “HIGH SET”) threshold 112A-112n (collectively “first thresholds 112”). The first temperature threshold may represent a threshold at or above which the memory resource thermal management controller 150 may restrict, throttle, or otherwise limit data traffic to the respective memory resource 110. Each of the memory resources 110A-110n includes a respective second temperature (e.g., “LOW SET”) threshold 114A-114n (collectively “second thresholds 114”). The second temperature threshold 114 may represent a threshold at or below which the memory resource thermal management controller 150 may resume data traffic to the respective memory resource 110.”).
Regarding claim 7, Sundaram teaches the thermal-related data that comprises a temperature trend (para [0062] - “At 218, the comparator 120 determines whether the measured temperature in the memory resource 110 is at or below the second threshold temperature 114. If the temperature of the memory resource 110 is at or below the second threshold temperature 114 at 318, the method 300 continues at 320. If the measured temperature of the memory resource 110 is NOT at or below the second threshold temperature 114 at 318, the method 300 returns to 308.”; para [0070] - “Each of the memory resources may set an first output pin in the respective memory resource to a first logical state responsive to a real-time measured temperature of the respective memory resource at or above a first threshold temperature and set the first output pin to a second logical state responsive to the real-time measured temperature of the respective memory resource at or below a second threshold temperature.”).
Regarding claim 8, Sundaram teaches the artificial intelligence system that is configured to (or is reasonably capable of) perform the operation based on a workload of the memory storage device 110A-110n (para [0025] - “In embodiments, the comparator 120A-120n in each of the memory resources 110A-110n may alter, adjust, control, or write the data stored or otherwise retained in the respective register 126A-126n. In at least some implementations when the thermal management controller 150 receives or otherwise detects a change in logic state of an first output pin 124 in a memory resource 110, the thermal management controller 150 may read the contents of each of the registers 126 to determine the address or identifier associated with the specific memory resource 110 experiencing the high thermal condition. Using such identification information, the thermal management controller 150 may perform corrective measures to reduce, mitigate, remedy, ameliorate, correct, or otherwise address the high thermal condition in the memory resource 110. Such permits the rapid detection and identification of memory resources 110 experiencing high thermal conditions within the system 100—thereby improving data integrity and reliability in the system 100.”).
Regarding independent claim 18, Sundaram teaches a method comprising:
performing, by an artificial intelligence system (para [0106] - “As used in any embodiment herein, the terms “system” or “module” may refer to, for example, software, firmware and/or circuitry configured to perform any of the aforementioned operations…’Circuitry’, as used in any embodiment herein, may comprise…hardware embodiments of accelerators such as neural net processors {underlined for emphasis}...”; para [0049] - “Machine-readable instruction sets 238 and other instruction sets 240 may be stored in whole or in part in the system memory 214. Such instruction sets 238, 240 may be transferred from the storage device 202 and stored in the system memory 214 in whole or in part when executed by the thermal management controller 150. The machine-readable instruction sets 238 may include logic capable of providing the storage device thermal management capabilities described herein. For example, one or more machine-readable instruction sets 238 may cause the thermal management controller 150 to identify one or more memory resources 110 that are approaching or exceeding a first (e.g., first) temperature. One or more machine-readable instruction sets 238 may cause the thermal management controller 150 to restrict, throttle, control or otherwise limit data traffic to and/or from a memory resource 110 as the temperature of the resource increases.”), a first operation (para [0037] - “The comparator 120 compares the received temperature signal against the first threshold temperature 112. When the measured temperature of the memory resource exceeds the stored first threshold temperature 112, the comparator drives the first output pin 124 to a first logic state. The first logic state may be either a HIGH logic state or a LOW logic state. In some implementations, the first logic state may be a HIGH logic state (i.e., a binary HIGH state or a logical “1” value). In some implementations, when the measured temperature of the memory resource exceeds the first threshold temperature 112, the comparator may write a defined data string that includes one or more bits of information to the register 126. The data written to the register 126 may include data indicative of the high temperature condition existent within the memory resource 110. In embodiments, the presence of defined data in the register 126 may permit the thermal management controller 150 to identify which memory resource 110 is experiencing the high thermal condition event.”) based on a temperature related to at least a portion of a computer system 200, wherein the computing system is configured to thermally couple a memory storage device 110A-110n para [0020] - “The system 100 includes any number of memory resources 110A-110n (collectively “memory resources 110”) that are each communicably coupled to a memory resource thermal management controller 150, in accordance with at least one embodiment of the present disclosure.”; see also Fig. 1 for further description of the system memory 214.) to the at least a portion of the computing system 200; and
performing, based on the first operation, as a second operation (restricting or allowing flow of data to and/or from memory resources 110), wherein the second operation comprises a thermal management operation on the at least a portion of the computing system 200 ((para [0039] - “The thermal management controller 150 may include any number of combination of systems and devices capable of controlling, restricting, or otherwise adjusting the flow of data to and/or from each one of some or all of the plurality of memory resources 110. The thermal management controller 150 may adjust the flow of data to and/or from a particular memory resource 110 upon receipt of a high temperature alert from the respective memory resource 110. In some implementations, the thermal management controller 150 may simply halt the flow of data to/from the memory resource 110 upon receipt of the alert from the memory resource 110. In some implementations, the thermal management controller 150 may stepwise adjust the flow of data to/from the memory resource 110 upon receipt of a defined number of alerts from the respective memory resource 110, each of the defined number of alerts indicative of a particular temperature being detected within the memory resource 110.”; para [0040] - “[0040] The thermal management controller 150 may also permit the resumption of data flow to/from a memory resource 110 that previously experienced a high temperature thermal event.”) for the memory storage device 110A-110n.).
Regarding claim 20, Sundaram teaches the first operation that comprises determining an operational parameter (para [0037] - “The comparator 120 compares the received temperature signal against the first threshold temperature 112. When the measured temperature of the memory resource exceeds the stored first threshold temperature 112, the comparator drives the first output pin 124 to a first logic state. The first logic state may be either a HIGH logic state or a LOW logic state. In some implementations, the first logic state may be a HIGH logic state (i.e., a binary HIGH state or a logical “1” value). In some implementations, when the measured temperature of the memory resource exceeds the first threshold temperature 112, the comparator may write a defined data string that includes one or more bits of information to the register 126. The data written to the register 126 may include data indicative of the high temperature condition existent within the memory resource 110. In embodiments, the presence of defined data in the register 126 may permit the thermal management controller 150 to identify which memory resource 110 is experiencing the high thermal condition event.”) for the memory storage device 110A-110n.
B. Prior-art rejections based on Yang
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 10-12, 15-19 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Patent No. US 9,846,444 B1 to Yang (“Yang”) (cited in the 05-23-23 IDS).
Regarding independent claim 10, Yang teaches an apparatus (col. 2, ln 50-55 - “The present invention discloses a method of controlling and adjusting fans of the electronic apparatus…and the method is mainly applied to the electronic apparatus with heavy load of calculation and requiring effective cooling, such as a super computer, a server system, etc.”) comprising:
a computing system (col. 2, ln 56-67 - “Specifically, the aforementioned electronic apparatus mainly has a central processing unit (CPU), a fan, and multiple electronic elements (such as memory….”)…In the present invention, the method is mainly used for controlling operation of the fan to adjust the rotating speed of the fan, and cooling the CPU. In this way, overheat resulting in decreased performance, malfunction, or damage of the CPU, and even crash or burnout of the electronic apparatus can be avoided. In other embodiments, the method may also be used, but not limited, for cooling other electronic elements besides the CPU in the electronic apparatus.”) comprising:
a processor (CPU) configured to access a memory storage device (memory; col. 7, ln 6-17 - “In an embodiment, the electronic apparatus may temporarily store the adjusted PWM value and the operating watt value to a register or a volatile memory (not shown) of the electronic apparatus to make the electronic apparatus re-learn and re-establish the learning table after being rebooted, and increase flexibility of the method. In another embodiment, the electronic apparatus also may store the adjusted PWM value and the operating watt value to a non-volatile memory of the electronic apparatus permanently (not shown) to store the learning table permanently without being influenced by the electronic apparatus being powered on/off, but not limited.”), wherein the computing system is configured to thermally couple the memory storage device (memory) to at least a portion of the computing system;
an artificial intelligence system (col. 2, ln 14-29 - “…predicted PWM value from a pre-established neural-network data array or a gradually established learning table, and uses the PID controller to perform error adjustment process to the predicted PWM value. Therefore, the present invention differs from relative art as for calculating the PWM value directly through the PID controller, or for dynamically calculating control of the PWM value by Neutral network algorithm according to temperature variation…can avoid searching an optimized solution of the PID parameters, and save develop time of factory”; col. 4, ln 47-57 - “Specifically, if the temperature of the electronic apparatus does not vary largely and even if the aforementioned P parameter, I parameter and D parameter estimated are not optimized, the PID controller still has enough time to accumulate a value of I parameter to control the rotating speed of the fan for cooling.”) configured to perform a first operation (optimizing PIDs values) based on thermal-related data (col. 3, ln 30-38 -“In an embodiment, the electronic apparatus further includes a temperature sensing unit…After step S12, the electronic apparatus continuously senses temperature of the CPU through the temperature sensing unit, and determines whether the temperature of the CPU reaches the set-point. (step S14).”; col. 4, ln 21-30 - “After step S16, a pulse width modulation (PWM) value corresponding to the operating watt value, and a proportional parameter (that is, P parameter), an integral parameter (that is, I parameter) and a differential parameter (that is, D parameter)) needed by a proportional-integral-differential controller (that is, PID controller) for calculation are obtained from one of a learning table and a pre-established neural-net data array in the electronic apparatus (step S18).”) for the at least a portion of the computing system; and
a thermal apparatus (fan) configured to perform, based on the first operation, a second operation (col. 4, ln 47-57 - “…controlling the rotating speed of the fan for cooling…”), wherein the second operation comprises a heat transfer operation (cooling via operation of the fan) on the at least a portion of the computing system.
Regarding claim 11, Yang teaches the first operation that comprises determining a temperature trend (col. 3, ln 45-58 - “Please refer to FIG. 4, which shows a diagram of trend of temperature variation according to the first embodiment of the present invention”).
Regarding claim 12, Yang teaches the at least a portion of the computing system that comprises at least a portion of the memory storage device (memory).
Regarding claim 15, Yang teaches a controller (fan speed controller) configured to control, based on the first operation, the thermal apparatus (fan).
Regarding claim 16, Yang teaches the artificial intelligence system that is configured to receive, from the memory storage device (memory), at least a portion of the thermal-related data (col. 7, ln 6-17 - “In an embodiment, the electronic apparatus may temporarily store the adjusted PWM value and the operating watt value to a register or a volatile memory (not shown) of the electronic apparatus to make the electronic apparatus re-learn and re-establish the learning table after being rebooted, and increase flexibility of the method. In another embodiment, the electronic apparatus also may store the adjusted PWM value and the operating watt value to a non-volatile memory of the electronic apparatus permanently (not shown) to store the learning table permanently without being influenced by the electronic apparatus being powered on/off, but not limited.”; see Fig. 4).
Regarding claim 17, Yang teaches the thermal-related data that comprises a temperature trend (see Fig. 4).
Regarding independent claim 18, Yang teaches a method comprising:
performing, by an artificial intelligence system (col. 2, ln 14-29 - “…predicted PWM value from a pre-established neural-network data array or a gradually established learning table, and uses the PID controller to perform error adjustment process to the predicted PWM value. Therefore, the present invention differs from relative art as for calculating the PWM value directly through the PID controller, or for dynamically calculating control of the PWM value by Neutral network algorithm according to temperature variation…can avoid searching an optimized solution of the PID parameters, and save develop time of factory”; col. 4, ln 47-57 - “Specifically, if the temperature of the electronic apparatus does not vary largely and even if the aforementioned P parameter, I parameter and D parameter estimated are not optimized, the PID controller still has enough time to accumulate a value of I parameter to control the rotating speed of the fan for cooling.”), a first operation (optimizing PIDs values) based on a temperature related to at least a portion of a computing system (col. 2, ln 56-67 - “Specifically, the aforementioned electronic apparatus mainly has a central processing unit (CPU), a fan, and multiple electronic elements (such as memory….”)…In the present invention, the method is mainly used for controlling operation of the fan to adjust the rotating speed of the fan, and cooling the CPU. In this way, overheat resulting in decreased performance, malfunction, or damage of the CPU, and even crash or burnout of the electronic apparatus can be avoided. In other embodiments, the method may also be used, but not limited, for cooling other electronic elements besides the CPU in the electronic apparatus.”), wherein the computing system is configured to thermally couple a memory storage device (memory) (col. 7, ln 6-17 - “In an embodiment, the electronic apparatus may temporarily store the adjusted PWM value and the operating watt value to a register or a volatile memory (not shown) of the electronic apparatus to make the electronic apparatus re-learn and re-establish the learning table after being rebooted, and increase flexibility of the method. In another embodiment, the electronic apparatus also may store the adjusted PWM value and the operating watt value to a non-volatile memory of the electronic apparatus permanently (not shown) to store the learning table permanently without being influenced by the electronic apparatus being powered on/off, but not limited.”) to the at least a portion of the computing system; and
performing, based on the first operation, a second operation (col. 4, ln 47-57 - “…controlling the rotating speed of the fan for cooling…”), wherein the second operation comprises a thermal management operation (cooling via operation of the fan) on the at least a portion of the computing system.
Regarding claim 19, Yang teaches the first operation that comprises determining a temperature trend (col. 3, ln 45-58 - “Please refer to FIG. 4, which shows a diagram of trend of temperature variation according to the first embodiment of the present invention”) for at least a portion of the computing system.
Regarding claim 21, Yang teaches the thermal management operation that comprises operation a thermal apparatus (fan).
C. Prior-art rejections based on the combination of Jenne and Yang
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
(1). Determining the scope and contents of the prior art.
(2). Ascertaining the differences between the prior art and the claims at issue.
(3). Resolving the level of ordinary skill in the pertinent art.
(4). Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2-21 are rejected under 35 U.S.C. 103 as being unpatentable over Pub. No. US 2019/0012108 A1 to Jenne (“Jenne”) in view of Yang.
PNG
media_image3.png
517
404
media_image3.png
Greyscale
Regarding independent claim 2, Jenne teaches an apparatus (see Fig. 1) comprising:
a memory storage device 130 (para [0030] - “NVDIMM 130 includes an NVDIMM controller 140, a volatile memory 134, also referred to herein by way of example as a DRAM, non-volatile memory 136, which can be a flash type memory, a data bus switch 132, and control/address bus switch 133, a power terminal connected to the system power source 152, and a power terminal connected to the backup power source 150.”) comprising:
a memory cell 136;
a temperature sensor 135 (para [0043] - “The transfer rate indicator can be based upon one or more temperature readings from a thermal sensor 135 of the NVDIMM. Thermal sensor 135 can be located at various locations of the NVDIMM 130, or based upon temperature information from sensors external the NVDIMM, for example, the temperature sensor can reside near the non-volatile memory of the memory module as the non-volatile memory is more susceptible to failure at increased temperature. It will be appreciated that multiple temperature sensors can be used and monitored. “) configured to detect a temperature of at least a portion of the memory storage device 130; and
a system 141 (para [0043]- “Particular implementations of NVM save controller 141 will be better understood with reference to FIGS. 2-6.”; para [0056] - “NVM save controller 441 can be an embodiment of the NVM save controller 141 of FIG. 1, and includes a rate update controller 414 associated with registers 419, a thermal throttling controller 416 associated with register 461, a transfer controller 462, and a buffer 463. Transfer controller 462 and buffer 463 can operate in the same manner as the transfer controller 262 and buffer 263 of FIG. 2. During operation, the rate update controller 414 can receive temperature information from one or more temperature sensors including temperature sensor 135. The temperature information can be used by the rate update controller 414 to determine a next XFER RATE value to be stored in register 461 that will replace the current XFER RATE value, and thus becoming the current XFER RATE. How frequently the XFER RATE is to be updated can be based upon a period indicator stored at register 419. For example, a period indicator can specify how often that the temperature sensor 135 is to be evaluated, and the value XFER RATE updated. By periodically updating the transfer rate indicator based upon a temperature of the NVDIMM, a closed-loop feedback system is created that can control the thermal output rate of the NVDIMM. This process can be referred to as thermal throttling.”; para [0054] - “The transfer rate saved at an NVDIMM can be calculated using various calculations, including a proportional-integral-derivative (PID) calculation as implemented by PID control circuitry.) configured to perform, based on the temperature sensor 135, an operation for the memory storage device 130.
Jenne does not teach that the system is an artificial intelligence system.
Yang recognizes that “…some electronic apparatuses apply a Neural network algorithm to dynamically calculate to generate the aforementioned PID parameters, for calculation of the PID controller.” (col. 1, ln 34-40]).
Yang further recognizes that “…a general Neutral network algorithm continuously detects temperature of entire electronic apparatus or temperature of CPU, and dynamically performs calculations according to temperature to generate the above PID parameters. Thus, if the electronic apparatus causes the temperature to increase greatly and instantly for special condition, the existing cooling system spends much time to decrease the temperature of the electronic apparatus to be lower than a set-point. In this way, high temperature for a long time may damage interior elements of the electronic apparatus.” (col 1, ln 41-50).
Yang improves upon the known Neural network algorithm by obtaining “…predicted PWM value from a pre-established neural-network data array or a gradually established learning table, and uses the PID controller to perform error adjustment process to the predicted PWM value. Therefore, the present invention differs from relative art as for calculating the PWM value directly through the PID controller, or for dynamically calculating control of the PWM value by Neutral network algorithm according to temperature variation…” which “can avoid searching an optimized solution of the PID parameters, and save develop time of factory” (col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively, and thus obtain faster cooling of the electronic apparatus.” (col. 2, ln 14-29).
Section 2141.III. of the MPEP provides the following guidance for rationales to support rejections under 35 U.S.C. 103:
The key to supporting any rejection under 35 U.S.C. 103 is the clear articulation of the reason(s) why the claimed invention would have been obvious. The Supreme Court in KSR noted that the analysis supporting a rejection under 35 U.S.C. 103 should be made explicit. The Court quoting In re Kahn, 441 F.3d 977, 988, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006), stated that "‘[R]ejections on obviousness cannot be sustained by mere conclusory statements; instead, there must be some articulated reasoning with some rational underpinning to support the legal conclusion of obviousness.’" KSR, 550 U.S. at 418, 82 USPQ2d at 1396. See also Adapt Pharma Operations Ltd. v. Teva Pharms. USA, Inc., 25 F.4th 1354, 1365, 2022 USPQ2d 144 (Fed. Cir. 2022) (stating that a determination of obviousness "requires ‘identify[ing] a reason that would have prompted a person of ordinary skill in the relevant field to combine the elements in the way the claimed new invention does’" (quoting KSR, 550 U.S. at 418, 82 USPQ2d at 1395). Examples of rationales that may support a conclusion of obviousness include:
(A) Combining prior art elements according to known methods to yield predictable results;
(B) Simple substitution of one known element for another to obtain predictable results;
(C) Use of known technique to improve similar devices (methods, or products) in the same way;
(D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results;
(E) "Obvious to try" – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success;
(F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art;
(G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Here, Yang teaches that the use of neural net of artificial network was a known method or technique to improve temperature control of a computational device in the semiconductor art. Replacing or modifying a PID controller with a neural-net method to determine PID parameters would have predictably provides ways to control the temperature of a device. Even thought the neural-net method taught by Jenne is directed to controlling the temperature of a computer processor (and not a memory storage device), known work in one field of endeavor (temperature control of a computer processor) may prompt variations of it for use in either the same field or a different one (memory storage device) based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art as before the effective filing date, artificial intelligence had been known in the market to provide improvements over known computer-based algorithms
Thus, before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art would to have modified the system of Jenne by implementing a neural network algorithm of artificial intelligence computing as taught by Yang to determine the PID parameters of Jeanne with a reasonable expectation of predictable success of improving the cooling of memory storage device by avoiding “…searching an optimized solution of the PID parameters, and save develop time of factory” (Yang, col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively...” (Yang, col. 2, ln 14-29).
Regarding claim 3, the combination above further teaches the operation that comprises determining an operational parameter (transfer rate of data for the save operation) of the memory storage device 130 (Jenne, para [0043] - “To address this problem, the NVM save controller 141 can be configured according to an embodiment to limit the rate of thermal output of the NVDIMM 130 during a save operation. According to such an embodiment, the rate of thermal output is controlled by changing the rate at which information is transferred from volatile memory 135 to non-volatile memory 136 during a save operation. For example, an indicator of the desired transfer rate can be stored at a storage location of the NVDIMM, such as at register 161. The transfer rate indicator can be based upon one or more temperature readings from a thermal sensor 135 of the NVDIMM. Thermal sensor 135 can be located at various locations of the NVDIMM 130, or based upon temperature information from sensors external the NVDIMM, for example, the temperature sensor can reside near the non-volatile memory of the memory module as the non-volatile memory is more susceptible to failure at increased temperature. It will be appreciated that multiple temperature sensors can be used and monitored. For example, thermal sensors can be placed in close proximity to components known to be particularly sensitive to heat, such as near specific portions of the non-volatile memory 136, the NVM save controller 141, and the like. Particular implementations of NVM save controller 141 will be better understood with reference to FIGS. 2-6.”).
Regarding claim 4, the combination above further teaches the operation that comprises determining thermal-related data for the memory storage device 130 (Jenne, para [0050] - “At block 304, the manner in which the NVDIMMs of system 100 are configured for use is defined by the system 100 based upon the energy/power characteristics determined at block 302 to ensure sufficient energy and power is available. For example, if it is determined that the maximum power needed by the NVDIMMs by a current configuration of the system is too great to ensure proper operation of simultaneous save operations during an initial period, the system can configure the NVDIMMs to have delayed save operations, thus reducing the maximum power needed. In another embodiment, the maximum power needed can be reduced by configuring the system so that some of the NVDIMMs are not used.”; para [0051] - “[0051] At block 306, a transfer rate to be implemented at one or more NVDIMMs during a save operation is determined by the system based upon temperature information. The temperature information can include historical temperature information that indicates whether the amount of heat generated by save operations of the NVDIMMs of a particular system can result in thermal conditions exceeding levels beyond which proper operation of the NVDIMM, or other component, can be guaranteed.”).
Regarding claim 5, the combination above further teaches the apparatus that is a first apparatus and the memory storage device 130 is configured to send the thermal-related data to a second apparatus 110, 180 or 1040 (Jenne, para [0103] - “processing complex 110”; see Fig. 1, Jenne, para [0058] - “system service controller 180”; Jenne, para [0079] - “a fan subsystem 1040”).
Regarding claim 6, the combination above further teaches the thermal-related data that comprises a thermal setting (desired temperature or desired temperature range) (Jenne, para [0057] - “For example, a desired temperature or a desired temperature range can be stored at the register 419 that is used by the rate update controller 414 to determine a new XFER RATE value needed to maintain the desired temperature.”)
Regarding claim 7, the combination above further teaches the thermal-related data that comprises a temperature trend (historical temperature information) (Jenne, para [0057] - “For example, entries corresponding to various temperatures of sensor 135 can be maintained at the NVDIMM 430 along with corresponding XFER RATE values that can be retrieved for its corresponding temperature entry, for a difference in current and next temperature value, historical temperature information and the like. The rate update controller 414 can alternatively include circuitry to calculate the XFER RATE based upon PID control theory using historical temperature information and the desired temperature information. It will be appreciated that the desired temperature information can be programmable by the master, fixed, and the like.”).
Regarding claim 8, the combination above teaches the artificial intelligence system that is configured to perform the operation based on a workload of the memory storage device 130 (Jenne, para [0075] - "…according to an embodiment, by knowing the rate at which heat is dissipated by the system 600, and by knowing the rate at which an individual NVDIMM generates heat, a temperature threshold value can be determined below which another NVDIMM can begin its save operation, without overheating. This value can be then be stored at register 811.”).
Regarding claim 9, the combination of above teaches the artificial intelligence system that is configured to perform the operation based on a pattern of a workload of the memory storage device (Jenne, para [0068] - “The thermal controller may also determine that initiation of the NVDIMM save operations needs to be staggered to avoid generating heat a rate that would cause the system to overheat, and provide appropriate timing information to the save signal controller 727.”).
Regarding independent claim 10, Jenne teaches an apparatus (see Fig. 1 and Fig. 11) comprising:
a computing system 100 (para [0025] - “FIG. 1 illustrates portions of an information handling system 100…For example, information handling system 100 can be a personal computer…”);
a processor 110 (para [0103] - “processing complex”) configured to access a memory storage device 130 (para [0030] - “NVDIMM 130 includes an NVDIMM controller 140, a volatile memory 134, also referred to herein by way of example as a DRAM, non-volatile memory 136, which can be a flash type memory, a data bus switch 132, and control/address bus switch 133, a power terminal connected to the system power source 152, and a power terminal connected to the backup power source 150.”), wherein the computing system 100 is configured to thermally couple the memory storage device 130 to at least a portion of the computing system 100;
a system 141 (para [0043]- “Particular implementations of NVM save controller 141 will be better understood with reference to FIGS. 2-6.”; para [0056] - “NVM save controller 441 can be an embodiment of the NVM save controller 141 of FIG. 1, and includes a rate update controller 414 associated with registers 419, a thermal throttling controller 416 associated with register 461, a transfer controller 462, and a buffer 463. Transfer controller 462 and buffer 463 can operate in the same manner as the transfer controller 262 and buffer 263 of FIG. 2. During operation, the rate update controller 414 can receive temperature information from one or more temperature sensors including temperature sensor 135. The temperature information can be used by the rate update controller 414 to determine a next XFER RATE value to be stored in register 461 that will replace the current XFER RATE value, and thus becoming the current XFER RATE. How frequently the XFER RATE is to be updated can be based upon a period indicator stored at register 419. For example, a period indicator can specify how often that the temperature sensor 135 is to be evaluated, and the value XFER RATE updated. By periodically updating the transfer rate indicator based upon a temperature of the NVDIMM, a closed-loop feedback system is created that can control the thermal output rate of the NVDIMM. This process can be referred to as thermal throttling.”; para [0054] - “The transfer rate saved at an NVDIMM can be calculated using various calculations, including a proportional-integral-derivative (PID) calculation as implemented by PID control circuitry.) configured to perform a first operation (para [0043] - “The transfer rate indicator can be based upon one or more temperature readings from a thermal sensor 135 of the NVDIMM.”; para [0051] - “At block 306, a transfer rate to be implemented at one or more NVDIMMs during a save operation is determined by the system based upon temperature information. The temperature information can include historical temperature information that indicates whether the amount of heat generated by save operations of the NVDIMMs of a particular system can result in thermal conditions exceeding levels beyond which proper operation of the NVDIMM, or other component, can be guaranteed.”; para [0052] - “In an embodiment, historical information can be used to determine an acceptable rate of heat generation by each NVDIMM of the system to ensure none of the components of the system, and in particular the NVDIMMs, overheat. A data transfer rate to be implemented by each NVDIMM of the system that corresponds to a desired rate of heat generation of that NVDIMM can then be stored by the system at each one of the NVDIMMs.”) based on thermal-related data (temperature data or historical information of the temperature from temperature sensor 135) for the at least a portion of the computing system 100; and
a thermal apparatus 1040 (para [0079] - “a fan subsystem 1040”) configured to perform, based on the first operation, a second operation (para [0081] - “In another embodiment, a characteristic of the fan subsystem, such as its current draw or its fan's speed, can be monitored to determine when to enable save operations at the NVDIMMs 1030. For example, one or more save operations can be enabled after the current draw of the fan subsystem has dropped below a desired threshold, stored at register OTHER 811, or after the fan speed of a fan of the fan subsystem 1040 has dropped below a desired amount.”), wherein the second operation comprises a heat transfer operation (cooling via fan) on the at least a portion of the computing system 100.
Jenne does not teach that the system is an artificial intelligence system.
Yang recognizes that “…some electronic apparatuses apply a Neural network algorithm to dynamically calculate to generate the aforementioned PID parameters, for calculation of the PID controller.” (col. 1, ln 34-40]).
Yang further recognizes that “…a general Neutral network algorithm continuously detects temperature of entire electronic apparatus or temperature of CPU, and dynamically performs calculations according to temperature to generate the above PID parameters. Thus, if the electronic apparatus causes the temperature to increase greatly and instantly for special condition, the existing cooling system spends much time to decrease the temperature of the electronic apparatus to be lower than a set-point. In this way, high temperature for a long time may damage interior elements of the electronic apparatus.” (col 1, ln 41-50).
Yang improves upon the known Neural network algorithm by obtaining “…predicted PWM value from a pre-established neural-network data array or a gradually established learning table, and uses the PID controller to perform error adjustment process to the predicted PWM value. Therefore, the present invention differs from relative art as for calculating the PWM value directly through the PID controller, or for dynamically calculating control of the PWM value by Neutral network algorithm according to temperature variation…” which “can avoid searching an optimized solution of the PID parameters, and save develop time of factory” (col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively, and thus obtain faster cooling of the electronic apparatus.” (col. 2, ln 14-29).
Section 2141.III. of the MPEP provides the following guidance for rationales to support rejections under 35 U.S.C. 103:
The key to supporting any rejection under 35 U.S.C. 103 is the clear articulation of the reason(s) why the claimed invention would have been obvious. The Supreme Court in KSR noted that the analysis supporting a rejection under 35 U.S.C. 103 should be made explicit. The Court quoting In re Kahn, 441 F.3d 977, 988, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006), stated that "‘[R]ejections on obviousness cannot be sustained by mere conclusory statements; instead, there must be some articulated reasoning with some rational underpinning to support the legal conclusion of obviousness.’" KSR, 550 U.S. at 418, 82 USPQ2d at 1396. See also Adapt Pharma Operations Ltd. v. Teva Pharms. USA, Inc., 25 F.4th 1354, 1365, 2022 USPQ2d 144 (Fed. Cir. 2022) (stating that a determination of obviousness "requires ‘identify[ing] a reason that would have prompted a person of ordinary skill in the relevant field to combine the elements in the way the claimed new invention does’" (quoting KSR, 550 U.S. at 418, 82 USPQ2d at 1395). Examples of rationales that may support a conclusion of obviousness include:
(A) Combining prior art elements according to known methods to yield predictable results;
(B) Simple substitution of one known element for another to obtain predictable results;
(C) Use of known technique to improve similar devices (methods, or products) in the same way;
(D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results;
(E) "Obvious to try" – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success;
(F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art;
(G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Here, Yang teaches that the use of neural net of artificial network was a known method or technique to improve temperature control of a computational device in the semiconductor art. Replacing or modifying a PID controller with a neural-net method to determine PID parameters would have predictably provides ways to control the temperature of a device. Even thought the neural-net method taught by Jenne is directed to controlling the temperature of a computer processor (and not a memory storage device), known work in one field of endeavor (temperature control of a computer processor) may prompt variations of it for use in either the same field or a different one (memory storage device) based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art as before the effective filing date, artificial intelligence had been known in the market to provide improvements over known computer-based algorithms
Thus, before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art would to have modified the system of Jenne by implementing a neural network algorithm of artificial intelligence computing as taught by Yang to determine the PID parameters of Jeanne with a reasonable expectation of predictable success of improving the cooling of memory storage device by avoiding “…searching an optimized solution of the PID parameters, and save develop time of factory” (Yang, col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively...” (Yang, col. 2, ln 14-29).
Regarding claim 11, the combination above further teaches the thermal-related data that comprises a temperature trend (historical temperature information) (Jenne, para [0057] - “For example, entries corresponding to various temperatures of sensor 135 can be maintained at the NVDIMM 430 along with corresponding XFER RATE values that can be retrieved for its corresponding temperature entry, for a difference in current and next temperature value, historical temperature information and the like. The rate update controller 414 can alternatively include circuitry to calculate the XFER RATE based upon PID control theory using historical temperature information and the desired temperature information. It will be appreciated that the desired temperature information can be programmable by the master, fixed, and the like.”; Yang, col. 3, ln 45-58 - “Please refer to FIG. 4, which shows a diagram of trench of temperature variation according to the first embodiment of the present invention.”).
Regarding claim 12, the combination above teaches the at least a portion of the computing system 100 that comprises at least a portion of the memory storage device 130 (see Fig. 1).
Regarding claim 13, the combination above teaches the artificial intelligence system that is configured to perform the first operation based on a pattern of a workload of the memory storage device (Jenne, para [0068] - “The thermal controller may also determine that initiation of the NVDIMM save operations needs to be staggered to avoid generating heat a rate that would cause the system to overheat, and provide appropriate timing information to the save signal controller 727.”).
Regarding claim 14, the combination above teaches the artificial intelligence system that is configured to perform the first operation based on a power consumption (Jenne, para [0059] - “At block 502, one or both of an energy and power characteristic of the system can be determined as previously described with reference to block 302 of the method of FIG. 3. At block 504, the manner in which the NVDIMMs of system 100 are accessed is defined at system 100 based upon the energy/power characteristics as previously described with reference to block 304 of FIG. 3.”) of the memory storage device 130.
Regarding claim 15, the combination above teaches the computing system 100 that comprises a controller 1012 (Jenne, para [0080] - “a fan controller 1012”) see Fig. 11) configured to control, based on the first operation, the thermal apparatus 1040.
Regarding claim 16, the combination above teaches the artificial intelligence system that is configured to receive, from the memory storage device 130, at least a portion of the thermal-related data (Jenne, para [0043] - “The transfer rate indicator can be based upon one or more temperature readings from a thermal sensor 135 of the NVDIMM. Thermal sensor 135 can be located at various locations of the NVDIMM 130, or based upon temperature information from sensors external the NVDIMM, for example, the temperature sensor can reside near the non-volatile memory of the memory module as the non-volatile memory is more susceptible to failure at increased temperature. It will be appreciated that multiple temperature sensors can be used and monitored. “).
Regarding claim 17, the combination above further teaches the thermal-related data that comprises a temperature trend (historical temperature information) (Jenne, para [0057] - “For example, entries corresponding to various temperatures of sensor 135 can be maintained at the NVDIMM 430 along with corresponding XFER RATE values that can be retrieved for its corresponding temperature entry, for a difference in current and next temperature value, historical temperature information and the like. The rate update controller 414 can alternatively include circuitry to calculate the XFER RATE based upon PID control theory using historical temperature information and the desired temperature information. It will be appreciated that the desired temperature information can be programmable by the master, fixed, and the like.”; Yang, col. 3, ln 45-58 - “Please refer to FIG. 4, which shows a diagram of trench of temperature variation according to the first embodiment of the present invention.”).
Regarding independent claim 18, Jenne teaches a method comprising:
performing, by a system 141 (para [0043]- “Particular implementations of NVM save controller 141 will be better understood with reference to FIGS. 2-6.”; para [0056] - “NVM save controller 441 can be an embodiment of the NVM save controller 141 of FIG. 1, and includes a rate update controller 414 associated with registers 419, a thermal throttling controller 416 associated with register 461, a transfer controller 462, and a buffer 463. Transfer controller 462 and buffer 463 can operate in the same manner as the transfer controller 262 and buffer 263 of FIG. 2. During operation, the rate update controller 414 can receive temperature information from one or more temperature sensors including temperature sensor 135. The temperature information can be used by the rate update controller 414 to determine a next XFER RATE value to be stored in register 461 that will replace the current XFER RATE value, and thus becoming the current XFER RATE. How frequently the XFER RATE is to be updated can be based upon a period indicator stored at register 419. For example, a period indicator can specify how often that the temperature sensor 135 is to be evaluated, and the value XFER RATE updated. By periodically updating the transfer rate indicator based upon a temperature of the NVDIMM, a closed-loop feedback system is created that can control the thermal output rate of the NVDIMM. This process can be referred to as thermal throttling.”; para [0054] - “The transfer rate saved at an NVDIMM can be calculated using various calculations, including a proportional-integral-derivative (PID) calculation as implemented by PID control circuitry.), a first operation based on a temperature related to at least a portion of a computing system 100 (para [0025] - “FIG. 1 illustrates portions of an information handling system 100…For example, information handling system 100 can be a personal computer…”), wherein the computing system 100 is configured to thermally couple a memory storage device 130 (para [0030] - “NVDIMM 130 includes an NVDIMM controller 140, a volatile memory 134, also referred to herein by way of example as a DRAM, non-volatile memory 136, which can be a flash type memory, a data bus switch 132, and control/address bus switch 133, a power terminal connected to the system power source 152, and a power terminal connected to the backup power source 150.”) to the at least a portion of the computing system 100; and
performing, based on the first operation, as a second operation (para [0081] - “In another embodiment, a characteristic of the fan subsystem, such as its current draw or its fan's speed, can be monitored to determine when to enable save operations at the NVDIMMs 1030. For example, one or more save operations can be enabled after the current draw of the fan subsystem has dropped below a desired threshold, stored at register OTHER 811, or after the fan speed of a fan of the fan subsystem 1040 has dropped below a desired amount.”), wherein the second operation comprises a thermal management operation (cooling via fan) on the at least a portion of the computing system 100.
Jenne does not teach that the system is an artificial intelligence system.
Yang recognizes that “…some electronic apparatuses apply a Neural network algorithm to dynamically calculate to generate the aforementioned PID parameters, for calculation of the PID controller.” (col. 1, ln 34-40]).
Yang further recognizes that “…a general Neutral network algorithm continuously detects temperature of entire electronic apparatus or temperature of CPU, and dynamically performs calculations according to temperature to generate the above PID parameters. Thus, if the electronic apparatus causes the temperature to increase greatly and instantly for special condition, the existing cooling system spends much time to decrease the temperature of the electronic apparatus to be lower than a set-point. In this way, high temperature for a long time may damage interior elements of the electronic apparatus.” (col 1, ln 41-50).
Yang improves upon the known Neural network algorithm by obtaining “…predicted PWM value from a pre-established neural-network data array or a gradually established learning table, and uses the PID controller to perform error adjustment process to the predicted PWM value. Therefore, the present invention differs from relative art as for calculating the PWM value directly through the PID controller, or for dynamically calculating control of the PWM value by Neutral network algorithm according to temperature variation…” which “can avoid searching an optimized solution of the PID parameters, and save develop time of factory” (col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively, and thus obtain faster cooling of the electronic apparatus.” (col. 2, ln 14-29).
Section 2141.III. of the MPEP provides the following guidance for rationales to support rejections under 35 U.S.C. 103:
The key to supporting any rejection under 35 U.S.C. 103 is the clear articulation of the reason(s) why the claimed invention would have been obvious. The Supreme Court in KSR noted that the analysis supporting a rejection under 35 U.S.C. 103 should be made explicit. The Court quoting In re Kahn, 441 F.3d 977, 988, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006), stated that "‘[R]ejections on obviousness cannot be sustained by mere conclusory statements; instead, there must be some articulated reasoning with some rational underpinning to support the legal conclusion of obviousness.’" KSR, 550 U.S. at 418, 82 USPQ2d at 1396. See also Adapt Pharma Operations Ltd. v. Teva Pharms. USA, Inc., 25 F.4th 1354, 1365, 2022 USPQ2d 144 (Fed. Cir. 2022) (stating that a determination of obviousness "requires ‘identify[ing] a reason that would have prompted a person of ordinary skill in the relevant field to combine the elements in the way the claimed new invention does’" (quoting KSR, 550 U.S. at 418, 82 USPQ2d at 1395). Examples of rationales that may support a conclusion of obviousness include:
(A) Combining prior art elements according to known methods to yield predictable results;
(B) Simple substitution of one known element for another to obtain predictable results;
(C) Use of known technique to improve similar devices (methods, or products) in the same way;
(D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results;
(E) "Obvious to try" – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success;
(F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art;
(G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Here, Yang teaches that the use of neural net of artificial network was a known method or technique to improve temperature control of a computational device in the semiconductor art. Replacing or modifying a PID controller with a neural-net method to determine PID parameters would have predictably provides ways to control the temperature of a device. Even thought the neural-net method taught by Jenne is directed to controlling the temperature of a computer processor (and not a memory storage device), known work in one field of endeavor (temperature control of a computer processor) may prompt variations of it for use in either the same field or a different one (memory storage device) based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art as before the effective filing date, artificial intelligence had been known in the market to provide improvements over known computer-based algorithms
Thus, before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art would to have modified the system of Jenne by implementing a neural network algorithm of artificial intelligence computing as taught by Yang to determine the PID parameters of Jeanne with a reasonable expectation of predictable success of improving the cooling of memory storage device by avoiding “…searching an optimized solution of the PID parameters, and save develop time of factory” (Yang, col. 2, ln 14-29) so that “The present invention can make the electronic apparatus capable of self-adaptation, learning and developing to make fans operate more effectively...” (Yang, col. 2, ln 14-29).
Regarding claim 19, the combination above teaches the first operation that comprises determining a temperature trend (historical temperature information) for the at least a portion of the computing system 100 (Jenne, para [0057] - “For example, entries corresponding to various temperatures of sensor 135 can be maintained at the NVDIMM 430 along with corresponding XFER RATE values that can be retrieved for its corresponding temperature entry, for a difference in current and next temperature value, historical temperature information and the like. The rate update controller 414 can alternatively include circuitry to calculate the XFER RATE based upon PID control theory using historical temperature information and the desired temperature information. It will be appreciated that the desired temperature information can be programmable by the master, fixed, and the like.”; Yang, col. 3, ln 45-58 - “Please refer to FIG. 4, which shows a diagram of trench of temperature variation according to the first embodiment of the present invention.”).
Regarding claim 20, combination above further teaches the first operation that comprises determining an operational parameter (transfer rate of data for the save operation) of the memory storage device 130 (Jenne, para [0043] - “To address this problem, the NVM save controller 141 can be configured according to an embodiment to limit the rate of thermal output of the NVDIMM 130 during a save operation. According to such an embodiment, the rate of thermal output is controlled by changing the rate at which information is transferred from volatile memory 135 to non-volatile memory 136 during a save operation. For example, an indicator of the desired transfer rate can be stored at a storage location of the NVDIMM, such as at register 161. The transfer rate indicator can be based upon one or more temperature readings from a thermal sensor 135 of the NVDIMM. Thermal sensor 135 can be located at various locations of the NVDIMM 130, or based upon temperature information from sensors external the NVDIMM, for example, the temperature sensor can reside near the non-volatile memory of the memory module as the non-volatile memory is more susceptible to failure at increased temperature. It will be appreciated that multiple temperature sensors can be used and monitored. For example, thermal sensors can be placed in close proximity to components known to be particularly sensitive to heat, such as near specific portions of the non-volatile memory 136, the NVM save controller 141, and the like. Particular implementations of NVM save controller 141 will be better understood with reference to FIGS. 2-6.”) for the memory storage device 130.
Regarding claim 21, the combination above teaches the thermal management operation that comprises operating a thermal apparatus 1040 (Jenne, (para [0079] - “a fan subsystem 1040”).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Pub. No. US 2018/0350410 A1 to Curtis et al.
Pub. No. US 2013/0158738 A1 to Chen et al.
Pub. No. US 2012/0209448 A1 to Brower
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL JUNG whose telephone number is (408) 918-7554. The examiner can normally be reached on 8:30 A.M. to 7 P.M.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached on (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL JUNG/Primary Examiner, Art Unit 2817 21 February 2026
1 Applicant preliminarily amended the claim(s) by canceling claim 1 and adding claims 2-21 on 07/10/2023.
2 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status