Tech Center 2800 • Art Units: 2800 2812 2817 2895 2898
This examiner grants 83% of resolved cases
Michael Yoo Lim Jung is a USPTO patent examiner in Tech Center 2800 and Art Unit 2800. The examiner has 1285 resolved cases, which results in an allowance rate of 82.6%. This percentage indicates the frequency of granted patents among the resolutions. The median days to allowance for these cases is 872, providing a benchmark for the timeline of successful prosecution in this unit.
The data shows an interview lift of 10.5%. This figure indicates that applications involving an interview have a higher probability of allowance than those without one. With 1285 resolved cases, the examiner has a history of resolutions in Tech Center 2800. Practitioners can use the 872-day median to manage expectations regarding the duration of the patent acquisition process.
In Art Unit 2800, the examiner's 82.6% allowance rate and 10.5% interview lift are metrics for strategy. The median pendency is a figure that describes the time required to reach an allowance. These data points from the resolved cases offer an overview of the examiner's performance. Applicants should consider the 10.5% lift when deciding whether to request an interview.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18676799 | MAGNETIC TUNNEL JUNCTION ELEMENT AND MEMORY DEVICE INCLUDING MAGNETIC TUNNEL JUNCTION ELEMENT | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18348934 | MOLDING COMPOUND LAYERS IN SEMICONDUCTOR PACKAGES | Non-Final OA | Apple Inc. |
| 18768760 | DISPLAY MODULE, DISPLAY APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE DISPLAY APPARATUS | Non-Final OA | Samsung Display Co., Ltd. |
| 18763136 | DISPLAY DEVICE | Non-Final OA | Samsung Display Co., LTD. |
| 18680467 | DISPLAY DEVICE | Non-Final OA | Samsung Display Co., Ltd. |
| 18641969 | DISPLAY DEVICE | Non-Final OA | Samsung Display Co., LTD. |
| 18426382 | DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18344260 | PACKAGING ARCHITECTURE INCLUDING COMPENSATION LAYERS FOR WAFER-SCALE KNOWN-GOOD-DIE TO KNOWN-GOOD-DIE HYBRID BONDING | Non-Final OA | Intel Corporation |
| 17846303 | SINGLE LITHOGRAPHY METHODS FOR INTERCONNECT ARCHITECTURES | Final Rejection | Intel Corporation |
| 18619747 | INTEGRATED CIRCUIT (IC) WITH HIGH-VOLTAGE ROBUSTNESS | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18783529 | BARRIER STRUCTURE CONFIGURED TO INCREASE PERFORMANCE OF III-V DEVICES | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18753091 | CHIP PACKAGE HAVING MULTIPLE CHIPS | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18786532 | Nanostructure Field-Effect Transistor Device and Method of Forming | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18668911 | GATE ISOLATION FOR MULTIGATE DEVICE | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18628173 | SEMICONDUCTOR PACKAGE AND METHOD | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18119080 | METHODS OF FORMING METAL LINER FOR INTERCONNECT STRUCTURES | Final Rejection | Applied Materials, Inc. |
| 18641543 | SPIRAL GRAPHENE NANOCRYSTAL, GRAPHENE FILM, INTERCONNECTSTRUCTURE, ELECTRONIC DEVICE INCLUDING SAME, AND METHOD OF FABRICATING INTERCONNECT STRUCTURE | Non-Final OA | UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY) |
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