Prosecution Insights
Last updated: August 17, 2026
Application No. 17/855,036

Thin-Film Transistor Array Substrate and Display Device

Non-Final OA §102§103
Filed
Jun 30, 2022
Priority
Oct 01, 2021 — RE 10-2021-0131187
Examiner
CHA, GRACE YEH-EUN SAET
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
3 (Non-Final)
98%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 98% — above average
98%
Career Allowance Rate
39 granted / 40 resolved
+29.5% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
22 currently pending
Career history
68
Total Applications
across all art units

Statute-Specific Performance

§103
66.5%
+26.5% vs TC avg
§102
25.8%
-14.2% vs TC avg
§112
7.7%
-32.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 40 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/09/2026 has been entered. Information Disclosure Statement The information disclosure statement (IDS) submitted on 04/06/2026 was filed after the mailing date of the Final Office Action on 10/09/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Amendment Acknowledgment is made of the amendment filed 03/09/2026, in which: claims 1, 6, 15, 17-18, and 21 are amended; claims 7, 10-11, and 18 stand withdrawn; and the rejection of the claims are traversed. Claims 1-6, 8-9, 12-17, and 19-21 are currently pending an Office action on the merits as follows. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1-2, 4-6, 8-9, 15-17, and 20 are rejected under 35 U.S.C. 102(a)(1)(a)(2) as being anticipated by Koezuka et al. (US Publication 20150187953). Regarding independent claim 1, Koezuka teaches a display device (fig. 27B, 800) comprising: a substrate (fig. 3C, 102); a semiconductor layer (106) comprising a channel portion (fig. 2, 106c and 106d), a first conductive portion (106a and 106b on left side) positioned on a first side of the channel portion, [[and,]] and a second conductive portion (106a and 106b on right side) positioned on a second side of the channel portion that is opposite the first side, the first conductive portion including a first main conductive portion (106a left side) and a first sub-conductive portion (106b left side) that is less conductive than the first main conductive portion (paragraph 0092, “the regions 106a in contact with the conductive film 110 and the conductive film 112 have higher conductivity”), and the second conductive portion including a second main conductive portion (106a right side) and a second sub-conductive portion (106b right side) that is less conductive than the second main conductive portion (paragraphs 0092-0093); a gate insulating film (108) on the channel portion; a first auxiliary electrode (fig. 3C, 110a) positioned directly on the first main conductive portion; a first electrode (110b and 110c) on the first auxiliary electrode; a second auxiliary electrode (112a) positioned directly on the second main conductive portion; a second electrode (112b and 112c) on the second auxiliary electrode; a third electrode (114) positioned on the gate insulating film, the third electrode overlapping the channel portion (fig. 2); and a passivation layer (fig. 2, 116) on the first electrode, the second electrode, and the third electrode, the passivation layer in contact with the first sub-conductive portion and the second sub-conductive portion (fig. 2), wherein each of the first auxiliary electrode and the second auxiliary electrode comprises a conductive oxide (paragraphs 0147-0148). Regarding dependent claim 2, Koezuka teaches the display device of claim 1, wherein the conductive oxide comprises at least one of a transparent conductive oxide, a nitrogen oxide, or an organic matter (paragraph 0148, the case of using a Cu--X alloy (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti), a covering film is formed in a region in contact with the oxide semiconductor film or a region in contact with an insulating film by heat treatment… Examples of the compound containing X include an oxide of X, an In--X oxide, a Ga--X oxide, an In--Ga--X oxide, and In--Ga--Zn--X oxide). Regarding dependent claim 4, Koezuka teaches the display device of claim 1, wherein the first sub-conductive portion is non-overlapping with at least one of the first electrode or the third electrode (fig. 2, 106b on left side does not overlap with 110a which is in 110 and 114), and an electrical conductivity of the first sub-conductive portion is different from an electric conductivity of the first main conductive portion (paragraphs 0092-0093), and the second sub-conductive portion is non-overlapping with at least one of the second electrode or the third electrode (fig. 2, 106b on right side does not overlap with 112a which is in 112 and 114), and an electrical conductivity of the second sub-conductive portion is different from an electrical conductivity of the second main conductive portion (paragraphs 0092-0093). Regarding dependent claim 5, Koezuka teaches the display device of claim 1, wherein at least one among the first electrode, the second electrode, or the third electrode comprises a first material layer (fig. 3C, 110b, 112b, and 114b) and a second material layer (110c, 112c, and 114c), the first material layer including a first material (paragraph 0150) and the second material layer including a second material (paragraph 0151) that is different from the first material, and each of the first material and the second material is different from the conductive oxide and lacks oxygen (paragraph 0152, both first and second material is different from the conductive oxide and lack oxygen). Regarding dependent claim 6, Koezuka further teaches the display device of claim 1, further comprising: wherein the gate insulating film comprises a first open area (fig. 3C, 140a) that exposes the first sub-conductive portion in the first open area and a second open area (140b) that exposes the second sub-conductive portion in the second area such that a first portion of the passivation layer is in contact with the first sub-conductive portion in the first open area (fig. 3C), and a second portion of the passivation layer is in contact with the second sub-conductive portion in the second open area (fig. 3C), wherein the first electrode and the first auxiliary electrode are electrically connected in the first open area (fig. 3C), and the second electrode and the second auxiliary electrode are electrically connected in the second open area (fig. 3C). Regarding dependent claim 8, Koezuka teaches the display device of claim 6, wherein the passivation layer comprises a plurality of layers (paragraph 0136, “insulating film 116 can be formed to have a single-layer structure of a stacked-layer structure using an oxide insulating film or a nitride insulating film”), each layer from the plurality of layers having a different hydrogen content from other layers from the plurality of layers (paragraph 0137, “for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga--Zn oxide”, all which have different hydrogen contents from each other). Regarding dependent claim 9, Koezuka teaches the display device of claim 8, wherein the hydrogen content of at least one of the plurality of layers of the passivation layer is greater than a hydrogen content of the first sub-conductive portion and a hydrogen content of the second sub-conductive portion (paragraph 0288, “hydrogen contained in the insulating film 176 is diffused into the oxide semiconductor film 166”, thus hydrogen content in 176 is greater than hydrogen content of first and second sub-conductive portions). Regarding independent claim 15, Koezuka teaches a display device (fig. 27B, 800) comprising: a substrate (fig. 3C, 102); a semiconductor layer (106) on the substrate, the semiconductor layer including a channel portion (fig. 2, 106c and 106d), a first conductive portion (106a and 106b on left side) positioned on a first side of the channel portion, and a second conductive portion (106a and 106b on right side) positioned on a second side of the channel portion that is opposite the first side, the first conductive portion including a first main conductive portion (106a left side) and a first sub-conductive portion (106b left side) that has different electrical characteristics than the first main conductive portion (paragraph 0092), the first main conductive portion farther from the channel portion than the first sub-conductive portion is from the channel portion (fig. 2), [[and]] the second conductive portion including a second main conductive portion (106a right side) and a second sub-conductive portion (106b right side) that has different electrical characteristics than the second main conductive portion (paragraphs 0092-0093), and the second main conductive portion farther from the channel portion than the second sub-conductive portion is from the channel portion (fig. 2); a first auxiliary electrode positioned on the first main conductive portion (fig. 3C, 110a), but not overlapping the first sub-conductive portion in a plan view of the display device (fig. 2, 110a inside 110); a first electrode (110b and 110c) on the first auxiliary electrode, the first electrode overlapping the first main conductive portion but is non-overlapping with the first sub-conductive portion (fig. 2, 110b and 110c inside 110); a second auxiliary electrode (fig. 3C, 112a) positioned on the second main conductive portion, but not overlapping the second sub-conductive portion in the plan view of the display device (fig. 2, 112a inside 112); a second electrode (fig. 3C, 112b and 112c) on the second auxiliary electrode, the second electrode overlapping the second main conductive portion but is non-overlapping with the second sub-conductive portion (fig. 2, 112b and 112c inside 112); a third electrode (114) overlapping the channel portion and not overlapping either the first sub-conductive portion or the second sub-conductive portion in the plan view of the display device (fig. 2); and a passivation layer (116) on the first electrode, the second electrode, and the third electrode, the passivation layer in contact with the first sub-conductive portion and the second sub-conductive portion (fig. 2), wherein the first sub-conductive portion is less conductive than the first main conductive portion, and the second sub-conductive portion is less conductive than the second main conductive portion (paragraphs 0092-0093). Regarding dependent claim 16, Koezuka teaches the display device of claim 15, wherein the first auxiliary electrode and the second auxiliary electrode each comprises a conductive oxide (paragraph 0148, the case of using a Cu--X alloy (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti), a covering film is formed in a region in contact with the oxide semiconductor film or a region in contact with an insulating film by heat treatment… Examples of the compound containing X include an oxide of X, an In--X oxide, a Ga--X oxide, an In--Ga--X oxide, and In--Ga--Zn--X oxide). Regarding dependent claim 17, Lee further teaches the display device of claim 15, further comprising: a gate insulating film (fig. 2, 108) between the third electrode and the channel portion, the gate insulating film non-overlapping with the first sub-conductive portion and the second sub-conductive portion (fig. 2) Regarding dependent claim 20, Koezuka further teaches the display device of claim 15, further comprising: a light-emitting element (fig. 29, 880) configured to emit light (paragraph 0526), wherein the semiconductor layer, the first auxiliary electrode, the first electrode, the second auxiliary electrode, the second electrode, and the third electrode are included in a transistor (750) that is electrically connected to the light-emitting element (fig. 29). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3, 19, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Koezuka in view of Park et al. (US Publication 20120326174). Regarding dependent claim 3, Koezuka teaches the display device of claim 1, wherein the first sub-conductive portion is positioned between the first main conductive portion and the channel portion (fig. 2), and the second sub-conductive portion is positioned between the second main conductive portion and the channel portion (fig. 2). Koezuka does not teach a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion, and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion. Park teaches a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of first main conductive portion 108 is less than resistance of first sub-conductive portion 120 left of 110, and resistance of first sub-conductive portion 120 left of 110 is less than resistance of channel portion 110), and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of second main conductive portion 109 is less than resistance of second sub-conductive portion 120 right of 110, and resistance of first sub-conductive portion 120 right of 110 is less than resistance of channel portion 110). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Koezuka and the main and sub-conductive portions’ resistivity of Park in order to form lightly doped drain (LDD) regions such that the concentration of dopant is less than that of the source region and the drain region (Park paragraph 0059). Regarding dependent claim 19, Koezuka teaches the display device of claim 15, wherein the electrical characteristics include resistance and electrical conductivity (paragraphs 0092-0093) Koezuka does not teach wherein a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion, and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion, wherein an electrical conductivity of the first sub-conductive portion is different from an electric conductivity of the first main conductive portion, and an electrical conductivity of the second sub-conductive portion is different from an electrical conductivity of the second main conductive portion. Park teaches wherein a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of first main conductive portion 108 is less than resistance of first sub-conductive portion 120 left of 110, and resistance of first sub-conductive portion 120 left of 110 is less than resistance of channel portion 110), and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of second main conductive portion 109 is less than resistance of second sub-conductive portion 120 right of 110, and resistance of first sub-conductive portion 120 right of 110 is less than resistance of channel portion 110), wherein an electrical conductivity of the first sub-conductive portion is different from an electric conductivity of the first main conductive portion, and an electrical conductivity of the second sub-conductive portion is different from an electrical conductivity of the second main conductive portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, different concentrations of doped impurity ions changes electrical conductivity). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Koezuka and the electrical characteristics of Park in order to form lightly doped drain (LDD) regions such that the concentration of dopant is less than that of the source region and the drain region (Park paragraph 0059). Regarding independent claim 21, Koezuka teaches a display device (fig. 27B, 800) comprising: a substrate (fig. 3C, 102); a semiconductor layer (106) comprising a channel portion (fig. 2, 106c and 106d), a first conductive portion (106a and 106b on left side) positioned on a first side of the channel portion, and a second conductive portion (106a and 106b on right side) positioned on a second side of the channel portion that is opposite the first side, the first conductive portion including a first main conductive portion (106a left side) and a first sub-conductive portion (106b left side), and the second conductive portion including a second main conductive portion (106a right side) and a second sub-conductive portion (106b right side); a gate insulating film (108) on the channel portion and non-overlapping with the first sub-conductive portion and the second sub-conductive portion (fig. 2, 108 does not overlap with 106b); a first auxiliary electrode (fig. 3C, 110a) positioned directly on the first main conductive portion; a first electrode (110b and 110c) on the first auxiliary electrode; a second auxiliary electrode (112a) positioned directly on the second main conductive portion; a second electrode (112b and 112c) on the second auxiliary electrode; and a third electrode (114) positioned on the gate insulating film, the third electrode overlapping the channel portion (fig. 2), wherein each of the first auxiliary electrode and the second auxiliary electrode comprises a conductive oxide (paragraphs 0147-0148). Koezuka does not teach wherein a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion, and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion. Park teaches wherein a resistance of the first main conductive portion is less than a resistance of the first sub-conductive portion, and the resistance of the first sub-conductive portion is less than a resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of first main conductive portion 108 is less than resistance of first sub-conductive portion 120 left of 110, and resistance of first sub-conductive portion 120 left of 110 is less than resistance of channel portion 110), and a resistance of the second main conductive portion is less than a resistance of the second sub-conductive portion, and the resistance of the second sub-conductive portion is less than the resistance of the channel portion (paragraph 0060, “the concentrations of the doped impurity ions in the different regions of the semiconductor active layer may range from relatively high to relatively low in the order of the source region 108 and the drain region 109, the LDD region 120, and the channel region 110”, relatively high concentration of doped impurity ions corresponds to a low resistance, therefore resistance of second main conductive portion 109 is less than resistance of second sub-conductive portion 120 right of 110, and resistance of first sub-conductive portion 120 right of 110 is less than resistance of channel portion 110). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Koezuka and the main and sub-conductive portions’ resistance of Park in order to form lightly doped drain (LDD) regions such that the concentration of dopant is less than that of the source region and the drain region (Park paragraph 0059). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Koezuka in view of Lee (US Publication 20210202910). Regarding dependent claim 12, Koezuka teaches the display device of claim 1, further comprising: a buffer layer (fig. 3C, 104) that is closer to the substrate than the semiconductor layer. Koezuka does not teach and a light shield that is closer to the substrate than the buffer layer, wherein the first electrode is electrically connected to the light shield through a contact hole extending through the gate insulating film and the buffer layer. Lee teaches and a light shield (fig. 1, 122) that is closer to the substrate (120) than the buffer layer (128), wherein the first electrode is electrically connected to the light shield through a contact hole (C3) extending through the gate insulating film and the buffer layer (122 connected to 146 via 124 and 144). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Koezuka and the light shield of Lee in order to prevent deterioration of the semiconductor layer due to irradiation of an external light through the substrate (Lee paragraph 0030). Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Koezuka in view of Lee as applied to claim 12 above, and further in view of Choo et al. (US Publication 20150144923). Regarding dependent claim 13, Koezuka further teaches the display device of claim 12, further comprising: a plurality of sub-pixels (fig. 31A, 501), each sub-pixel comprising a driving transistor (fig. 31B, 550) and a capacitor (560), wherein the driving transistor is a thin-film transistor comprising the first electrode, the second electrode, the third electrode, and the semiconductor layer (fig. 3C). Koezuka in view of Lee does not teach wherein the capacitor comprises a first plate, a second plate, and a third plate, and the buffer layer is positioned between the first plate and the second plate, and the gate insulating film is positioned between the second plate and the third plate. Choo teaches wherein the capacitor (fig. 6, Cst1 and Cst2, paragraph 0042) comprises a first plate (170), a second plate (layer above 130 in Cst1 which corresponds to 146, see fig. 4B), and a third plate (fig. 6, 110), and the buffer layer (150) is positioned between the first plate and the second plate, and the gate insulating film (130) is positioned between the second plate and the third plate (fig. 6). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Koezuka in view of Lee and the capacitor of Choo in order to maintain the voltage of the gate electrode of the driving transistor when the switching transistor is turned off (Choo paragraph 0013). Regarding dependent claim 14, Choo further teaches the display device of claim 13, wherein the first plate is electrically connected to the first electrode or the light shield, the first plate comprises the light shield that is electrically connected to the first electrode, or the first plate comprises a metal that is also in the light shield (fig. 6, first plate 170 connected to first electrode 168, see also paragraph 0044), the third plate is the third electrode or the first electrode, the third plate is electrically connected to the third electrode or the first electrode, or the third plate comprises a metal positioned on the same layer as the third electrode or the first electrode (fig. 6, third plate 146 (refer to Choo fig. 4B) positioned on same layer as third electrode 144), the second plate comprises a conductive semiconductor plate (fig. 6 115) and a conductive oxide plate (112), the conductive semiconductor plate including a semiconductor material is the same as a semiconductor material included in the semiconductor layer, and the conductive oxide plate comprises the conductive oxide (paragraph 0091). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Koezuka in view of Lee and the capacitor of Choo per the reasons stated above in claim 13. Response to Arguments Applicant’s arguments, see 12, filed 03/09/2026, with respect to the claim objections have been fully considered and are persuasive. The objections of 10/09/2025 has been withdrawn. Applicant’s arguments with respect to claims 1-6, 8-9, 12-17, and 19-21 have been fully considered but are moot in view of the new grounds of rejection. Applicant’s arguments filed 03/09/2026 have been fully considered but are not persuasive. Applicant argues on pages of the instant Remarks: “Amended claims 1 and 21, by specifying that the auxiliary electrodes are positioned directly on respective main conductive portions, emphasize the role of the conductive oxide in the auxiliary electrodes. In particular, because the conductive oxide material is in direct contact with the main conductive portions, it serves to protect the top surface of the semiconductive layer (e.g., at the main conductive portions) from defects. See specification as filed at [0111] and [0113]. Park was cited for other aspects of independent claims 1 and 21, and also does not teach the claimed "first auxiliary electrode positioned directly on the first main conductive portion,", "second auxiliary electrode positioned directly on the second main conductive portion," and "each of the first auxiliary electrode and the second auxiliary electrode comprises a conductive oxide." None of the other combinations of references cited against the dependent claims teach or suggest (nor does the Examiner allege that they teach or suggest) these claimed features. For the foregoing reasons, claims 1, 21, and the claims depending therefrom are allowable over the references cited… As shown in the annotated figure above, the first and second sub-conductive portions do overlap the second upper hydrogen capturing layer 144. In contrast, amended claim 15 states that the first auxiliary electrode does not overlap the first sub-conductive portion and the second auxiliary electrode does not overlap the second sub-conductive portion. Park was cited as teaching other aspects of claim 15, and was not cited as teaching the claimed first auxiliary electrode or second auxiliary electrode. Park also does not teach the "a first auxiliary electrode positioned on the first main conductive portion, but not overlapping the first sub-conductive portion in a plan view of the display device" and "a second auxiliary electrode positioned on the second main conductive portion, but not overlapping the second sub-conductive portion in the plan view of the display device" of claim 15.” However, as stated above, figures 2 and 3C of Koezuka teaches “a first auxiliary electrode (fig. 3C, 110a) positioned directly on the first main conductive portion (fig. 2, 106a left)”, “a second auxiliary electrode (112a) positioned directly on the second main conductive portion (fig. 2, 106a right)”, and “the first main conductive portion farther from the channel portion than the first sub-conductive portion is from the channel portion, and the second main conductive portion farther from the channel portion than the second sub-conductive portion is from the channel portion”. Therefore, claims 1, 15, and 21 are not patentable. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRACE Y CHA whose telephone number is (703)756-5393. The examiner can normally be reached Monday - Thursday 8:00 am - 5:00 pm and every other Friday 8:00 am - 4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRACE CHA/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Jun 30, 2022
Application Filed
Apr 22, 2025
Non-Final Rejection mailed — §102, §103
Jul 21, 2025
Response Filed
Oct 09, 2025
Final Rejection mailed — §102, §103
Mar 09, 2026
Request for Continued Examination
Mar 16, 2026
Response after Non-Final Action
Jul 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
98%
Grant Probability
99%
With Interview (+3.6%)
3y 5m (~0m remaining)
Median Time to Grant
High
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