DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/16/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-12 and 19-20 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation “a (the) vertical direction,” is unclear as to how it is related to “vertically overlapping.”
Regarding claims 1, 12 and 19, the limitation “the vertical direction extending away from the substrate,” is unclear a vertical direction,” is unclear as to what is “extending away from the substrate,” and/or as to how a direction can “extend away from the substrate.”
Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-10, 13, 15, 17-18 and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng et al. (US 20190259855; herein “Cheng”).
Regarding claim 1, Cheng discloses in Fig. 12 and related text an integrated circuit device, comprising:
a conductive region (e.g. 108, see [0013]) disposed on a substrate (102/104/106);
an insulating structure (e.g. 120, outer/second barrier layer portion of 122, and 128, see [0013] and [0021]) disposed on the substrate;
an insulating layer (e.g. 130, see [0013]) disposed on an upper surface of the insulating structure,
a local capping pattern (e.g. 132/134) disposed in a contact hole formed in the insulating structure and the insulating layer, the contact hole vertically overlapping the conductive region and extending from the conductive region on the substrate through the insulating structure and the insulating layer in a vertical direction, and the local capping pattern having an outer sidewall in direct contact with an inner sidewall of the insulating layer (inner sidewall of 130) and an inner sidewall of the insulating structure (inner sidewall including inner sidewall of 128 and inner sidewall of second barrier layer portion of 122); and
a conductive plug (e.g. 138a/136a/first barrier layer portion of 122/124, see [0013], [0021]) in the contact hole and extending through the local capping pattern (132/134) in the vertical direction,
wherein the conductive plug is formed of a first metal (see [0013] at least) and has a lower sidewall in direct contact with the inner sidewall of the insulating structure (the inner sidewall including inner sidewall of 128 and inner sidewall of second barrier layer portion of 122) and an upper sidewall in direct contact with an inner sidewall of the local capping pattern (inner sidewall of 132/134),
wherein the local capping pattern has a width in a horizontal direction that gradually increases in the vertical direction extending away from the substrate (see Fig. 12).
Regarding claim 2, Cheng further discloses wherein a portion of the conductive plug in contact with the local capping pattern has a width in the horizontal direction that decreases in the vertical direction away from the substrate (note that one can choose a “portion” such that it reads on the claimed limitation).
Regarding claim 4, Cheng further discloses wherein the conductive region includes a metal silicide layer (e.g. when the “conductive region” is interpreted to include 108 and 118, see [0013]).
Regarding claim 5, Cheng further discloses wherein the conductive region includes a metal layer (e.g. when the “conductive region” is interpreted to include 108 and 118, see [0013]).
Regarding claim 6, Cheng further discloses wherein the local capping pattern (132/134) includes a silicon-containing insulating layer, a metal nitride layer, a metal oxynitride layer, a metal-doped insulating layer, or a combination thereof (see [0027]).
Regarding claim 7, Cheng further discloses wherein the local capping pattern (132/134) includes a material which is the same as a material of at least a portion of the insulating structure (e.g. 132 and 128 are silicon nitride, see [0025] and [0027]).
Regarding claim 8, Cheng further discloses wherein a first length of the local capping pattern (132/134) is less than a second length of the contact hole (hole in 120/128/130) in the vertical direction.
Regarding claim 9, Cheng further discloses wherein the local capping pattern (132/134) includes a second metal that is different from the first metal (e.g. 134 includes titanium and 124a includes cobalt, see [0013] and [0027]).
Regarding claim 10, Cheng further discloses wherein the first metal is selected from molybdenum (Mo), copper (Cu), tungsten (W), cobalt (Co), ruthenium (Ru), manganese (Mn), titanium (Ti), tantalum (Ta), aluminum, (Al), and a combination thereof (cobalt, see [0013]).
Regarding claim 19, Cheng discloses in Fig. 12 and related text an integrated circuit device, comprising:
a fin-type active region (see [0012]) protruding from a substrate (102;
a source/drain region (e.g. 108, see [0013]) disposed in the fin-type active region;
a metal silicide layer (e.g. 118, see [0013]) in direct contact with an upper surface of the source/drain region;
a gate line (116b, see [0013]) extending from the fin-type active region in a direction intersecting with the fin-type active region;
an insulating structure (e.g. 120, outer/second barrier layer portion of 122, and 128, see [0013] and [0021]) disposed on the source/drain region, the metal silicide layer, and the gate line;
an insulating layer (e.g. 130, see [0013]) disposed on the insulating structure,
a source/drain contact structure (e.g. 132/134/138a/136a/first barrier layer portion of 122/124, see [0013], [0021]) passing through a first portion of the insulating structure in a vertical direction, and electrically connected to the source/drain region through the metal silicide layer; and
a gate contact structure (e.g. 124/138b/136a) passing through a second portion of the insulating structure in a vertical direction, and electrically connected to the gate line,
wherein one of the source/drain contact structure or the gate contact structure includes:
a local capping pattern (e.g. 132/134) having an outer sidewall in direct contact with an inner sidewall of the insulating layer (inner sidewall of 130) and having a horizontal width gradually increasing in the vertical direction extending away from the substrate (see Fig. 12); and
a conductive plug (e.g. 138a/136a/first barrier layer portion of 122/124) in the contact hole and extending through the local capping pattern and the insulating structure in the vertical direction, the conductive plug having a lower sidewall in direct contact with the insulating structure (the inner sidewall including inner sidewall of 128 and inner sidewall of second barrier layer portion of 122) and an upper sidewall in direct contact with the local capping pattern, and the conductive plug being formed of first metal (e.g. cobalt, see [0013]).
Regarding claim 13, Cheng discloses in Fig. 12 and related text an integrated circuit device, comprising all of the claimed limitations in substantially the same manner as applied to claims 1 and 19 above, and further discloses
the source/drain region (e.g. 108, see [0013]) disposed on a substrate (102/104/106), and having a recess (see Fig. 12) on an upper surface thereof,
the metal silicide layer (118, see [0013]) disposed on the source/drain region, and including a first metal (e.g. nickel or titanium, see [0023]);
the conductive plug (e.g. 138a/136a/first barrier layer portion of 122/124, see [0013], [0021]) is formed of a second metal (e.g. cobalt, see [0013]);
wherein the first metal is different from the first metal.
Regarding claim 15, Cheng further discloses wherein the local capping pattern (132/134) includes a silicon-containing insulating layer, a metal nitride layer, a metal oxynitride layer, a metal-doped insulating layer, or a combination thereof (see [0027]).
Regarding claim 17, Cheng further discloses wherein the local capping pattern (132/134) includes a third metal that is different from the second metal (e.g. 134 includes titanium and 124a includes cobalt, see [0013] and [0027]).
Regarding claim 18, Cheng further discloses wherein the second metal is selected from molybdenum (Mo), copper (Cu), tungsten (W), cobalt (Co), ruthenium (Ru), manganese (Mn), titanium (Ti), tantalum (Ta), aluminum, (Al), and a combination thereof (cobalt, see [0013]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3, 11, 14 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng as applied to claims 1, 13 and 19 above, and in view of Hatazaki (US 2022/0302023; herein “Hatazaki”).
Regarding claim 3, Cheng does not explicitly disclose
wherein the local capping pattern is disposed concentrically with the conductive plug, and surrounds the upper sidewall of the conductive plug.
In the same field of endeavor, Hatazaki teaches in Fig. 7-8 and related text an integrated circuit device wherein
the local capping pattern (CM1) is disposed concentrically with the conductive plug (CM2), and surrounds the upper sidewall of the conductive plug (see [0052]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Cheng by having the local capping pattern is disposed concentrically with the conductive plug, and surrounds the upper sidewall of the conductive plug in order to provide a conventional conductive contact shape.
Regarding claim 11, Cheng further discloses the conductive region includes an epitaxial semiconductor layer and a metal silicide layer interposed between the epitaxial semiconductor layer and the conductive plug (e.g. when the “conductive region” is interpreted to include 108 and 118, see [0013]), and the local capping pattern (132/134) includes a silicon-containing insulating layer, a metal nitride layer, a metal oxynitride layer, a metal-doped insulating layer, or a combination thereof (see [0027] and [0045]),
but does not explicitly disclose
the conductive plug includes molybdenum (Mo).
In the same field of endeavor, Hatazaki teaches in Fig. 7-8 and related text an integrated circuit device wherein
the conductive plug includes molybdenum (Mo) (see [0051]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Cheng by having the conductive plug includes molybdenum (Mo) in order to provide a conventional conductive contact material. Further, Hatazaki shows that Mo and W conductive plugs are equivalent structures known in the art. Therefore, because these two were art-recognized equivalents at the time the invention was made, one of ordinary skill in the art would have found it obvious to the Mo of Hatazaki substitute for the W of Cheng.
Regarding claim 14, Cheng further discloses the local capping pattern (132/134) surrounds an upper end of the conductive plug, a first upper surface of the local capping pattern (132/134) and a second upper surface of the conductive plug (122/124a/136a/138a) are both planar and extend in the same horizontal plane, but does not explicitly disclose the local capping pattern is concentrically disposed with the conductive plug.
In the same field of endeavor, Hatazaki teaches in Fig. 7-8 and related text an integrated circuit device wherein
the local capping pattern (CM1) is disposed concentrically with the conductive plug (CM2), and surrounds the upper end of the conductive plug (see [0052]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Cheng by having the local capping pattern is disposed concentrically with the conductive plug, and surrounds the upper end of the conductive plug in order to provide a conventional conductive contact shape.
Regarding claim 20, Cheng further discloses a first upper surface of the local capping pattern (132/134) and a second upper surface of the conductive plug (122/124a/136a/138a) are both planar and extend in the same horizontal plane, the local capping pattern includes a silicon-containing insulating layer, a metal nitride layer, a metal oxynitride layer, a metal-doped insulating layer, or a combination thereof (see [0027] and [0045]),
but does not explicitly disclose
the local capping pattern is concentrically disposed with the conductive plug to surround an upper end of the conductive plug,
the conductive plug includes molybdenum (Mo).
In the same field of endeavor, Hatazaki teaches the remaining limitations in substantially the same manner and for the same reasons as applied to claims 3 and 11 above.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng as applied to claim 1 above and in view of Dewey et al. (US 20210091080; herein “Dewey”).
Regarding claim 12, Cheng does not explicitly disclose
an upper insulating structure disposed on the insulating structure, the upper insulating structure having an upper contact hole formed therein vertically overlapping the conductive plug, the upper insulating structure extending in the vertical direction;
an upper local capping pattern having an outer sidewall in direct contact with an upper portion of an inner sidewall of the upper contact hole, and having a width in a horizontal direction gradually increasing in a direction extending away from the substrate; and
an upper conductive plug passing through the upper local capping pattern and the upper contact hole in the vertical direction, having a lower sidewall in direct contact with the upper insulating structure and an upper sidewall in direct contact with the upper local capping pattern, and including a second metal.
In the same field of endeavor, Dewey teaches in Fig. 17 and related text am integrated circuit device comprising a second device layer have the same structure as the first device layer (see Fig. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Cheng by a second device layer with the same structure as the first device layer in order to achieve a 3D CMOS IC structure enabling increased density of functional units on limited real estate of a chip (see [0002]). The limitations of the claim are therefore taught by lower device structure having the claimed limitations, as shown by Cheng, and the duplication of the device structure, as shown by Dewey.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng.
Regarding claim 16, Cheng does not explicitly disclose wherein a first length of the local capping pattern is greater than 30% and less than 50% of a second length of the contact hole.
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the relative lengths to be a result effective variable affecting device size and electrical characteristics of the connection structures. Thus, it would have been obvious to modify the device of Cheng to have the lengths within the claimed range in order to achieve a desired balance of characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Response to Arguments
Applicant's arguments filed 1/16/2026 have been fully considered but are not persuasive.
Applicant argues (page 5) that Cheng does not teach or suggest the claimed invention because the combination of components reading on the “conductive plug” are “as a whole…not formed of the first metal.”
In response, the examiner disagrees. Specifically, the Examiner notes that in accordance with MPEP 2111, USPTO personnel are to give claims their broadest reasonable interpretation in light of the supporting disclosure. In re Morris, 127 F.3d 1048, 1054-55, 44 USPQ2d 1023, 1027-28 (Fed. Cir. 1997). Therefore the claim limitation “formed of a first metal” does not require the entirety of the conductive plug to be the first metal. Rather, the claim require the conductive plug to be formed, at least partially, of a first metal. Accordingly, Cheng teaches the claimed limitation.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896 3/26/2026