Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/1/2012 has been entered.
Claim Rejections – 35 U.S.C. 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 1 rejected under 35 U.S.C. 103 as being unpatentable over Kim (KR 20190097523) of record, in view of Liao (U.S. Patent Pub. No. 2020/0194613).
Regarding Claim 1
FIG. 1 of Kim discloses a die bonding method, comprising: obtaining information about a quality grade of each die of a plurality of dies placed at a wafer (text: an electrical property test may be performed on the dies through an inspection apparatus such as a probe station, and the dies may be given a plurality of grades according to the results of the inspection process); picking up a first die having a first quality grade among the plurality of dies from the wafer (FIG. 2); identifying a plurality of bonding locations from a substrate according to a quality grade of the first die; and bonding the first die (12A) to a first bonding location, among the plurality of bonding locations, of the substrate; picking up a second die (12B) having a second quality grade different from the first quality grade; and bonding the second die to a second bonding location, among the plurality of bonding locations, of the substrate, wherein the first bonding location and the second bonding location are located in the same substrate, and wherein the first bonding location is different from the second bonding location (FIG. 3).
Kim is silent with respect to “a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area”.
FIG. 3 of Liao discloses a similar die bonding method, wherein a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the method of Kobayashi, as taught by Liao. The ordinary artisan would have been motivated to modify Kobayashi in the above manner for purpose of reducing waste of resources ([0005] of Liao).
Claim 1 rejected under 35 U.S.C. 103 as being unpatentable over Fang (U.S. Patent Pub. No. 2009/0227048) of record, in view of Frayer (U.S. Patent Pub. No. 2015/0364218) of record.
Regarding Claim 1
FIG. 1 of Fang discloses a die bonding method, comprising: obtaining information about a quality grade of each die of a plurality of dies placed at a wafer [0012]; picking up a first die having a first quality grade among the plurality of dies from the wafer (FIG. 2); identifying a plurality of bonding locations (51-53) from a substrate according to a quality grade of the first die [0012]; and bonding the first die to a first bonding location, among the plurality of bonding locations, of the substrate; picking up a second die having a second quality grade different from the first quality grade; and bonding the second die to a second bonding location, among the plurality of bonding locations, of the substrate, wherein the first bonding location and the second bonding location are located in the same substrate, and wherein the first bonding location is different from the second bonding location.
Fang is silent with respect to “a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area”.
FIG. 5 of Frayer discloses a similar die bonding method, wherein a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the method of Fang, as taught by Frayer. The ordinary artisan would have been motivated to modify Fang in the above manner for purpose of reducing production cost ([0019] of Frayer).
Claims 1 and 3-5 rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (WO 2017164252, machine-translation provided), in view of Masahiko (KR 100228958) of record.
Regarding Claim 1
FIG. 32 of Kobayashi discloses a die bonding method, comprising: obtaining information about a quality grade of each die of a plurality of dies placed at a wafer (text: The plurality of dies 72 included in the wafer 70 are generally classified into a plurality of grades, and the dies 72 are bonded to the substrate 80 in units of grades. A plurality of dies 72 are bonded to the substrate 80…. The grade classification can be determined depending on whether or not a predetermined characteristic condition such as an electric characteristic is satisfied); picking up a first die (74) having a first quality grade among the plurality of dies from the wafer (10); identifying a first bonding area and a second bonding area of a substrate according to a quality grade of the first die; and bonding the first die to a first bonding location within the first bonding area of the substrate; picking up a second die (76) having a second quality grade different from the first quality grade; and bonding the second die to a second bonding location within the second bonding area of the substrate, wherein the first bonding area and the second bonding area are located in the same substrate (70).
Kobayashi is silent with respect to “a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area”.
FIG. 3 of Masahiko discloses a similar die bonding method, wherein dies having the same quality grade are set to be bonded together.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the method of Kim, as taught by Masahiko, such that dies having the same quality grade are set to be bonded on the same row or column in the plurality of bonding locations of the substrate, wherein the first bonding location and the second bonding location are in different rows or columns in the plurality of bonding locations. The ordinary artisan would have been motivated to modify Kim in the above manner for purpose of, for instance, grouping dies with the same quality grade after dicing.
Regarding Claim 3
FIG. 3 of Masahiko discloses dies having the same quality grade are set to be bonded together. It would have been obvious to one of ordinary skill in the art dies having the same quality grade are set to be bonded on the same row or column in the plurality of bonding locations of the substrate, and wherein the first bonding location and the second bonding location are in different rows or columns in the plurality of bonding locations
Regarding Claim 4
FIG. 3 of Masahiko discloses dies having the same quality grade are set to be bonded on the same bonding area of a plurality of bonding areas of the substrate,the second bonding location are in different bonding areas of the substrate (text: chips having the same grade of quality are fixed together in the leadframe by die bonding).
Regarding Claim 5
The configuration of the claimed “the quality grade includes a plurality of grades, and wherein a size of a bonding area, among the plurality of bonding areas of the substrate, set for each grade of the plurality of grades is set on the basis of a number of dies for each grade in the wafer” was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant. In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04.
Claim 2 rejected under 35 U.S.C. 103 as being unpatentable over Kim and Liao, in view of Miki (CN 100383940) of record.
Regarding Claim 2
Kim as modified by Liao discloses Claim 1.
Kim as modified by Liao is silent with respect to “the substrate is a printed circuit board (PCB) divided into a plurality of rows and columns”.
FIG. 15 of Miki discloses a similar die bonding method, the substrate (150) is a printed circuit board (PCB) divided into a plurality of rows and columns (FIG. 16).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the method of Kim, as taught by Miki. The ordinary artisan would have been motivated to modify Kim in the above manner because PCB are used in nearly all electronic products today.
Claims 6-7 rejected under 35 U.S.C. 103 as being unpatentable over Kim and Liao, in view of Nakamura (KR 20190051067) of record.
Regarding Claim 6
Kim as modified by Liao discloses Claim 1.
Kim as modified by Liao is silent with respect to “stacking a second die, among the plurality of dies, on the first die on the substrate; and bonding the second die to the first die on the substrate”.
FIG. 6 of Nakamura discloses a similar die bonding method, comprising stacking a second die (10), among the plurality of dies, on the first die on the substrate (30); and bonding the second die to the first die on the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the method of Kim, as taught by Nakamura. The ordinary artisan would have been motivated to modify Kim in the above manner for purpose of miniaturizing semiconductor devices (text of Nakamura).
Regarding Claim 7
It would have been obvious to one of ordinary skill in the art that the first die and the second die have the same quality grade for purpose of, for instance, having dies with the same quality grade after dicing.
Pertinent Art
JP 2591464 discloses chips are classified into a plurality of grades according to electrical characteristics and performing die bonding of a plurality of types of chips or chips classified into a plurality of grades on a wafer. FIG. 8 of Liu (CN 113921428), WO 2020199166, CN 111201595 and TW M588348 each discloses a first group of dies including the first die, among the plurality of dies, having the first quality grade are set to be bonded on the first bonding area, and wherein a second group of dies including the second die, among the plurality of dies, having the second quality grade are set to be bonded on the second bonding area” and “the first bonding area is different from the second bonding area. Pertinent art also includes US 20150255421 and CN 106373914.
Response to Arguments
Applicant’s arguments with respect to Claim 1 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG-BAI ZHU whose telephone number is (571)270-3904. The examiner can normally be reached on 11am – 7pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SHENG-BAI ZHU/Primary Examiner, Art Unit 2897