Prosecution Insights
Last updated: May 29, 2026
Application No. 17/865,417

MANUFACTURING METHOD OF ELECTRONIC DEVICE

Non-Final OA §103§112
Filed
Jul 15, 2022
Priority
Aug 17, 2021 — CN 202110942356.7
Examiner
CULBERT, CHRISTOPHER A
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Innolux Corporation
OA Round
3 (Non-Final)
42%
Grant Probability
Moderate
3-4
OA Rounds
0m
Est. Remaining
46%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allowance Rate
139 granted / 335 resolved
-26.5% vs TC avg
Minimal +5% lift
Without
With
+4.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
26 currently pending
Career history
415
Total Applications
across all art units

Statute-Specific Performance

§103
82.3%
+42.3% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 335 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/7/2025 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 8-10 and 12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 8 requires “dividing the light emitting module into a plurality of sub-light emitting modules” and “providing a supporting substrate on at least one of the plurality of sub-light emitting modules”. As such, dividing the light emitting module needs to occur before the supporting substrate is provided. However, claim 8, as presently amended, further requires a width of the supporting substrate to be “lower than” (which is interpreted as less than) a width of at least one of the plurality of sub-light emitting modules. The only instance disclosed by Applicant in which the supporting substrate has a width less than that of a sub-light emitting module is shown in Fig. 23(I) in which the division of the light emitting module occurs after the provision of the supporting substrate. As such, claim 8 as presently amended was not supported by the Application as originally filed. Claims 9, 10, and 12 depend from claim 8 and are, therefore, also rejected. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 2, and 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 2018/0197755 A1) in view of Saketi et al. (US 2019/0237347 A1) and Jung et al. (US 2015/0146138 A1). Regarding claim 1, Hsu discloses a method for manufacturing an electronic device, comprising: providing a carrier substrate (100 in Fig. 1A); forming a module on the carrier substrate, which comprises: transferring at least one active unit (112 in Fig. 1F) to the carrier substrate; forming a circuit layer (106 in Fig. 1F) on the carrier substrate; and forming a patterned light absorbing layer (108 in Fig. 1D, ¶ 0024) on the carrier substrate, the patterned light absorbing layer comprising an opening through which the active unit is electrically connected to the circuit layer (see Fig. 1F); and transferring the module to a target substrate (160 in Fig. 1M). Hsu does not explicitly state that the active unit is a light emitting unit such that the module is a light emitting module. Saketi, in the same field of endeavor, discloses that active units may be light emitting units (Abstract). There was a benefit to using light emitting units in that they overall structure can act as a display. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to use light emitting units for the active units of Hsu for this benefit. Hsu does not explicitly disclose that the patterned light absorbing layer comprises a blackened metal material or a black matrix. However, a patterned light absorbing layer comprising a blackened metal material or a black matrix and the corresponding function was known in the art (“partition wall may include . . . . a black matrix of a metal material”, ¶ 0084 of Jung). As such, it would have been obvious to one having ordinary skill in the art before the Application's effective filing date to have substituted the known composition of a blackened metal material or a black matrix as taught by Jung for composition of the patterned light absorbing layer of Hsu and the results of the substitution would have been predictable. (see MPEP § 2143(I)(B)). Regarding claim 2, Hsu further discloses that the circuit layer is formed on the carrier substrate before the active unit is transferred to the carrier substrate (see Fig. 1B). Regarding claim 6, Hsu further discloses wherein the patterned light absorbing layer is formed on the carrier substrate by a photolithography process (¶ 0024). Regarding claim 7, Hsu further discloses wherein the target substrate is configured to drive the light emitting unit (¶ 0043). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 2018/0197755 A1) in view of Saketi et al. (US 2019/0237347 A1), Jung et al. (US 2015/0146138 A1), and Koyanagi et al. (US 2015/0228622 A1). Regarding claim 13, Hsu discloses a method for manufacturing an electronic device, comprising: providing a carrier substrate (100 in Fig. 1A); forming a module on the carrier substrate, which comprises: transferring at least one active unit (112 in Fig. 1F) to the carrier substrate; forming a circuit layer (106 in Fig. 1F) on the carrier substrate; and forming a patterned light absorbing layer (108 in Fig. 1D and 116 in Fig. 1H, ¶ 0024) on the carrier substrate, the patterned light absorbing layer comprising an opening through which the active unit is electrically connected to the circuit layer (see Fig. 1F); and transferring the module to a target substrate (160 in Fig. 1M). Hsu does not explicitly state that the active unit is a light emitting unit such that the module is a light emitting module. Saketi, in the same field of endeavor, discloses that active units may be light emitting units (Abstract). There was a benefit to using light emitting units in that they overall structure can act as a display. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to use light emitting units for the active units of Hsu for this benefit. Hsu does not explicitly disclose that the patterned light absorbing layer comprises a blackened metal material or a black matrix. However, a patterned light absorbing layer comprising a blackened metal material or a black matrix and the corresponding function was known in the art (“partition wall may include . . . . a black matrix of a metal material”, ¶ 0084 of Jung). As such, it would have been obvious to one having ordinary skill in the art before the Application's effective filing date to have substituted the known composition of a blackened metal material or a black matrix as taught by Jung for composition of the patterned light absorbing layer of Hsu and the results of the substitution would have been predictable. (see MPEP § 2143(I)(B)). Hsu in view of Saketi and Jung does not disclose performing a process to remove portions of the patterned light absorbing layer to expose a light output surface of the at least one light emitting unit. Koyanagi, in the same field of endeavor, discloses removing portions of an encapsulant to expose the surface of the encapsulated module (see transition from Fig. 12C to Fig. 12D; the encapsulant corresponding to a portion of the patterned light absorbing layer of Hsu). There was a benefit to removing said portion in that it thins the device, allowing for a smaller profile. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to perform a process as taught by Koyanagi to remove portions of the patterned light absorbing layer of Hsu to expose a light output surface of the at least one light emitting unit for this benefit. Response to Arguments Applicant’s arguments with respect to the claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A CULBERT whose telephone number is (571)272-4893. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER A CULBERT/Examiner, Art Unit 2815
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Prosecution Timeline

Jul 15, 2022
Application Filed
May 01, 2025
Non-Final Rejection mailed — §103, §112
Jul 30, 2025
Response Filed
Aug 11, 2025
Final Rejection mailed — §103, §112
Oct 07, 2025
Request for Continued Examination
Oct 11, 2025
Response after Non-Final Action
Feb 25, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
42%
Grant Probability
46%
With Interview (+4.9%)
3y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 335 resolved cases by this examiner. Grant probability derived from career allowance rate.

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